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Patent Searching and Data


Title:
DOHERTY AMPLIFIER AND OUTPUT NETWORK THEREOF, AND DOHERTY AMPLIFIER DESIGN METHOD
Document Type and Number:
WIPO Patent Application WO/2024/092499
Kind Code:
A1
Abstract:
Provided in the embodiments of the present application are an output network of a Doherty amplifier, the output network comprising: a combined node; a primary output network, which is connected between an output end of a primary amplifier of a Doherty amplifier and the combined node; a secondary output network, which is connected between an output end of a secondary amplifier of the Doherty amplifier and the combined node; and a combiner matching network, which is connected between the combined node and a radio-frequency output end of the Doherty amplifier, wherein the secondary output network comprises a first sub-network and a second sub-network, which are connected in series, the first sub-network and the primary output network having the same circuit topology and each comprising at least an inductor and a capacitor, and the second sub-network comprising at least an inductor; the combiner matching network is configured to make a node impedance at the combined node be a complex impedance; and the primary output network and the secondary output network are respectively configured to make the node impedance match a target load impedance of the primary amplifier and a target load impedance of the secondary amplifier.

Inventors:
LIU HAOYU (CN)
ZHENG SHUANGSHUANG (CN)
LIN LIANG (CN)
Application Number:
PCT/CN2022/128960
Publication Date:
May 10, 2024
Filing Date:
November 01, 2022
Export Citation:
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Assignee:
SUZHOU WATECH ELECTRONICS CO LTD (CN)
International Classes:
H03F1/02
Foreign References:
CN111416578A2020-07-14
CN114070210A2022-02-18
CN114094943A2022-02-25
Attorney, Agent or Firm:
CHINA PATENT AGENT (H.K.) LTD. (CN)
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