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WO/2009/128925 |
A method and apparatus to gain additional functionality of a microprocessor by adding an extended instruction set mode. In this mode, the result of executing an instruction may be changed without changing the instruction itself. In the e...
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WO/2009/119224 |
Disclosed is a method for writing control data into an on-vehicle controller wherein writing of a control program, or the like, on-vehicle controller can be carried out by either compressed into an data transfer or uncompressed data tran...
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WO/2009/108452 |
Managing resources. A resource manager includes programmatic code for managing resources in the computing environment. Resources available from resource systems within the computing environment are managed. Methods may include receiving ...
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WO/2009/108452 |
Managing resources. A resource manager includes programmatic code for managing resources in the computing environment. Resources available from resource systems within the computing environment are managed. Methods may include receiving ...
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WO/2009/102529 |
An embodiment of an electronic system (1 00) includes a processing element (102), a bus controller (104, 120), and a peripheral module (122, 123, or 124). The processing element executes machine readable code for performing a data transf...
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WO/2009/091577 |
Apparatus, systems, and methods are disclosed that operate to encode data bits transmitted on a plurality of channels according to one of three Data Bus Inversion (DBI) algorithms. Additional apparatus, systems, and methods are disclosed.
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WO/2009/091577 |
Apparatus, systems, and methods are disclosed that operate to encode data bits transmitted on a plurality of channels according to one of three Data Bus Inversion (DBI) algorithms. Additional apparatus, systems, and methods are disclosed.
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WO/2009/083027 |
A method of writing data to a memory comprises receiving a first message having a first data part; writing the first message to the memory; and writing location information for a subsequent message to a location in said memory.
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WO/2009/079738 |
A user who has a foreign profile associated with a foreign virtual world may be represented in a local virtual world that is distinct from the foreign virtual world. A request for entry into the local virtual world, which identifies the ...
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WO/2009/072018 |
An apparatus for providing improved memory usage may include a processor. The processor may be configured to receive media content data, direct storage of up to a predetermined amount of a most recently received portion of the media cont...
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WO/2009/066238 |
The present invention relates to an asynchronous control device (100 ) for controlling a stage of an asynchronous pipeline (10), the control device (100 ) comprising controllogic (104 ) and a non-transparent memoryelement (102 ),wherein ...
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WO/2009/060260 |
The asynchronous pipeline stage (20) comprises a data input (22) arranged for being coupled to a data providing environment (41) and a data output (24), arranged for being coupled to a data receiving environment (43). A controllable data...
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WO/2009/057967 |
In an iterative operation apparatus and method for a regular graph, a current group is defined in a specific direction in a 3-dimensional graph in which a hidden variable cost and a feature cost are stacked for an iterative operation on ...
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WO/2009/057967 |
In an iterative operation apparatus and method for a regular graph, a current group is defined in a specific direction in a 3-dimensional graph in which a hidden variable cost and a feature cost are stacked for an iterative operation on ...
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WO/2009/057967 |
In an iterative operation apparatus and method for a regular graph, a current group is defined in a specific direction in a 3-dimensional graph in which a hidden variable cost and a feature cost are stacked for an iterative operation on ...
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WO/2009/055871 |
A method of generating stimulation pulses for application by an auditory prosthesis, the method comprising: processing an audio input to obtain time shifted frequency data in which frequency data of one or more frequencies is temporally ...
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WO/2009/055757 |
Described is a data model used in a continuation based runtime that executes activities. The data model provides for declaring parameters to define data flow direction (in, out or both in and out) with respect to activities. The model fu...
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WO/2009/055757 |
Described is a data model used in a continuation based runtime that executes activities. The data model provides for declaring parameters to define data flow direction (in, out or both in and out) with respect to activities. The model fu...
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WO/2009/050501 |
A data switch for an integrated circuit comprising at least one link for receiving input data packets from an independently modulatedspread spectrum clock (SSC) enabled source having predetermined spread spectrum link clock frequency cha...
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WO/2009/043712 |
This invention relates to a design of an efficient buffer management model in order to increase the efficiency of data exchange between two process threads, - e.g. when implementing a network transport protocol stack. This invention prop...
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WO/2009/034517 |
An electronic device is provided which comprises a barrel shifter unit (BS) for performing a rotation of an input. The barrel shifter unit comprises a first and second barrel shifter (BS1, BS2). The electronic device furthermore comprise...
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WO/2009/034517 |
An electronic device is provided which comprises a barrel shifter unit (BS) for performing a rotation of an input. The barrel shifter unit comprises a first and second barrel shifter (BS1, BS2). The electronic device furthermore comprise...
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WO/2009/033147 |
Power savings in a mobile device is accomplished by generating audio samples by decoding a bitstream with a decoding system within the mobile device. The generated audio samples are transferred into at least one memory bank in a set of m...
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WO/2009/033147 |
Power savings in a mobile device is accomplished by generating audio samples by decoding a bitstream with a decoding system within the mobile device. The generated audio samples are transferred into at least one memory bank in a set of m...
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WO/2009/026727 |
A method and system for creating a virtual publication for use with a flip page application, the virtual publication comprising an image file of each page of the virtual publication to be displayed by the flip page application, a SWF fil...
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WO/2009/026727 |
A method and system for creating a virtual publication for use with a flip page application, the virtual publication comprising an image file of each page of the virtual publication to be displayed by the flip page application, a SWF fil...
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WO/2009/009857 |
For context based compression techniques, for example Context Based YK compression, a method and system for grouping contexts from a given context model together to create a new context model that has fewer contexts, but retains acceptab...
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WO/2009/005950 |
An electronic device may communicate wirelessly with another electronic device. The electronic device may include a first processor configured to control only wireless communications with the another device but not operations associated ...
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WO/2009/005950 |
An electronic device may communicate wirelessly with another electronic device. The electronic device may include a first processor configured to control only wireless communications with the another device but not operations associated ...
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WO/2008/149675 |
Provided is a waveform generation device for generating a signal of an arbitrary waveform. The waveform generation device includes: a waveform memory for storing a plurality of waveform data each including a sequence of signal values; a ...
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WO/2008/144876 |
The invention is directed at a method of managing side information, used during interactive compression, common to a server and one of multiple devices. In order to manage common side information, a global common side information table i...
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WO/2008/142610 |
A FIFO memory circuit is for interfacing between circuits with different clock domains. The circuit has a FIFO memory (10), a write pointer circuit (16) clocked by the clock of a first clock domain and controlling the memory location to ...
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WO/2008/135372 |
The present invention relates to a method for the creation and management of system-specific data for a technical system, which is configured of partial system interacting which each other, wherein respective engineering tools (4, 5, 6, ...
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WO/2008/128298 |
A device (1) is disclosed for converting a game device, for providing a game to a user, to satisfy minimum regulatory requirements of a target jurisdiction. The device includes hardware appropriate for those requirements, including elect...
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WO/2008/118791 |
A method of compressing instructions in a program may include extracting unique bit patterns from the instructions in the program and constructing a linear programming formulation or an integer programming formulation from the unique bit...
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WO/2008/101355 |
A processing system operable with a computing device, comprising one or more of a converter component for converting input data into a desired format for further processing, a parsing component for parsing input data into clusters having...
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WO/2008/084330 |
Methods and systems for enabling data communication from an image archiving system and a data storage/index/retrieving system.
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WO/2008/084738 |
In an encoding process in which one more files and/or files in a folder are collected into one archive file, original hierarchical structure information and standard hierarchical structure information are recorded into the archive file. ...
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WO/2008/085787 |
Disclosed is an electronic device featuring a multi buffer scheme for processing incoming signals. For example, two buffers can be used. A processor can read and process stored signals from a first buffer while an incoming data module ca...
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WO/2008/085850 |
The abstract must contain reference numbers, which refer back to the drawings to show the each main technical featu See PCT Rule 8.1, bullet d.
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WO/2008/072173 |
A circuit has a plurality of functional circuits (100a-f), each with multiphase control inputs. A control circuit drives the inputs for each phase in parallel. The control circuit (120a-c) comprises a chain of one-shot circuits (120a-c),...
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WO/2008/072173 |
A circuit has a plurality of functional circuits (100a-f), each with multiphase control inputs. A control circuit drives the inputs for each phase in parallel. The control circuit (120a-c) comprises a chain of one-shot circuits (120a-c),...
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WO/2008/068167 |
A method is disclosed of adaptively de-jittering packetized signals buffered at the receiver of a communication network node. The method is executed by a Jitter Buffer Manager (JBM) to optimize the end-to-end delay for call quality of Vo...
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WO/2008/060819 |
An apparatus for allowing display modules to communicate information about themselves to other display modules in the same display panel, comprising a module-based display panel wherein each face of the panel comprises a plurality of dis...
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WO/2008/058141 |
Circuits, methods, and apparatus for transferring data from a device's input clock domain to a core clock domain. One example achieves this by using a retiming element between input and core circuits. The retiming element is calibrated b...
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WO/2008/053152 |
A binary rotator which comprises an array of n cascaded 2-input multiplexer banks (104) and receives at an input (102) 2n-bit binary data words can be used not only for rotation but also for selective reversal, without the necessity of t...
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WO/2008/034213 |
A method for applying adaptive data compression in a relational database system using a filter cascade having at least one compression filter stage in the filter cascade. The method comprises applying a data filter associated with the co...
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WO/2008/022331 |
A multi-stage floating-point accumulator includes at least two stages and is capable of operating at higher speed. In one design, the floating-point accumulator includes first and second stages. The first stage includes three operand ali...
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WO/2008/022331 |
A multi-stage floating-point accumulator includes at least two stages and is capable of operating at higher speed. In one design, the floating-point accumulator includes first and second stages. The first stage includes three operand ali...
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WO/2008/001285 |
An asynchronous FIFO is provided that determines whether its buffer is primed with at least one data element during a data transfer across clock domains in order to eliminate metastability issues that cause data stalls and interruptions ...
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