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Patent Searching and Data


Matches 151 - 200 out of 735

Document Document Title
JP2002314383A
To reduce periodic signals in pseudo-random noise.This method includes a step for storing a set of digital values showing statistical characteristics selected by a memory (2) capable of designating an address with an n-bit address (a), a...  
JP3326619B2
A pulse width modulation circuit apparatus comprises delay gates, delay circuits and an A/D converter. The delay gates are connected in cascade fashion and delay an input clock signal by the same delay time with each delay gate. The dela...  
JP3308598B2
PURPOSE: To prevent the generation of the considerable change of DC voltage in an output terminal in a converter where the amplitude of an output signal depends on the size of current to be supplied. CONSTITUTION: An R-2R chain circuit n...  
JP2002515672A
A digital to synchro converter converts digital values to an analog synchro signal. The values are mapped in a memory and sent to a digital to analog converter converting the digital values to analog values. Sample and hold circuitry is ...  
JP3257110B2
PURPOSE: To enable calculating magnetic field accurately, easily and in a short time even for a complicated coil shape by dividing the coil surface into approximated polygons, especially triangles and integrating each area for surface el...  
JP2001523844A
A method for producing an electronic signature in a font format from a manual signature, comprising the steps of: (a) providing a raster image of the manual signature; (b) cleaning the raster image to remove noise, such that the raster i...  
JP3228799B2
PURPOSE: To simplify the constitution of a multiplication digital/analog conversion circuit applicable to the analog input signal current of either polarity. CONSTITUTION: In order to make this multiplication digital/analog conversion ci...  
JP3219880B2
PURPOSE: To provide a multiplication circuit which is capable of directly multiplying analog data and digital data without requiring A/D, D/A conversions. CONSTITUTION: This multiplication circuit M performs a control as to whether analo...  
JP3210740B2
PURPOSE: To obtain a next generation multilayer circuit board, and a module and electronic device employing the multilayer circuit board, for forming a multilayer thin film circuit having high density wiring while suppressing warp of boa...  
JP2001143011A
To realize calculation structure and technology not as a purely analog or purely digital hybrid composition but as an analog and digital hybrid composition. A hybrid state machine has an analog dynamic system 720 and a digital finite sta...  
JP2001034735A
To realize a DA converter which is highly integrated and highly accurate. This information processing includes a plurality of DA converters DAA1 which convert a plural-bit digital signal into an analog signal and output the analog signal...  
JP2000353946A
To provide a level shifter circuit for preventing the generation of through-currents to be generated when the potential of a circuit at an input side is not applied in the power-down and for realizing further low power consumption as for...  
JP3118547B2
As shown in Figure 1, a pulse generator comprises a digital oscillator (1) which produces a succession of numbers from which a periodic analogue waveform is produced. These numbers can represent a triangular waveform (TW) (or a sine wave...  
JP2000269436A
To provide a semiconductor device capable of reducing adverse influence of noise from a digital circuit driven by a high frequency, to an analog circuit driven at a low frequency. A first voltage VDD is supplied from a first terminal to ...  
JP3081957B2
A transferred data recovery apparatus capable of recovering transferred data from a transferred data signal has a first comparator for comparing transferred data signal with a reference level R to output binary-quantized data signal repr...  
JP3055739B2
A multiplication circuit for controlling an analog input voltage by the use of a switching signal created by a digital voltage so as to either generate an analog output or to cut-off the output. A digital input signal having a plural num...  
JP3023434B2
PURPOSE: To obtain a circuit in which variable level adjustment is executed with high accuracy and the effect of offset is cancelled by executing multiplication based on the ratio of an input capacitance to a 1st stage feedback capacitan...  
JPH11355101A
To reduce the circuit scale of a filter by holding analog data corresponding to a filter characteristic, executing a product-sum operation with digital data on analog data making the number of bits on the filter characteristic to be larg...  
JPH11338955A
To reduce the circuit-technical cost at the time of arithmetic coupling of an analog signal and a digital signal by providing a controllable polarity switching element which allows the analog signal to pass with the changed or unchanged ...  
JP2985997B2  
JP2985996B2
A multiplication circuit for directly multiplying analog and digital data without converting the analog data into digital data or the digital data into analog data. The multiplication circuit controls an analog input voltage by the use o...  
JPH11296614A
To improve the accuracy of a calculated correlation value in a correlation circuit for calculating the correlation value of an analog signal value and a digital signal value. In this correlation circuit, a multiplication circuit 1 multip...  
JPH11259454A
To provide a Fourier transformation device capable of highly precisely executing an arithmetic processing at high speed, reduced in the number of operation times and low in power consumption. A since/cosine wave signal generation part 1 ...  
JP2933112B2
PURPOSE: To provide the multiplying circuit which can execute multiplication of a small scale and high accuracy, and also, can execute highly accurate analog-to-digital multiplication. CONSTITUTION: By setting a digital input voltage as ...  
JPH11134422A
To provide a correlator which satisfies both the improvement of arithmetic precision and the reduction of power consumption at the same time even when a fast operation speed is required for a prolonged binary code system. In a correlator...  
JP2868640B2
A signal processing apparatus using a neural network according to this invention includes a reference signal generating section for generating a plurality of reference signals having different signal values, a complement signal generatin...  
JPH10332450A
To provide a flow rate calculation circuit for an open type channel that unnecessitates adjustment by a variable resistor, and that can stably obtain the flow rate of the open type channel. A switch 4 outputs either a flow rate signal V4...  
JP2823913B2
A method and apparatus for reducing spurious output noise in digital frequency synthesizers employing sine amplitude converters connected to Digital-to-Analog converters to generate analog waveforms from sine amplitude data. Random or ps...  
JP2812132B2  
JP2809643B2
A maximum-likelihood sequence estimator receiver includes a matched filter (56) connected to a digital transmission channel (58) and a sampler (60) for providing sampled signals output by the matched filter (56). The sampled signals are ...  
JP2798504B2  
JP2795545B2
A noise generating device is provided which includes a pseudo-random number generator having a shift register that performs shift operations to sequentially shift the bit in the input stage to the next higher significant stage and an exc...  
JPH10154195A
To obtain the same accuracy as before in a simple circuit structure. This multiplier has a master clock means 1 which creates a synchronous clock that transmits and receives data, a frequency dividing means 2 which divides a clock of the...  
JPH10124606A
To attain the product-sum operation of digital multipliers corresponding to plural analog voltage values by the comparatively small number of capacitance elements by adding bits corresponding to the multipliers of plural data and then we...  
JPH1078994A
To perform the product-sum operations of digital multipliers against plural analog voltage levels via a comparatively small number of capacitance by performing first the addition in each corresponding bit of multipliers of plural data an...  
JPH1051309A
To provide a D/A conversion system and its method in which single or lots of digital data input streams are processed independently of sampling speed applied to each digital data input stream by using a minimum hardware configuration. Th...  
JPH1031665A
To provide a self-correlation coefficient computing element with which the sum of products is speedily operated with low power through the encoding technique of audio signals, etc., in order to operate a self-correlation coefficient. An ...  
JPH09321625A
To reduce an integrated error by averaging received data and preceding received data for each arithmetic period. An analog signal is sampled for each arithmetic period and the sampled signal is A/D-converted. Every time an arithmetic per...  
JPH09265635A
To provide an optical disk device capable of stably setting a final target speed and shortening a time required for moving to a target track. After a target speed just before a target track becomes a higher prescribed value than a final ...  
JPH09259205A
To execute a product sum operation at a high speed with less hardware amount. Analog voltages Xi respectively corresponding to the respective elements of a first input data string are inputted through input terminals 11-1n to capacitance...  
JPH09153801A
To prevent the sampling processing of an analog circuit from being affected by pulse noise generated in a digital circuit in digital/analog IC. This circuit is divided into a digital circuit which does not contain a sampling pulse genera...  
JPH09153802A
To prevent the sampling processing of an analog circuit from being affected by pulse noise generated in a digital circuit in digital/analog IC. Timing signals generated in the sampling timing generation part 12 of the digital circuit 11 ...  
JP2617425B2
PURPOSE: To provide the multiplier using the electric charge transfer element of miniaturized circuit configuration by composing the multiplier of a potential well arranged in the shape of a ring and an electric charge signal accumulator...  
JP2607538B2
A binary digital full adder as a component element of a digital circuit receives three binary signals including two input signals and a carry-in from the lower digit. The adder comprises a four-state logic converter for adding together t...  
JP2607301B2  
JP2603110B2  
JPH0944582A
To actualize a sample holding function and a weighted addition function with a circuit which is smaller in scale than before by connecting a capacitive coupling to plural switches which are connected to only an input voltage and both hol...  
JPH08335880A
To provide a high-speed processable secondary digital/analog converter(DACQ) which does not increase current consumption but rather decreases current consumption. A DACQ composed of a pair of serially connected 1st and 2nd linear convert...  
JP2563090B2
PURPOSE: To perform the arithmetic operation of a new concept unlike before that moves an arithmetic function without moving data by associatively controlling plural adjacent charge transfer elements on a circuit and performing a necessa...  
JP2534125B2  

Matches 151 - 200 out of 735