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Patent Searching and Data


Matches 451 - 500 out of 853,453

Document Document Title
WO/2017/136847A1
Multiple video recordings may be synchronized using audio features of the recordings. A synchronization process may compare energy tracks of each recording within a multi-resolution framework to correlate audio features of one recording ...  
WO/2017/133084A1
A shift register unit, a shift register, a gate drive circuit and a display device. The shift register unit is provided with a current-stage output node Out(n), a pull-up node (PU) and a pull-down node (PD). The shift register unit compr...  
WO/2017/135605A1
The present application relates to a memory chip in which a power voltage is independently supplied to a memory cell array and a peripheral circuit, a memory device and a memory system comprising the same device. A memory device accordin...  
WO/2017/133100A1
An emission electrode scanning driving unit, comprising: a shift register unit having an initial signal input end, a first clock signal input end and a scanning signal output end; and a plurality of scanning driving signal generation uni...  
WO/2017/133026A1
The present invention relates to the technical field of integrated circuits. Disclosed is a one-time programmable memory with a high reliability and a low reading voltage, comprising: a first MOS transistor (1), a second MOS transistor (...  
WO/2017/136203A1
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A first ferroelectric memory cell may be initialized to a first state and a second ferroelectric memory cell may be initialized to a differen...  
WO/2017/133214A1
A method for driving a gate driving circuit, comprising in a first display sub-cycle controlling a first plurality of shift register units to operate normally for outputting, and controlling a second plurality of shift register units to ...  
WO/2017/135000A1
Provided are a device and method for enabling high-quality data playback in which crosstalk is eliminated, from a high-density recording-type optical disc. The present invention is provided with: a photodetector which outputs a read sign...  
WO/2017/128795A1
Disclosed are a shift register circuit, array substrate and display device. The shift register circuit comprises two or more drive modules arranged on an array substrate for performing partitioned driving in a direction substantially per...  
WO/2017/128854A1
A shift register and a driving method therefor, a drive circuit and a display device, the shift register comprising a pull-up unit (101), a pull-down unit (102) and an output unit (103), the pull-up unit (101) controlling the potential o...  
WO/2017/132691A1
A calibration system is provided including an aperture layer, a lens layer, an optical filter, a pixel layer and a regulator. The aperture layer defines a calibration aperture. The lens layer includes a calibration lens substantially axi...  
WO/2017/131632A1
In one example in accordance with the present disclosure a device is described. The device includes a cross-bar array of memristive elements. Each memristive element has a conductance value. The device also includes a column of offset el...  
WO/2017/131639A1
One example includes a system. The system includes an error injection system. The error injection system includes an error injector to store a programmable control structure to define a memory error. The error injector being further used...  
WO/2017/130814A1
A substrate processing method comprises: a liquid film forming step of forming a liquid film of processing liquid on an upper surface of a substrate to a thickness greater than a height of a pattern; a discharge opening arranging step of...  
WO/2017/128637A1
A mobile hard disk, comprising a hard disk housing (1), a liner (2), and a pull-out flexible plastic piece (3) arranged between the hard disk housing (1) and the liner (2), the pull-out flexible plastic piece (3) partially covering the l...  
WO/2017/128771A1
A gate driving circuit, a driving method and a display apparatus, which alleviate or relieve a display anomaly of a display device caused by a leaked current and improve the display effect. The gate driving circuit comprises a first driv...  
WO/2017/131651A1
In one example in accordance with the present disclosure a memristive array is described. The array includes a number of memristive devices. A memristive device is switchable between states and is to store information. The memristive arr...  
WO/2017/131628A1
In one example in accordance with the present disclosure a memristive bit cell is described. The memristive bit cell includes a memristive device switchable between states. The memristive device is to store information. The memristive bi...  
WO/2017/128327A1
A method for stopping music, and a mobile terminal. The method comprises the following steps: receiving heart rate data of a user sent by a smart wristband (S101); determining whether the user is in a sleep state according to the heart r...  
WO/2017/132389A1
To provide enhanced operation of data storage devices and systems, various systems and apparatuses are provided herein. In a first example, a data storage assembly includes an enclosure configured to house at least one data storage devic...  
WO/2017/130082A1
A memory in which a write cycle time is longer than time for one clock cycle can be mounted on a processor. The processor includes a processor core, a bus, and a memory section. The memory section includes a first memory. A cell array of...  
WO/2017/131700A1
Addresses of memory cells that have errors corrected by error correction operations are evaluated to identify a failed row of memory. A post package repair is implemented on the failed row with a method comprising obtaining indications o...  
WO/2017/130810A1
In this recorded data processing method, a terminal device capable of communicating with an editing device which generates, from a plurality of sets of source data, content including a plurality of videos that are synchronized with one a...  
WO/2017/131653A1
Example implementations of the present disclosure relate to in situ transposition of the data values in a memory array. An example system may include a non-volatile memory (NVM) array, including a plurality of NVM elements, usable in per...  
WO/2017/131941A1
A memory and a method to operate the memory are provided. The memory includes a plurality of memory cells and a wordline driver configured to output a wordline. The memory cells are coupled to the wordline. A control circuit is configure...  
WO/2017/131584A1
Various embodiments may provide a memory cell including a magnetic pinned layer with a substantially fixed magnetization direction, a crystalline spacer layer in contact with the magnetic pinned layer, and a magnetic storage layer. The m...  
WO/2017/131636A1
Methods and apparatus to store fault data and/or status data associated with an integrated circuit (100) into a memristor system (106) are disclosed. An example method includes determining when a fault corresponding to an integrated circ...  
WO/2017/126014A1
The purposes of the present invention are: to provide a layered semiconductor device which is capable of improving production yield; and to provide a method for producing said layered semiconductor device. This layered semiconductor devi...  
WO/2017/125981A1
This magnetic recording medium is provided with a long base body and a magnetic layer containing powder of magnetic cubic ferrite particles. The sum of the squareness ratio in the longitudinal direction and the squareness ratio in the ve...  
WO/2017/125242A8
According to a method for cleaning a disc record having a groove area, the disc record is held relative to a megasonic transducer (10) to form a gap (13) between at least a portion of the groove area and the megasonic transducer (10), th...  
WO/2017/127070A1
An example consistent with the present disclosure includes a cage to house a storage device. The cage can be mounted within the server, and the cage can include a cage enclosure. The cage enclosure can include cage columns and side cage ...  
WO/2017/127222A1
Apparatuses and methods for multi-level communication architectures are disclosed herein. An example apparatus may include a driver circuit configured to convert a plurality of bitstreams into a plurality of multilevel signals. A count o...  
WO/2017/126544A1
The purpose of the present invention is to increase the efficiency with which silicon on a chip is used, and to easily reduce the size of a logic cell. To accomplish the purpose, this reconfigurable circuit includes: a logic memory unit ...  
WO/2017/126330A1
The present technology relates to a recording adjustment device, a recording adjustment method, and a program whereby it is possible to compensate for recording to an optical disc having a high linear density. A recording adjustment devi...  
WO/2017/124237A1
Provided in an embodiment of the present invention is a memory device, the memory device comprising an RRAM crossbar array used to perform a logic operation. A resistance value of a resistor in the RRAM crossbar array is configured as Ro...  
WO/2017/127046A1
Example drive cage panels for drive cages are disclosed. For example, a drive cage panel for a drive cage may include a plurality of air inlet holes in a front face of the drive cage panel, a plurality of air guides through a surface of ...  
WO/2017/127048A1
Example support devices for an electromagnetic interference shield of a drive carrier are disclosed. For example, a support device may include a first bar to extend parallel to a length of a bezel of the drive carrier and a second bar pa...  
WO/2017/126291A1
The purposes of the present invention are: to provide a layered semiconductor device capable of improving production yield; and to provide a method for producing said layered semiconductor device. This layered semiconductor device has, l...  
WO/2017/124731A1
The present invention relates to the field of display, and discloses a shift register, drive method thereof, GOA circuit, and display device to solve non-uniformity of display caused by an insufficient gate signal output in a large-sized...  
WO/2017/127104A1
Techniques for injecting a delay to simulate latency are provided. In one aspect, it may be determined that a current epoch should end. A delay may be injected. The delay may simulate the latency of non-volatile memory access during the ...  
WO/2017/127086A1
A circuit includes an engine to compute analog multiplication results between vectors of a sub-matrix. An analog to digital converter (ADC) generates a digital value for the analog multiplication results computed by the engine. A shifter...  
WO/2017/127193A1
A static random access memory is provided in which the word line assertion during a write operation is delayed until the discharge of a dummy bit line is detected.  
WO/2017/124873A1
An operation method of a resistive random access memory and a resistive random access memory device. The method comprises the following steps: applying an initial reset voltage to a memory cell in a resistive random access memory array; ...  
WO/2017/125242A1
According to a method for cleaning a disc record having a groove area, the disc record is held relative to a megasonic transducer (10) to form a gap (13) between at least a portion of the groove area and the megasonic transducer (10), th...  
WO/2017/124721A1
A shift register, gate drive circuit, and display device. The shift register comprises: an input module (1), a first reset module (2), a first control module (3), a second control module (4), a node voltage control module (5), and an out...  
WO/2017/126451A1
The purpose of the present invention is to provide a logic integrated circuit that increases the reliability of configurative information held in a switch while maintaining high damper resistance and a small chip area. This logic integra...  
WO/2017/122575A1
The purpose of the present invention is to provide a vertical magnetic recording medium which uses an Ru seed layer having a (002)-oriented hcp structure, and has a magnetic recording layer containing a (001)-oriented L10-type ordered al...  
WO/2017/121947A1
The invention relates to a directional magnetic field generator with a magnetic circuit comprising: a first vertical-axis pole end (37) arranged above a horizontal plane; and at least two second pole ends (28A to 28D) symmetrically arran...  
WO/2017/122247A1
A magnetic recording medium of the present invention is provided with a base body, a recording layer, and a layer, which is provided between the base body and the recording layer, and which contains a super elastic material.  
WO/2017/121176A1
A shifting register and a driving method therefor, a gate driving circuit and a display device. The shifting register comprises: a pre-charge module (1) connected to a pull-up node (PU), the pre-charge module (1) charges the pull-up node...  

Matches 451 - 500 out of 853,453