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WO/2023/107285A1 |
A multi-domain masked AND gate includes inner-domain calculations, re-sharing, register stage, cross-domain calculations, and compression. The inner-domain multiplication and the re-sharing are calculated prior to storing the re-shared v...
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WO/2023/103358A1 |
The present application provides a programming apparatus and method, and a novel memory. The programming apparatus comprises a programming control unit and a programming unit; the programming control unit is configured to respond to a co...
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WO/2023/107784A1 |
A method comprises receiving a read instruction and determining a read address in computer memory corresponding to the read instruction, where the read address references a cell within a row of read-destructive computer memory. The metho...
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WO/2023/107313A1 |
A read clock circuit selectively provides a read clock signal from a memory to a memory controller over a memory bus. A pulse-amplitude modulation (PAM) driver including an input and an output capable of driving at least three levels ind...
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WO/2023/102779A1 |
The present application relates to the technical field of computer storage, and discloses a memory, a memory test method, and an electronic device. The memory comprises a storage circuit and a test circuit, storage units for storing data...
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WO/2023/107311A1 |
A memory includes a read clock circuit and a mode register. The read clock circuit has an output for providing a hybrid read clock signal in response to a clock signal and a read clock mode signal. The mode register provides the read clo...
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WO/2023/104008A1 |
A data error correction method and device, a memory controller, and a system. In the present application, when needing to read target data in a memory, a memory controller reads the target data and a first verification code of the target...
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WO/2023/105376A1 |
A system and method for performing a low overhead refresh management of a memory device. The method includes receiving, by a controller from a dynamic random access memory (DRAM) device via a feedback interface, a signal indicative of an...
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WO/2023/103148A1 |
An address refresh circuit (10), a method, a memory, and an electronic device. The address refresh circuit (10) comprises a selector circuit (101) and a decoding circuit (102); the selector circuit (101) is used for acquiring a gating si...
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WO/2023/104735A1 |
The present description relates to a device (100) for testing a resistive-memory cell (10), comprising: - a conductive element (108) suitable for connecting the cell to the device; - a generator (102) of signals for writing to and readin...
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WO/2023/104737A1 |
The present invention relates to a system (200) for testing a variable resistance memory, suitable for implementing at least one test phase from the following test regimes: - quasi-static test regime; - pulse test regime, including an er...
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WO/2023/104733A1 |
The present invention relates to a magnetic field generation system (200) comprising: - a central pole (220) positioned above a plane (XY), the axis of said central pole extending in a direction orthogonal to the plane; - at least two pl...
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WO/2023/104011A1 |
The present application belongs to the technical field of data processing. Disclosed are a storage medium, a storage element, a storage medium configuration method and a data transmission method. For the storage medium, the storage mediu...
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WO/2023/104550A1 |
Embodiments of the present dislcosure include a phase change memory (PCM) array (102). The PCM array includes a plurality of PCM cells (104a, 104b). Each PCM cell in the plurality of PCM cells include a top electrode (122a, 122b), a resi...
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WO/2023/103183A1 |
Provided in the present invention are a switch device and a memory. The switch device comprises a lower electrode, an upper electrode and a switch material layer sandwiched between the lower electrode and the upper electrode, wherein the...
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WO/2023/102760A1 |
A method for analyzing integrated circuits, includes: performing a first resistor capacitor (RC) extraction process on a power-receiving circuit and producing a first RC model; scanning a netlist of a power distribution network, the powe...
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WO/2023/103555A1 |
A stacked phase change memory structure having a cross-point architecture is provided. The stacked phase change memory structure includes at least two phase change material element-containing structures (MS1, MS2) stacked one atop the ot...
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WO/2023/107769A1 |
In accordance with an embodiment, a circuit includes a plurality of comparators disposed on an integrated circuit, the plurality of comparators having inputs coupled to a monitored power supply line; and a voting circuit having inputs co...
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WO/2023/107392A1 |
In some embodiments, a memory device implements a tile-based architecture including an arrangement of independently and concurrently operable arrays or tiles of memory transistors where each tile includes memory transistors that are arra...
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WO/2023/106105A1 |
A semiconductor memory device (100) is provided with: a plurality of memory cells (112); a first power supply line (VDD); a second power supply line (VDDMC); a first transistor (T01) and a second transistor (T02) connected in parallel be...
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WO/2023/107304A1 |
A memory includes a read clock state machine and a read clock driver circuit. The read clock state machine has a first input for receiving a read command signal, a second input for receiving a read clock mode signal, and an output for pr...
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WO/2023/105604A1 |
This memory device is provided with a page formed from multiple memory cells arranged in columns on a substrate, and carries out: a page write operation for holding a hole group, which is formed by an impact-ionization phenomenon, inside...
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WO/2023/107390A1 |
A memory system including a memory device of storage transistors organized in multiple memory banks where the memory device interacts with a controller device to perform read and write operations. In some embodiments, the controller devi...
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WO/2023/107310A1 |
A memory controller monitors memory command selected for dispatch to the memory and sends commands controlling a read clock state. A memory includes a read clock circuit and a mode register. The read clock circuit has an output for provi...
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WO/2023/107218A1 |
A high-bandwidth dual-inline memory module (HB-DIMM) includes a plurality of memory chips, a plurality of data buffer chips, and a register clock driver (RCD) circuit. The data buffer chips are coupled to respective sets of the memory ch...
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WO/2023/102785A1 |
Embodiments of the present application provide a memory and a memory manufacturing method. The memory comprises a write word line, a write bit line, a read word line, a read bit line, and a storage unit; the storage unit comprises a writ...
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WO/2023/106434A1 |
Provided is a method for correcting a memory error of a dynamic random-access memory module (DRAM) by using a double data rate (DDR) interface. The method comprises the steps of: performing a memory transaction including multiple bursts ...
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WO/2023/100874A1 |
Provided is a magnetic-tape cartridge group containing a plurality of magnetic tape cartridges. A magnetic tape included in the magnetic tape cartridges contains a polyethylene-naphthalate support element having a widthwise Young's modul...
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WO/2023/101791A1 |
Disclosed herein are systems and methods for self-isolation of power-management integrated circuits (PMICs) of memory modules under and in response to fault conditions. In an embodiment, a PMIC is operably engaged with a memory module th...
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WO/2023/100870A1 |
Provided is a magnetic tape housing body which includes a winding core on which a magnetic tape is wound. In this invention, the magnetic tape has a non-magnetic support and a magnetic layer containing a ferromagnetic powder, wherein the...
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WO/2023/100879A1 |
Provided is a magnetic tape having a non-magnetic support and a magnetic layer containing a ferromagnetic powder. The non-magnetic support is a polyethylene naphthalate support that has a Young's modulus of at least 10,000 MPa in the wid...
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WO/2023/100878A1 |
Provided is a magnetic tape which includes a non-magnetic support and a magnetic layer containing ferromagnetic powder. In this invention, the non-magnetic support is a polyethylene naphthalate support having a Young's modulus of 10,000 ...
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WO/2023/100872A1 |
Provided are: a magnetic tape cartridge in which a magnetic tape is accommodated; and a magnetic recording/playback device including the magnetic tape cartridge. The magnetic tape includes a polyethylene naphthalate support having a Youn...
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WO/2023/097512A1 |
Embodiments of the present application relate to the technical field of storage, and provide a content addressable memory and a related method thereof, and an electronic device, for use in improving the storage density and reducing the a...
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WO/2023/100884A1 |
Provided is magnetic tape for which, in an environment that has a 23°C temperature and 50% relative humidity, an Alfesil wear value 45° of a magnetic-layer surface, measured at an Alfesil-prism inclination angle of 45°, is between 20 ...
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WO/2023/100893A1 |
A glass substrate for a magnetic recording medium according to the present invention is characterized by having an average linear thermal expansion coefficient in the temperature range of 30-380°C which is 30×10-7/°C-40×10-7/°C, a Y...
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WO/2023/100875A1 |
Provided is a magnetic tape cartridge group including a plurality of magnetic tape cartridges. The magnetic tape contained in the magnetic tape cartridges includes a polyethylene naphthalate support having a Young's modulus of 10000 MPa ...
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WO/2023/098082A1 |
Upon determining that a first read operation on one memory cell of a plurality of memory cells has failed, a second read operation on the memory cell is started. In the second read operation, a second pass voltage is applied to first uns...
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WO/2023/100877A1 |
A magnetic tape cartridge in which a magnetic tape is accommodated and a magnetic recording/reproducing device which includes the magnetic tape cartridge are provided. In this invention, each magnetic tape exhibits a magnetic tape deform...
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WO/2023/100880A1 |
Provided is a magnetic tape device. An angle θ formed by an axis of an element array of a magnetic head with respect to the width direction of a magnetic tape is changed during running of the magnetic tape in the magnetic tape device. T...
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WO/2023/100188A1 |
Methods of storing information in a living organism are provided. Systems and computer program products for performing the methods are also provided.
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WO/2023/097477A1 |
A shift register unit, a gate driving circuit and a display apparatus, which belong to the technical field of display, and can solve the problem of a leakage current easily being generated due to an unstable threshold voltage of a thin-f...
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WO/2023/099887A1 |
A magnetic medium (1) is described which includes a thin film magnet structure (2) formed of a ferromagnetic alloy or compound. The thin film magnet structure (2) includes one or more ferromagnetic domains and is coupled to one or more o...
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WO/2023/100490A1 |
A computation device according to one embodiment of the present disclosure comprises a memory cell array including a plurality of memory cells that each comprise: a first inverter having a first input unit and a first output unit; a seco...
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WO/2023/102310A1 |
A hybrid memory system with improved bandwidth is disclosed. In one aspect, a memory system is provided that increases bandwidth relative to the JEDEC low-power double data rate version 5 (LPDDR5) standard. This improvement is made possi...
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WO/2023/098028A1 |
An external flash adaptive method and apparatus, and a device and a medium. The method comprises: determining a test voltage on the basis of the working voltage range of a known external flash (S102); operating a target external flash un...
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WO/2023/101097A1 |
The present invention relates to a memory device, which dynamically switches error correction and error detection so that error correction and error detection can be selected according to circumstances. The present invention comprises: a...
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WO/2023/097528A1 |
Provided in embodiments of the present application are a ferroelectric memory, a data reading method, and an electronic device, enabling a reading voltage window of the ferroelectric memory to be amplified. The ferroelectric memory compr...
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WO/2023/100881A1 |
Provided is a magnetic tape device. While the magnetic tape is running in the magnetic tape device, an angle θ formed by an axis line of an element array of a magnetic head with respect to the width direction of the magnetic tape is cha...
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WO/2023/099879A1 |
A media player system comprising a media player and a media device for connecting to a media player. The media device comprises a casing, a media player connecting portion located on the casing for connecting to the media player, and a m...
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