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Patent Searching and Data


Matches 51 - 100 out of 857,845

Document Document Title
WO/2019/133074A1
Steering logic circuitry includes bit-flipping logic that determines a first neighboring redundant word line adjacent to a redundant word line of a memory bank, which also includes normal word lines. Redundant word lines include main wor...  
WO/2019/125368A1
An apparatus is provided which comprises: a magnetic junction; and an interconnect adjacent to the magnetic junction, wherein the interconnect comprises a super lattice of a neutral and charged perovskite.  
WO/2019/124057A1
The present invention adjusts magnetization intensity using a chopping current so as to record magnetic data from which a favorable reproduction waveform can be obtained. This card reader 1 is provided with a writing magnetic head 6A. A ...  
WO/2019/120587A1
An ADC (50) is disclosed. It comprises a plurality of sub ADCs (A1-AM) configured to operate in a time-interleaved manner and a sampling circuit (60) configured to receive an analog input signal of the ADC (50), wherein the sampling circ...  
WO/2019/120592A1
Method and apparatus for processing a digital image file, comprising providing a digital image including image data for a plurality of pixels; detecting an area within the digital image; recording an identification of the detected area i...  
WO/2019/125560A1
Systems, apparatuses, and methods for performing efficient memory accesses in a computing system are disclosed. In various embodiments, a computing system includes computing resources and a memory controller coupled to a memory device. T...  
WO/2019/125507A1
A method to adaptively and dynamically set a bias scheme of a crossbar array for a write operation includes: performing a read-before-write operation to determine a number of cells n to be written during a write operation; comparing n to...  
WO/2019/125525A1
Memory devices (10) coupled to host devices may receive clocking signals and data strobe signals (DQS) during write operations, which may present a skew. Memory specifications may include Write Preambles, preambles in the data signal pro...  
WO/2019/121574A1
A computer implemented method of producing an audio track comprises: receiving at an input of a computer interface a request for a track; generating responsive to the request a set of audio production settings; determining from the reque...  
WO/2019/099737A3
Access to a networked communication session is provided to each of a plurality of user computing devices that are each configured with at least a camera, audio input subsystem, and audio output subsystem. During the networked communicati...  
WO/2019/125782A1
One example includes a memory circuit. The circuit includes a memory array arranged as rows and columns of memory cells. An array portion stores a respective memory word in a given one of the rows in response to a word-write signal corre...  
WO/2019/126064A1
A non-volatile memory device and methods for operating the same are provided. The memory device may have multiple complementary memory cells. The method of blank check includes detecting a state value of each of the true and complementar...  
WO/2019/120991A1
Method for activating a feature of a chip(10) having an interface (20) comprising at least two power pins (GND, VCC). The method comprises the following steps: -the chip measures a series of voltage values between said power pins, -the c...  
WO/2019/125795A1
The present disclosure includes apparatuses and methods for material implication operations in memory. An example apparatus may include a plurality of memory cells coupled to a first access line and a plurality of second access lines, an...  
WO/2019/126746A1
Methods, systems, and devices related to auto-referenced memory cell read techniques are described. The auto-referenced read may encode user data to include a certain number bits having a first logic state prior to storing the user data ...  
WO/2019/125572A1
A lapping tool assembly includes a mount tool and an interposer structure interposed between actuators and the mount tool, where the interposer includes interposer pins reactively coupled with the actuators such that each interposer pin ...  
WO/2019/125779A1
The present disclosure includes apparatuses, methods, and systems for charge separation for memory sensing. An embodiment includes applying a sensing voltage to a memory cell, and determining a data state of the memory cell based, at lea...  
WO/2019/124287A1
An image recording method in an image processing apparatus, includes the steps of acquiring, from a plurality of cameras, respective video images which the plurality of cameras start capturing in the sea before a first light that is lit ...  
WO/2019/121150A1
An apparatus configured to: based on (i) captured spatial audio content of a scene comprising audio that is associated with information indicative of at least a direction in the scene from which said audio was captured; and (ii) visual f...  
WO/2019/125684A1
An apparatus is provided which comprises: an array of physically unclonable function (PUF) devices, wherein an individual device of the array comprises a magnetic junction and an interconnect, wherein the interconnect comprises a spin or...  
WO/2019/125568A1
Techniques for reducing a downshift in the threshold voltage of a select gate transistor of a memory device. Due to an electric field in a NAND string, holes can move in a charge-trapping layer from a dummy memory cell to a select gate t...  
WO/2019/125523A1
A device (10) includes a signal input to receive a data input as part of a bit stream. The device (10) also includes a reference input to receive a reference signal. The device (10) further includes push circuitry (228) to receive a firs...  
WO/2019/123068A1
A method includes writing a data set to a sequential access medium. The method also includes reading the data set immediately after being written to the sequential access medium in a read-while-write process to identify one or more fault...  
WO/2019/125365A1
An apparatus is provided which comprises: a magnetic junction having a magnet with a first magnetization; an interconnect adjacent to the magnetic junction, wherein the interconnect comprises a material exhibiting spin orbit coupling; an...  
WO/2019/125796A1
Systems, apparatuses, and methods related to subrow addressing for electronic memory and/or storage are described. Independent subrow addressing may enable energy consumed by performance of an operation on a particular subset of data val...  
WO/2019/123689A1
The present invention provides a compound lens that has excellent durability and is capable of suppressing a birefringence effect. A compound lens (1) includes a first lens (10) that has a first curved surface (12) and a first flat surfa...  
WO/2019/125948A1
Apparatuses and methods for duty cycle error correction of clock signals are disclosed. An example method includes detecting a clock period error between a first clock signal and a third clock signal and adjusting a timing of the first o...  
WO/2019/121577A1
A music composition system for composing music segments comprises: a computer interface comprising at least one external input for receiving from an external device a request for a musical composition; a controller configured to determin...  
WO/2019/125847A1
An example apparatus comprises a memory resource configured to store data and transmit data. The apparatus may further include a safety controller coupled to the memory resource configured to receive the data from the memory resource, re...  
WO/2019/125797A1
The present disclosure includes apparatuses, methods, and systems for current separation for memory sensing. An embodiment includes applying a sensing voltage to a memory cell having a ferroelectric material, and determining a data state...  
WO/2019/123076A1
A computer-implemented method includes: detecting a first error while accessing a magnetic tape, determining a first error location on the magnetic tape where the first error occurred, determining one or more areas on the magnetic tape t...  
WO/2019/125954A1
Large magnetic moment compositions are formed by stabilizing ternary or other alloys with a epitaxial control layer. Compositions that are unstable in bulk specimen are thus stabilized and exhibit magnetic moments that are greater that a...  
WO/2019/122152A1
A remote support communication system (100) is provided. The remote support communication system (100) comprises a user terminal unit (T1) and an operator terminal unit (T2). Said user terminal unit (T1) comprises a camera module (104) c...  
WO/2019/125861A1
Transpose non-volatile (NV) memory (NVM) bit cells and related data arrays configured for memory row and column, transpose access operations. A plurality of transpose NVM bit cells can be arranged in memory rows and columns in a transpos...  
WO/2019/126486A1
Devices and methods for programming resistive change elements using an electrical stimulus are disclosed. According to some aspects of the present disclosure the devices and methods program at least one resistive change element within at...  
WO/2019/122970A1
The present invention relates to a system, a removable memory device (11) and a method for selecting and making available for reading and reproducing, multimedia contents, wherein the user can instantly mark a multimedia content as favou...  
WO/2019/125524A1
Devices and methods include receiving write command at a command interface (14) of the semiconductor device (10) to write data to memory (12). An external data strobe (51, 52) is received at a data strobe (DQS) pin of the semiconductor d...  
WO/2019/125784A1
Sensing voltage based on supply voltage applied to an MRAM bit cell in a write operation can be used to detect completion of magnetic tunnel junction (MTJ) switching in an MRAM bit cell to terminate the write operation to reduce power an...  
WO/2019/124356A1
Provided is a semiconductor device including a memory cell formed on a semiconductor substrate. The memory cell includes a first source region (7) and a first drain region (9) that are formed on the semiconductor substrate, and a first s...  
WO/2019/124003A1
The recording medium according to one embodiment of the present invention is provided with: a recording layer that contains a heat-sensitive color-developing composition and a photothermal conversion material which generates heat upon ab...  
WO/2019/126030A1
Systems and methods of configuring a fixed memory array of an integrated circuit with coefficients of one or more applications includes identifying a utilization constraint type of the fixed memory array from a plurality of distinct util...  
WO/2019/125364A1
An apparatus comprises: a magnetic junction including: a first structure comprising a magnet with a first PMA, the first structure has an anisotropy axis perpendicular to a plane of a device; a second structure comprising one of a dielec...  
WO/2019/125384A1
An apparatus comprising: a magnetic junction having a structure comprising an unpinned magnet; a structure comprising an insulative or semi-insulative magnet, the structure being adjacent to the magnet junction; and an interconnect adjac...  
WO/2019/125571A1
A lapping mount tool and a process for lapping a row of head sliders involves affixing the row to a lapping mount tool fixture, actuating each of multiple first actuation pins to set each head slider for lapping to a respective element t...  
WO/2019/119514A1
A storage control apparatus (99) based on a multi-microprocessor framework, comprising a main unit end interface unit (300), a plurality of memory interface units (500), a main unit end microprocessor (400), and a plurality of storage en...  
WO/2019/125387A1
An apparatus is provided which comprises: a magnetic junction including: a first structure comprising a magnet with unfixed perpendicular magnetic anisotropy (PMA) with respect to a plane of a device; a second structure comprising one of...  
WO/2019/117538A1
The present invention relates to a compound having a novel structure, a photopolymer composition comprising the compound as a dye, a hologram recording medium produced from the photopolymer composition, an optical element comprising the ...  
WO/2019/118207A1
Methods, systems, and devices related to a multi-level self-selecting memory device are described. A self-selecting memory cell may store one or more bits of data represented by different threshold voltages of the self-selecting memory c...  
WO/2019/118005A1
A device (10) including an equalizer (70, 244) that includes a first input (102) configured to receive an input signal (81), a second input (104) configured to receive a reference signal (83), and a third input configured to receive an a...  
WO/2019/118931A1
Three-dimensional vertical memory array cell structures and processes. In an exemplary embodiment, a 3D vertical memory array structure is formed by performing operations that include forming an array stack having alternating metal layer...  

Matches 51 - 100 out of 857,845