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Patent Searching and Data


Matches 51 - 100 out of 845,452

Document Document Title
WO/2017/058111A1
There is provided a method of error detection in a toggle electric field magnetic random access memory (TEF-RAM) device. The method includes performing a first read operation on a memory cell of the TEF-RAM device to obtain a first read ...  
WO/2017/058442A1
Methods and systems provide for coordinated control between multiple devices of playback of a media track or playlist. The multiple devices may form an ad-hoc network for sharing control of media. A control device may coordinate control ...  
WO/2017/058305A1
A device includes a memory device and a controller. The controller is configured to, responsive to determining that the memory device has a particular characteristic, increase the temperature of the first die by performing memory operati...  
WO/2017/052125A1
A method for operating a static random access memory (SRAM)-based ternary content addressable memory (TCAM) with increased number of bits comprises: a step of receiving input data; a step of dividing the input data into a plurality of su...  
WO/2017/052565A1
An embodiment includes a memory array comprising: a memory cell including a switch stack in series with a memory stack; and a bit line above the memory cell and a word line below the memory cell; wherein (a) first switch stack sidewalls ...  
WO/2017/052853A1
On-die termination (ODT) control enables programmable ODT latency settings. A memory device can couple to an associated memory controller via one or more buses shared by multiple memory devices organized ranks of memory. The memory contr...  
WO/2017/051063A1
A method and apparatus are disclosed for detecting a user selection of a positioning tag; retrieving directional information and timestamp information relating to the selected tag; comparing directional information relating to the select...  
WO/2017/053447A1
In an apparatus configured to perform signal processing on audio data of a first sampling rate, methods disclosed herein comprise receiving audio data of a second sampling rate, the second sampling rate being higher than the first sampli...  
WO/2017/052584A1
An embodiment includes a memory comprising: a top electrode and a bottom electrode; an oxygen exchange layer (OEL) between the top and bottom electrodes; a first oxide layer between the OEL and the bottom electrode; and a second oxide la...  
WO/2017/053530A1
Magnetic random-access memory (RAM) cells and arrays are described based on magnetoresistive thin-film structures.  
WO/2017/051064A1
A method and apparatus are disclosed for recording, at a recording apparatus, video content obtained from an array of cameras, wherein each camera records video content from a section of a recording area; receiving a wireless message fro...  
WO/2017/052904A1
Some embodiments include apparatuses and methods having non-volatile memory cells, a data line associated with a group of non-volatile memory cells of the non-volatile memory cells, a first transistor coupled to the data line and a node,...  
WO/2017/051487A1
Provided are an information acquisition apparatus, an information reproduction apparatus, an information acquisition method, an information reproduction method, an information acquisition program and an information reproduction program w...  
WO/2017/052700A1
In a nonvolatile memory block that contains separately-selectable sets of NAND strings, a bit line current sensing unit is configured to sense bit line current for a separately-selectable set of NAND strings of the block. A bit line volt...  
WO/2017/052892A1
Devices and methods for analog to digital conversion are provided. The device can have a supply voltage coupled to a bootstrap circuit operable to provide a boosted voltage during a first period defined by a sample phase (Ps) signal and ...  
WO/2017/051061A1
A method and apparatus are disclosed for recording, at a recording device, a media feed relating to a scene; receiving a series of wireless synchronisation messages at the recording device; recording a time stamp value with respect to ea...  
WO/2017/051176A1
Disclosed are methods, systems and devices for operation ofdualnon-volatile memory devices. In an embodiment,a pair of non-volatile memory device coupled in series may be placed in complementary memory states in a write operation by cont...  
WO/2017/053928A1
The present invention is directed to tactilated electronic music systems (TEMS) for sound generation. These novel electronic music systems are self- contained and computer-independent to afford full functional portability, and offer phys...  
WO/2017/052960A1
Technologies for clearing a page of memory include a memory device configured write a value to a block of memory cells in response to an activation signal. The memory device includes a row decoder responsive to a memory address to select...  
WO/2017/049866A1
A shift register unit and driving method, row scanning drive circuit, and display device, wherein the shift register unit comprises an input terminal (IN), a reset terminal (RESET) and an output terminal (OUT), and further comprises: an ...  
WO/2017/049799A1
An audio playback control method and device, relating to the technical field of multimedia. The method comprises: obtaining a playback instruction corresponding to a multimedia file, the multimedia file being an audio file or a video fil...  
WO/2017/051770A1
Provided is an abrasive material composition with which it is possible to not only achieve a high polishing rate without requiring the use of alumina particles but also obtain satisfactory surface smoothness and edge surface shape. The a...  
WO/2017/052862A1
A method of performing an operation on a non-volatile memory (NVM) cell of a memory device is disclosed. The pass transistor of the NVM cell is an asymmetric transistor including a source with a halo implant. The source of the pass trans...  
WO/2017/053460A1
Systems and methods are disclosed for programming data in non-volatile memory arrays. A data storage device includes a solid-state non-volatile memory including a plurality of memory cells and a controller configured to improve data rete...  
WO/2017/051152A1
A method for the display of an image in a display area, the method comprising: requesting, from a server, a scrambled image file using an image identifier, the scrambled image file containing the image in a scrambled form; receiving the ...  
WO/2017/052542A1
A two-transistor (2T), one magnetic tunnel junction (1MTJ), spin torque transfer (STT), spin Hall effect (SHE), magnetic random access memory (MRAM) may be configured to provide separate write current and read current paths. In such a co...  
WO/2017/052759A1
A volatile and one-time program (OTP) compatible asymmetric memory cell may include a first pull-up transistor having a first threshold voltage. The asymmetric memory cell may also include a second pull-up transistor having a second thre...  
WO/2017/052598A1
A crossbar array, comprises a plurality of row lines, a plurality of column lines intersecting the plurality of row lines at a plurality of intersections, a plurality of junctions coupled between the plurality of row lines and the plural...  
WO/2017/052835A1
Embodiments include a sense amplifier circuit including first and second paths that may be selectively coupled to a memory cell or a reference cell as part of a two-phase read process. The sense amplifier may include a biasing circuit to...  
WO/2017/051491A1
This optical pickup unit includes: an optical pickup having an optical pickup body and a base on which the optical pickup body is mounted; a first guide support provided on the base and slidably supporting a first guide part; and a secon...  
WO/2017/053032A1
A method, system and computer program product for improving the recording of classroom lectures or other such presentations. A video frame containing a whiteboard image is converted into a black and white image for the detection of bound...  
WO/2017/051175A1
Disclosed are methods, systems and devices for operation of dual non-volatile memory devices. In one embodiment, a pair of non-volatile memory device coupled in series may be placed in complementary memory states in write cycles by contr...  
WO/2017/053068A1
SRAM with a write assist circuit that responds to an indication that a write operation on a modeled memory cell is successful by releasing a negative bit line boost. The write assist circuit comprises a capacitance, of which one terminal...  
WO/2017/049844A1
A precharging circuit (1), a scanning driving circuit, an array substrate, and a display device. The precharging circuit (1) comprises an input end (IN) and an output end (OUT), and further comprises a switching unit (11), a first pull-u...  
WO/2017/048414A1
Systems, apparatuses and methods may provide for determining a magnitude of a bounce voltage on a source line associated with one or more memory cells and conducting, if the magnitude of the bounce voltage exceeds a threshold, a coarse-l...  
WO/2017/046967A1
The present invention makes it possible to perform highly integrated recording of information and read the information in a universal method while maintaining long-term durability. Digital data (D) to be stored is divided by a prescribed...  
WO/2017/048261A1
Techniques for memory store error checks are provided. In one aspect, a process running on a processor may execute an instruction to store a first value in memory. The processor may store a plurality of values, including the first value,...  
WO/2017/045380A1
A shift register unit, and driving method, gate driving circuit, and display device thereof. The shift register unit comprises an input unit (110), an output unit (120), a reset unit (130), a first control unit (140) and a second control...  
WO/2017/046671A1
Single ended bitline current sense amplifier for SRAM applications. The present disclosure relates to current sense read amplifier for use as a read amplifier in a memory arrangement of memory cell groups, wherein in each of the memory c...  
WO/2017/048030A1
A device and a method for playing a double sound source for three-stage vocal language learning are disclosed. The device comprises: a sound source database for respectively storing a vocal language sound source and a background sound so...  
WO/2017/048441A1
A memory subsystem enables satisfying refresh needs for a memory device with hidden refreshes performed by the memory device in response to Activate commands, and external refreshes to make up a difference between the number of hidden re...  
WO/2017/047272A1
This semiconductor storage device of the present disclosure is provided with: a block which has a plurality of pages; and a controller which controls writing, erasing and reading of data, wherein each page has a plurality of memory cells...  
WO/2017/048293A1
An example device in accordance with an aspect of the present disclosure includes a plurality of first sense circuits of a first type and at least one second sense circuit of a second type. The first sense circuits are to perform first-l...  
WO/2017/047737A1
In the present invention, a data storage medium is provided with a structure that has protrusions and recesses, said structure being in a storage region established on a first surface of a quartz glass substrate. The storage region inclu...  
WO/2017/047725A1
The same digital data is recorded at a high degree of integration on a plurality of media able to durably hold information over a prolonged period of time. A fine graphic pattern indicating data bit information is drawn and developed by ...  
WO/2017/046991A1
The present invention provides a perpendicular magnetic recording medium that contains a magnetic recording layer having a desired film thickness, while having an expected reduction in Tc and maintaining conventional magnetic properties....  
WO/2017/045720A1
The present invention relates generally to the field of semiconductor memories and in particular to memory cells comprising a static random access memory (SRAM) bitcell (100). Leakage current in the read path is reduced by connecting a r...  
WO/2017/045077A1
A system and method for capturing and recording audio suitable for subsequent reproduction in a 360 degree, virtual and augmented reality environment is described. It includes recording audio input from a plurality of audio sensors arran...  
WO/2017/048440A1
Aspects of a memory and method for accessing the memory are disclosed. The memory includes a plurality of memory cells configured to support a read and write operation in a memory cycle in a first mode and a write only operation in the m...  
WO/2017/046850A1
A semiconductor memory device according to an embodiment of the present invention includes: a memory cell array including memory cells connected to a bit line; and a control circuit for writing data, including a first stage and a second ...  

Matches 51 - 100 out of 845,452