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Patent Searching and Data


Matches 51 - 100 out of 861,271

Document Document Title
WO/2020/176251A1
Superconducting circuits and memories that use a magnetic Josephson junction (MJJ) device as a pi inverter are disclosed. The MJJ device includes superconducting layers configured to allow a flow of a supercurrent through the MJJ device....  
WO/2020/176312A1
Described is a low power, high-density non-volatile differential memory bit-cell. The transistors of the differential memory bit-cell can be planar or non-planer and can be fabricated in the frontend or backend of a die. A bit-cell of th...  
WO/2020/150142A3
The present disclosure is drawn to, among other things, a magnetoresistive memory. The magnetoresistive memory comprises a plurality of magnetoresistive memory devices, wherein each magnetoresistive memory device includes a fixed magneti...  
WO/2020/173229A1
A shift register unit (10) and a driving method therefor, a gate driving circuit (20), and a display device (30). The shift register unit (10) comprises a first input circuit (100), a second input circuit (200), an output circuit (300) a...  
WO/2020/174749A1
A record reproduction control device according to the invention is provided with: a video data acquisition unit 120 that acquires video data; an event detection unit 127 that detects an event for a vehicle; an event detection direction a...  
WO/2020/176795A1
A request to read data stored at a memory sub-system can be received. A determination can be made whether the data is stored at a cache of the memory sub-system. responsive to determining that the data is not stored at the cache of the m...  
WO/2020/176306A1
Built-in self-test (BIST) circuits and related methods are disclosed. An example BIST circuit (302) includes a state machine (340) to generate a control signal (366) to reduce a gate voltage (316) associated with a transistor (304) from ...  
WO/2020/168798A1
A shift register unit (200, SR1, SR2, SR3, SR4) and a driving method therefor, a gate driving circuit (1000,1210) and a driving method therefor (1100), and a display device (1200). The shift register unit (200, SR1, SR2, SR3, SR4) compri...  
WO/2020/172384A1
Disclosed is a memory device and method of operating the same. In one embodiment, a method is disclosed comprising generating compressed data by compressing raw data for storage in a memory device, pre-programming a first region of the m...  
WO/2020/172006A1
Methods, systems, and devices for source line configurations for a memory device are described. In some cases, a memory cell of the memory device may include a first transistor having a floating gate for storing a logic state of the memo...  
WO/2019/125796A8
Systems, apparatuses, and methods related to subrow addressing for electronic memory and/or storage are described. Independent subrow addressing may enable energy consumed by performance of an operation on a particular subset of data val...  
WO/2020/170067A1
Provided is a new semiconductor device. The semiconductor device includes a drive circuit and first to third transistor layers. The first transistor layer includes a first memory cell including a first transistor and a first capacitor. T...  
WO/2020/171776A1
It is common that in an audio system, there are multiple data rates that need to be synchronized. For example, a sending device has its own crystal or clock, and a receiving device has another. Typical solutions introduce a lot of latenc...  
WO/2020/168674A1
Disclosed is an operation method for improving the performance of a gate tube device. The method comprises: determining a direct-current operating voltage and a limiting current of a gate tube device; applying the operating voltage and t...  
WO/2020/170041A1
A solid-state drive (SSD) comprises densely packed memory cells that experience inter-cell interference (ICI) of voltage across memory cells. An ICI block decoder is trained to remove ICI from the voltage stored at memory cells when the ...  
WO/2020/170659A1
Provided is an editing system capable of performing time-shift playback or time-shift editing with a general-purpose playback apparatus or editing apparatus. An editing system X is provided with an accumulation server 1, a recording appa...  
WO/2020/172551A1
Apparatus and methods are disclosed, including memory devices and systems. Example memory devices, systems and methods include a buffer interface to translate high speed data interactions on a host interface side into slower, wider data ...  
WO/2020/171872A1
Techniques are described for reducing an injection type of program disturb in a memory device. A charge isolation region is created in a channel of a NAND string on the source side of the selected word line, WLn, and spaced apart from WL...  
WO/2020/172050A1
Methods, apparatus, systems and articles of manufacture are disclosed that improve performance while reading memory. An example method includes initializing an output (288) of a sensing circuit (218) to be a first logic high value, obtai...  
WO/2020/168478A1
A memory system includes a plurality of memory cells, and the memory cells are multiple-level cells. The memory system performs program operations to program the memory cells. After each program operation, at least one threshold voltage ...  
WO/2020/131495A3
Systems and methods are disclosed herein for continuing playback of a digital tutorial until a user interrupts the playback by signaling to the system that there is an issue or that the user needs help. In some embodiments, the system de...  
WO/2020/171901A1
A method and apparatus for annotating video is provided herein. During the process of annotating a video, important text within a form is identified. Annotations are placed within the video that are related to the important text within t...  
WO/2020/172052A1
Methods, apparatus, systems and articles of manufacture are disclosed to improve performance while reading a one-time programmable memory. An example apparatus includes: a voltage boost circuit (236) including a first output (215a), a se...  
WO/2020/168857A1
Provided are a shift register and a driving method therefor, a gate drive circuit, and a display apparatus. The shift register is arranged on a display panel, and a working process of the display panel comprises: a startup phase and a di...  
WO/2020/171871A1
Techniques are provided for optimizing an erase operation in a memory device to compensate for erase speed variations due to blocking oxide thinning. In an erase operation for a block, the channels of NAND strings in different sub-blocks...  
WO/2020/170224A1
A method for preventing read disturbance accumulation in a cache memory. The method includes accessing a plurality of data lines in a cache set, generating a plurality of corrected data from a plurality of initial data based on a plurali...  
WO/2020/086140A3
One example includes a memory cell system that includes a quantizing loop that conducts a quantizing current in a first direction corresponding to a first stored memory state and to conduct the quantizing current in a second direction co...  
WO/2020/172557A1
Apparatus and methods are disclosed, including memory devices and systems. Example memory devices, systems and methods include a buffer interface to translate high speed data interactions on a host interface side into slower, wider data ...  
WO/2020/165024A1
The invention relates to a matrix detector comprising: - a set of pixels arranged in a matrix according to lines (L) and columns, each pixel (P) being suitable for generating a signal depending on a physical phenomenon, - a signal genera...  
WO/2020/167809A1
Methods, systems, and devices for refresh rate management for a memory device are described. A memory device may receive refresh commands for a memory array (e.g., from a host device). The memory device may determine that a refresh rate ...  
WO/2020/166610A1
The present invention proposes a recording device and a recording method with which it is possible to easily record information even using a magnetic recording medium having high coercive force. With this recording device 10, light L1 is...  
WO/2020/166706A1
A tape-like magnetic recording medium according to the present invention is provided with: a base material; and a magnetic layer which is arranged on the base material and contains a magnetic powder. The magnetic powder contains magnetic...  
WO/2020/165685A1
The present invention provides a semiconductor device with which a multiply-accumulate operation can be carried out with low power consumption. Provided is a semiconductor device comprising a first and a second circuit. The first circu...  
WO/2020/167556A1
A system comprises a testing mode register, a set of pins, and a test access port controller. The test access port controller initiates a first testing mode by configuring the set of pins according to a first pin protocol. The test acces...  
WO/2020/167753A1
A circuit comprises a plurality of scan chains. The plurality of scan chains comprisies bidirectional scan cells. Each of the bidirectional scan cells comprises two serial input-output ports serving as either a serial data input port or ...  
WO/2020/167496A1
A memory device comprises a memory bank comprising a plurality of memory addresses. The memory device further comprises a first level dynamic redundancy register comprising data storage elements and a pipeline bank coupled to the memory ...  
WO/2020/166725A1
The present invention provides a low-power, high-performance device that is applicable to a sensor node, a sensor node using the same, an access controller, a data transfer method, and a processing method in a microcontroller. The device...  
WO/2020/166540A1
In order to reduce the possibility of occurrence of retraction of a cleaning member during cleaning of a magnetic head and the possibility of the cleaning member not being able to return to a retraction position due to stopping part way,...  
WO/2020/167865A1
First data comprising a first range of audio frequencies is received. The first range of audio frequencies corresponds to a predetermined cochlear region of a listener. Second data comprising a second range of audio frequencies is also r...  
WO/2020/167473A1
A current device readout system and a method for reading a current state of a current device are provided. The system includes a tunable resonator (16) having a resonant frequency that is associated with a current state of a current devi...  
WO/2020/167357A1
A first memory die includes an array of first memory stack structures and first bit lines. A second memory die includes an array of second memory stack structures and second bit lines electrically connected to a respective subset of the ...  
WO/2020/166701A1
The present invention provides a cobalt ferrite magnetic powder which contains magnetic particles that have uniaxial crystal magnetic anisotropy, while containing cobalt ferrite. With respect to this cobalt ferrite magnetic powder, the p...  
WO/2020/167817A1
Methods, systems, and devices for refresh rate control for a memory device are described. For example, a memory array of a memory device may be refreshed according to a first set of refresh parameters, such as a refresh rate. The memory ...  
WO/2020/166380A1
A sputtering target material comprises an alloy containing cobalt, iron, and boron, where the concentration of the boron is 20-60 at%. The sputtering target material further contains oxygen, where the concentration of the oxygen is 5,000...  
WO/2020/167549A1
An integrated-circuit memory component receives, as part of respective first and second memory read transactions, a first column access command that identifies a first volume of data and a second column read command that identifies a sec...  
WO/2020/166694A1
A production method for a hard disk board 10. The production method: makes it possible to achieve high-precision polishing by quickly selecting to change polishing conditions or replace a polishing pad on the basis of the flatness of the...  
WO/2020/167431A1
Apparatuses including input buffers and methods for operating input buffers are described. An example input buffer includes a plurality of input buffer circuits, each receiving input data and activated by a respective clock signal. An in...  
WO/2020/167460A1
A memory device includes a memory stack formed on a substrate to program skyrmions within at least one layer of the stack. The skyrmions represent logic states of the memory device. The memory stack further includes a top and bottom elec...  
WO/2020/162605A1
The present invention relates to alkali-free glass comprising, in mol% in terms of oxides, 63-75% SiO2, 10-16% Al2O3, 0-5% B2O3, 0.1-15% MgO, 0.1-12% CaO, 0-8% SrO, and 0-6% BaO, wherein the ratio [MgO]/[CaO] is 1.5 or less, formula (A) ...  
WO/2020/163018A1
A system for synchronizing media content playout includes a computing platform having a hardware processor and a system memory storing a software code. The hardware processor executes the software code to receive a first state message fr...  

Matches 51 - 100 out of 861,271