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WO/2023/100869A1 |
The present invention provides a magnetic tape having a non-magnetic support and a magnetic layer containing ferromagnetic powder. The amount of dimensional change Δw in the width direction in relation to a tension change in the longitu...
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WO/2023/099933A1 |
A method to perform data scrub operations by operating a memory device, the memory device comprising a main memory, an internal Error Correction Code (ECC) engine and a scrub memory. The method comprising: receiving a read command; acces...
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WO/2023/100871A1 |
Provided is a magnetic tape container that contains a core wound with a magnetic tape. The magnetic tape has a nonmagnetic support and a magnetic layer containing a ferromagnetic powder. The nonmagnetic support is a polyethylene naphthal...
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WO/2023/102447A1 |
Apparatuses including output drivers and methods for providing output data signals are described. An example apparatus includes a high logic level driver, a low logic level driver, and an intermediate logic level driver. The high logic l...
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WO/2023/098269A1 |
The present application discloses a solid-state drive processing method, system, and device, and a non-volatile readable storage medium. The method comprises: determining a target data page which is being processed when a target solid-st...
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WO/2023/101711A1 |
Various embodiments are disclosed for performing address fault detection in a memory system using a hierarchical ROM encoding system. In one embodiment, a hierarchical ROM encoding system comprises two levels of ROM encoders that are use...
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WO/2023/100882A1 |
Provided is a magnetic tape apparatus. While magnetic tape is traveling within the magnetic tape apparatus, the angle θ formed by the axis of an element array of a magnetic head relative to the width direction of the magnetic tape is ch...
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WO/2023/100883A1 |
Provided is a magnetic tape in which, in an environment of 32 °C in temperature and 80% in relative humidity, a frictional force F45° on a magnetic layer surface with respect to a LTO8 head measured at a head tilt angle of 45° is betw...
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WO/2023/098145A1 |
A memory device includes a memory cell array and peripheral circuits. The memory cell array may include one or more first memory cells configured to store first type data, and one or more second memory cells configured to store second ty...
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WO/2023/100480A1 |
This electronic control device comprises: a housing provided with a first boss and a second boss; a circuit board; a first heating component; a second heating component; a plurality of heat dissipation fins; and a fan. A first protrusion...
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WO/2023/100873A1 |
Provided are a magnetic tape cartridge in which a magnetic tape is accommodated, and a magnetic recording playback device including the magnetic tape cartridge. The magnetic tape includes a polyethylene naphthalate support having a Young...
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WO/2023/098063A1 |
An anti-fuse memory read circuit with a controllable read time, which relates to the field of anti-fuse memories. In the anti-fuse memory read circuit, a read time control circuit (200) generates a control signal corresponding to a read ...
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WO/2023/100876A1 |
Provided are a magnetic tape cartridge in which a magnetic tape is accommodated, and a magnetic recording playback device including the magnetic tape cartridge. For the magnetic tape, the maximum value of magnetic tape deformation amount...
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WO/2023/097049A1 |
An input signal is sampled at a current sampling phase by a sampler device of a receiver device. The sampled input signal is equalized by an adaptive equalizer of the receiver device. One or more parameters of the adaptive equalizer are ...
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WO/2023/096769A1 |
Various implementations provide systems and methods for reading data from memory bit cells. An example implementation includes a read circuit that provides a single-ended output from a sensing stage. The single-ended output is received b...
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WO/2023/093193A1 |
A resistance compensation apparatus and method for a storage chip, and a storage chip. A compensation resistor is gated by means of configuring a compensation circuit switch to be gated in synchronization with the reception of a bit cell...
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WO/2023/092186A1 |
The disclosure relates to a method and system for storing, sharing, rendering, and simulation of 3-dimensional digital data models so that the model cannot be copied or distributed or physically replicated and thus maintain the security ...
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WO/2023/093630A1 |
The present disclosure provides a shift register, comprising: a voltage control circuit coupled to an output control node; and at least one drive output circuit, wherein each drive output circuit comprises an output transistor and a capa...
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WO/2023/096259A1 |
Disclosed is a method for processing an audio signal, the method comprising the steps of: acquiring an audio signal; transmitting the acquired audio signal to an external electronic device; receiving, from the external electronic device,...
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WO/2023/095668A1 |
The present invention simplifies the structure of an electronic device. The electronic device includes a magnetoresistive effect memory, a memory control unit, and a processing unit. The magnetoresistive effect memory holds first data wh...
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WO/2023/092443A1 |
A display substrate and a display device. The display substrate comprises: a base substrate, which comprises a display area (A) and a peripheral area (B) surrounding the display area (A). A plurality of pixel units (PIX) arranged in an a...
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WO/2023/092280A1 |
The present application relates to the technical field of data storage. Provided are a memory, a storage apparatus, and an electronic device, which are used for reducing the area and the power consumption of a memory. The memory comprise...
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WO/2023/094234A1 |
A computer-implemented method for storing information into a polynucleotide is provided including using multiple types of nucleotide fragments, wherein each of the nucleotide fragments has an individually different sequence of bases, con...
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WO/2023/092290A1 |
The present application relates to the technical field of storage, and provides a read only memory circuit, a read only memory, and an electronic device. The read only memory circuit comprises a transistor array, a switch circuit, a plur...
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WO/2023/097054A1 |
Methods, systems, and storage video for enhancing region(s) of a subject's face in an augmented reality environment are provided. Exemplary implementations may include an AR face enhancing system that uses spatially-varying masks to enha...
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WO/2023/093095A1 |
The present disclosure relates to a sensing amplification circuit and a data readout method. The sensing amplification circuit comprises a first P-type transistor, which is connected to a first signal end; a second P-type transistor, whi...
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WO/2023/092381A1 |
Disclosed are methods and apparatus for vision-assisted data collection for machine learning (ML) based radio frequency (RF) sensing. An apparatus in a communication network may comprise at least one processor and at least one memory hav...
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WO/2023/095795A1 |
According to an embodiment, this memory system includes a nonvolatile memory that includes a plurality of memory cells, each of which is at least capable of storing a first bit, a second bit, and a third bit, and a memory controller that...
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WO/2023/093210A1 |
A method for providing backup power for a cache and a related device. The device comprises: a power supply module, a backup power module, and a controller. The controller is used for detecting the power supply condition of the power supp...
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WO/2023/097145A1 |
Methods, systems, and devices for modification of a command timing pattern are described. A host device may transmit (e.g., issue), to a memory device, a quantity of deselect commands between activation or data access commands to satisfy...
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WO/2023/091093A1 |
The present application relates to repeaters for memory arrays. In some embodiments, a plurality of repeaters may be coupled to a respective one of a plurality of memory cells. Each repeater may include: a first input node coupled to a f...
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WO/2023/087131A1 |
In certain aspects, a three-dimensional (3D) phase-change memory (PCM) device includes a first PCM cell, a first shrunken PCM cell on the first PCM cell, a second shrunken PCM cell on the first shrunken PCM cell, and a second PCM cell on...
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WO/2023/091172A1 |
Various examples of memory systems comprising an address fault detection system are disclosed. The memory system comprises a first memory array, a row decoder, and an address fault detection system comprising a second array, wherein the ...
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WO/2023/091184A1 |
In order to inhibit memory cells from programming and mitigate program disturb, the memory pre-charges channels of NAND strings connected to a common set of control lines by applying positive voltages to the control lines and applying vo...
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WO/2023/091862A1 |
Methods, systems, and devices for deck selection layouts in a memory device are described. In some implementations, a tile of a memory array may be associated with a level above a substrate, and may include a set of memory cells, a set o...
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WO/2023/090432A1 |
[Problem] To provide: a fluid dynamic bearing in which a lubricant composition comprising a base oil and an ionic fluid is filled; a spindle motor which is produced by incorporating the fluid dynamic bearing into a spindle motor, is prev...
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WO/2023/089957A1 |
This storage element is provided with: a first electrode; a resistance change layer which is formed on the first electrode and includes at least tellurium, antimony, and germanium, and the resistance value of which changes; a first bound...
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WO/2023/091683A1 |
Technologies for integrating DNA storage and DNA computing with blockchain technologies, specifically non-centralized ledgers and non-fungible tokens (NFTs). Some implementations of these technologies are systems and methods that store b...
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WO/2023/087533A1 |
A row hammer refresh method, a row hammer refresh circuit, and a semiconductor memory. The method comprises: determining a row hammer refresh instruction for a target word line (S101); according to the row hammer refresh instruction, set...
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WO/2023/087804A1 |
An embedded semiconductor random access memory structure, comprising: a hafnium-based ferroelectric memory unit, which is used for storing information; and a tunneling field-effect transistor, which is connected to the memory unit, where...
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WO/2023/090592A1 |
A weight transfer device for a neuromorphic element according to one aspect of the present invention comprises: memory in which a weight transfer program for the neuromorphic element is stored; and a processor for executing the weight tr...
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WO/2023/091130A1 |
This document describes techniques, methods, and apparatuses for logical memory repair. In some aspects, a memory built-in self-test (MBIST) controller (108) can perform logical memory repair for a memory cluster including a shared bus i...
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WO/2023/091860A1 |
A memory device may enforce compliance with a refresh command requirement in some examples. When a controller fails to comply with the refresh command requirement, the memory device may prevent the controller from accessing a memory arra...
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WO/2023/089440A1 |
Provided is a storage element provided with a new configuration. This storage element has a first electrode, a first insulating layer, a semiconductor layer, a second insulating layer, and a second electrode which are stacked, wherein th...
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WO/2023/087298A1 |
A shift register unit, a gate driving circuit and a display apparatus, which belong to the technical field of display, and can solve the problem of a leakage current being easily generated due to the fact that threshold voltages of thin-...
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WO/2023/091722A1 |
An example operation includes one or more of downloading an update of a non-volatile electrically erasable memory storage of a vehicle, determining whether the memory storage is arranged in one of a block of bytes of memory and an indivi...
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WO/2023/089778A1 |
A memory circuit that has: a plurality of memory groups that execute a write operation or a read operation in response to a request signal; a plurality of memory group control units that are provided corresponding to each of the pluralit...
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WO/2023/090623A1 |
According to an exemplary embodiment, a media file editing method may comprise the operations of: receiving modification information of a media file to be edited; identifying a first header including metadata and media data including at ...
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WO/2023/090831A1 |
According to various embodiments, a method for operating an electronic device may be provided, the method comprising operations of: identifying an input of a user with respect to at least one object; when a first condition by the identif...
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WO/2023/087267A1 |
The present application provides a data reading method, a controller, and a storage system, which can improve the reliability of reading data, thereby reducing the delay of reading data. The method is applied to a controller connected to...
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