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Matches 101 - 150 out of 851,183

Document Document Title
WO/2017/116852A1
A memory device comprises a first plurality of addressable memory locations associated with a first data storage window and a second plurality of addressable memory locations associated with a second data storage window. The memory devic...  
WO/2017/113019A1
A recompressed-sensing recording means, apparatus, device, or system captures one or more recordings, of possibly unknown or unbounded duration, into a finite memory, by resparsifying previously recorded sensor data in order to make room...  
WO/2017/115871A1
A process for forming an annular glass blank from a plate-shaped glass blank, wherein on a main surface of the plate-shaped glass blank: a first circular blade is turned along the main surface at a first turning radius to form an outside...  
WO/2017/116658A1
Multiple embodiments of a low power sense amplifier for use in a flash memory system are disclosed. In some embodiments, the loading on a sense amplifier can be adjusted by selectively attaching one or more bit lines to the sense amplifi...  
WO/2017/116763A2
A circuit and method for adaptive trimming of the reference signal for sensing data during a read operation of magnetic memory cells to improve read margin for the magnetic memory cells. The circuit has a trim one-time programmable memor...  
WO/2017/116529A1
Techniques are described that includes using a memory to store data within a system. The techniques include lowering a supply voltage applied to said memory and ceasing use of the memory to store data within the system. The techniques fu...  
WO/2017/115463A1
Provided is a music server which enables music data with high sound quality to be distributed. This music server is provided with: an optical disc drive for which operation characteristics are specified, and which reads music data from a...  
WO/2017/113984A1
A shift register unit and a drive method therefor, a gate drive circuit and a display apparatus. The shift register unit comprises: a first pull-up node control unit (11); a second pull-up node control unit (12), which controls the elect...  
WO/2017/114573A1
It is disclosed a method for controlling processing of multimedia content captured by a capturing device, the multimedia content being provided over a signal comprising a video signal or an audio signal. The method comprises: detecting i...  
WO/2017/113246A1
Two opposite end portions of a hard disk (20) are correspondingly inserted into mounting grooves (34) of two vibration absorbers (30). Outer walls of the vibration absorbers (30) press against an inner wall of a casing body (11). Assembl...  
WO/2017/113756A1
A solid-state disk storage module comprises a printed circuit board (1), an encapsulant member (2), and an electronic circuit (3) soldered to an inner surface of the printed circuit board (1) and having a data storage function. The encap...  
WO/2017/112347A1
A switching device, comprising a phase change material, a word line, a bit line coupled to the wordline across the phase change material; and circuitry configured to apply a word line read bias voltage to the wordline; uncouple the wordl...  
WO/2017/107555A1
A shift register unit, comprising a pull-up node (PU), a pull-down node (PD), a low level signal end (VGL), a second clock signal end (CKB) and a pull-down module (70). The second clock signal end (CKB) supplies a high level signal to th...  
WO/2017/110483A1
The present disclosure pertains to an information processing device, an information processing method, and a program which are capable of generating a stable PUF. The present invention is provided with: a reading unit that reads output d...  
WO/2017/110112A1
The purpose of the present invention is to provide a glass substrate for a magnetic recording medium wherein minor scratches are minimized between a main surface and an outer peripheral chamfered portion. Provided is a glass substrate fo...  
WO/2017/112219A1
Described is a signature accumulator with a first set of logic devices, a second set of logic devices, and a memory device. The first set of logic devices includes compaction logic that couples an N-bit input bus to a K-bit first interme...  
WO/2017/112229A1
Predictive memory maintenance in accordance with one aspect of the present description, can anticipate a failure of a selected primary memory die of an array, and pre-load a spare memory die with the data of the selected primary memory d...  
WO/2017/112034A1
Embodiments are generally directed to memory refresh operation with page open. An embodiment of a memory device includes a memory array including a plurality of memory banks; and a control logic to provide control operations for the memo...  
WO/2017/112348A1
Phase change memory devices, systems, and associated methods are provided and described. Such devices, systems, and methods manage and reduce voltage threshold drift of a phase change memory device comprising a select device SD and a pha...  
WO/2017/111930A1
Embodiments are directed to a resistive random access memory (RRAM) element that includes a top electrode; a bottom electrode; a dielectric material disposed between the top electrode and the bottom electrode; and a conductive filament i...  
WO/2017/109460A1
A configurable impeder is provided. The configurable impeder comprises multiple Correlated Electron Switches(CESs). Each of the CESs is capable of being configured into one of a plurality of impedance states. Further, a programing circui...  
WO/2017/110022A1
This beam intensity conversion optical system (3) is provided with a laser light source (4) and a beam intensity conversion lens (5) for converting the light intensity distribution of laser light rays (1) emitted from the laser light sou...  
WO/2017/109865A1
A data compression apparatus (10) predicts, using an external value e[i - m] at a position shifted by a position difference m from an external value e[i] at a target position i in an external data string e, a predicted value p[i] of an i...  
WO/2017/111887A1
An example memory device comprises at least one memory region; and a controller to determine exceeding of a throttling threshold and to throttle processing of access requests for the at least one memory region.  
WO/2017/112320A1
A memory device performs DLL (delay locked loop) calibration in accordance with a DLL calibration mode configured for the memory device. A host controller can configure the calibration mode based on operating conditions for the memory de...  
WO/2017/107428A1
Provided is a terminal device control method, apparatus and equipment, and a non-volatile computer storage medium. As it is not needed for audio modules corresponding to each audio source to carry out synchronous communication with audio...  
WO/2017/107430A1
Provided are a method, apparatus and device for controlling a terminal device, and a non-volatile computer storage medium. In a method for controlling a terminal device, original audio data of a second terminal device connected to a firs...  
WO/2017/111877A1
Described is an apparatus which comprises: a 4-state input magnet; a first spin channel region adjacent to the 4-state input magnet; a 4-state output magnet; a second spin channel region adjacent to the 4-state input and output magnets; ...  
WO/2017/109570A1
Methods, systems, and/or devices for overlaying and playing back audio data for user vocals and media content received from distinct devices and systems at a media presentation system are described herein. In one aspect, a media presenta...  
WO/2017/109457A1
According to one embodiment of the present disclosure, an apparatus is provided. The apparatus comprises a data input to receive a data signal. The apparatus further comprises a latching circuitry. The latching circuitry comprises a firs...  
WO/2017/112067A1
An apparatus for video summarization using sematic information is described herein. The apparatus includes a controller, a scoring mechanism, and a summarizer. The controller is to segment an incoming video stream into a plurality of act...  
WO/2017/111798A1
A high retention time memory element is described that has dual gate devices. In one example, the memory element has a write transistor with a metal gate having a source coupled to a write bit line, a gate coupled to a write line, and a ...  
WO/2017/107491A1
A method and device for playing audio relating to the technical field of terminals, the method comprising: acquire a first audio decoding parameter, the first audio decoding parameter being an audio decoding parameter of a third-party te...  
WO/2017/112817A1
Systems and methods for reducing residual electrons within a NAND string subsequent to performing a sensing operation using the NAND string or during the sensing operation. A middle-out programming sequence may be performed in which memo...  
WO/2017/112009A1
Techniques are provided for programming a three-dimensional memory device while minimizing over-programming and program disturb. When a selected word line is at the source-side of a set of word lines, a channel gradient is created in the...  
WO/2017/110109A1
The present invention relates to a glass substrate for a magnetic recording medium having a pair of main surfaces, an outer peripheral end surface, and an inner peripheral end surface and formed in a donut shape, wherein in a cross-secti...  
WO/2017/106960A1
Media content editing/production application running on a computing device provides a graphical user interface (GUI) for mixing media content. The application allows for a user of the computing device to select a start position within a ...  
WO/2017/111090A1
Provided is a piezoelectric thin film having a large d31 and g31. A piezoelectric thin film 3 is superposed on a single-crystal substrate 1. The piezoelectric thin film 3 includes a crystalline oxide represented by chemical formula 1. On...  
WO/2017/107255A1
A gate driver on array (GOA) circuit (30) for use in a liquid crystal display device (20). The liquid crystal display device (20) comprises multiple scanning lines (G(1)-G(6)); the GOA circuit (30) comprises multiple GOA units (40); the ...  
WO/2017/107160A1
A bad block identification processing and error correction method for a heterogeneous hybrid memory-based NVM. The method comprises: during a self-check process, executing: detecting data in each address unit in a block of an NVM; if the...  
WO/2017/104505A1
A memory cell (MC) in which, even if an impurity concentration in a fin portion (S2) is increased and a drain region (12a) and a source region (12b) are disposed proximate to each other on a surface of the fin portion (S2) in order to re...  
WO/2017/104280A1
A sample-hold circuit according to the present disclosure is provided with: a differential pair which includes a first MOS transistor and a second MOS transistor, the first MOS transistor and the second MOS transistor respectively having...  
WO/2017/100821A1
The present invention relates to a system comprising an entertainment media device (110), a control object (120) comprising an identifier detectable by the entertainment media device (110); and a storage device (e.g., 209, 225, 309, and ...  
WO/2017/101327A1
Provided are a method and device for collective playback of high-fidelity (hi-fi) sound by several players, which relate to the technical field of multimedia and solve the technical problem in the prior art of it being impossible for a p...  
WO/2017/104424A1
The problem to be resolved by the present invention is providing a photosensitive composition for volume hologram manufacturing used in manufacturing of a volume hologram having excellent diffraction efficiency and durability. The proble...  
WO/2017/103972A1
An electronic apparatus (300) is provided with: a shield case (1) configured from an electromagnetic shield sheet (1') folded in a box shape; an electronic circuit board (2) housed in the shield case (1); and a frame (4) formed of a plat...  
WO/2017/105611A1
An apparatus and method to permit reconfiguration of a memory topology. A printed circuit board (PCB) has a central processing unit (CPU) connector coupled a pair of dual inline memory module (DIMM) connectors coupled thereto. The PCB de...  
WO/2017/104421A1
A method for manufacturing an HOE used in a state of being bent into a shape having a curved surface which can be spread out flat includes a fabrication step for irradiating a flat-plate-shaped photosensitive material 50 with two light b...  
WO/2017/106523A1
A low-leakage resistive random access memory cell includes a complementary pair of bit lines and a switch node. A first ReRAM device is connected to a first one of the bit lines. A p-channel transistor has a source connected to the ReRAM...  
WO/2017/101143A1
A storage array (1), and a storage chip and method for storing logical relationship of objects. The storage array (1) comprises: first outgoing lines (L0-Ln) and second outgoing lines (C0-Cn), wherein a storage unit (11) is respectively ...  

Matches 101 - 150 out of 851,183