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Patent Searching and Data


Matches 301 - 350 out of 858,792

Document Document Title
WO/2019/125796A1
Systems, apparatuses, and methods related to subrow addressing for electronic memory and/or storage are described. Independent subrow addressing may enable energy consumed by performance of an operation on a particular subset of data val...  
WO/2019/123689A1
The present invention provides a compound lens that has excellent durability and is capable of suppressing a birefringence effect. A compound lens (1) includes a first lens (10) that has a first curved surface (12) and a first flat surfa...  
WO/2019/125948A1
Apparatuses and methods for duty cycle error correction of clock signals are disclosed. An example method includes detecting a clock period error between a first clock signal and a third clock signal and adjusting a timing of the first o...  
WO/2019/121577A1
A music composition system for composing music segments comprises: a computer interface comprising at least one external input for receiving from an external device a request for a musical composition; a controller configured to determin...  
WO/2019/125847A1
An example apparatus comprises a memory resource configured to store data and transmit data. The apparatus may further include a safety controller coupled to the memory resource configured to receive the data from the memory resource, re...  
WO/2019/125797A1
The present disclosure includes apparatuses, methods, and systems for current separation for memory sensing. An embodiment includes applying a sensing voltage to a memory cell having a ferroelectric material, and determining a data state...  
WO/2019/123076A1
A computer-implemented method includes: detecting a first error while accessing a magnetic tape, determining a first error location on the magnetic tape where the first error occurred, determining one or more areas on the magnetic tape t...  
WO/2019/125954A1
Large magnetic moment compositions are formed by stabilizing ternary or other alloys with a epitaxial control layer. Compositions that are unstable in bulk specimen are thus stabilized and exhibit magnetic moments that are greater that a...  
WO/2019/122152A1
A remote support communication system (100) is provided. The remote support communication system (100) comprises a user terminal unit (T1) and an operator terminal unit (T2). Said user terminal unit (T1) comprises a camera module (104) c...  
WO/2019/125861A1
Transpose non-volatile (NV) memory (NVM) bit cells and related data arrays configured for memory row and column, transpose access operations. A plurality of transpose NVM bit cells can be arranged in memory rows and columns in a transpos...  
WO/2019/126486A1
Devices and methods for programming resistive change elements using an electrical stimulus are disclosed. According to some aspects of the present disclosure the devices and methods program at least one resistive change element within at...  
WO/2019/122970A1
The present invention relates to a system, a removable memory device (11) and a method for selecting and making available for reading and reproducing, multimedia contents, wherein the user can instantly mark a multimedia content as favou...  
WO/2019/125524A1
Devices and methods include receiving write command at a command interface (14) of the semiconductor device (10) to write data to memory (12). An external data strobe (51, 52) is received at a data strobe (DQS) pin of the semiconductor d...  
WO/2019/125784A1
Sensing voltage based on supply voltage applied to an MRAM bit cell in a write operation can be used to detect completion of magnetic tunnel junction (MTJ) switching in an MRAM bit cell to terminate the write operation to reduce power an...  
WO/2019/124356A1
Provided is a semiconductor device including a memory cell formed on a semiconductor substrate. The memory cell includes a first source region (7) and a first drain region (9) that are formed on the semiconductor substrate, and a first s...  
WO/2019/124003A1
The recording medium according to one embodiment of the present invention is provided with: a recording layer that contains a heat-sensitive color-developing composition and a photothermal conversion material which generates heat upon ab...  
WO/2019/126030A1
Systems and methods of configuring a fixed memory array of an integrated circuit with coefficients of one or more applications includes identifying a utilization constraint type of the fixed memory array from a plurality of distinct util...  
WO/2019/125364A1
An apparatus comprises: a magnetic junction including: a first structure comprising a magnet with a first PMA, the first structure has an anisotropy axis perpendicular to a plane of a device; a second structure comprising one of a dielec...  
WO/2019/125384A1
An apparatus comprising: a magnetic junction having a structure comprising an unpinned magnet; a structure comprising an insulative or semi-insulative magnet, the structure being adjacent to the magnet junction; and an interconnect adjac...  
WO/2019/125571A1
A lapping mount tool and a process for lapping a row of head sliders involves affixing the row to a lapping mount tool fixture, actuating each of multiple first actuation pins to set each head slider for lapping to a respective element t...  
WO/2019/119514A1
A storage control apparatus (99) based on a multi-microprocessor framework, comprising a main unit end interface unit (300), a plurality of memory interface units (500), a main unit end microprocessor (400), and a plurality of storage en...  
WO/2019/125387A1
An apparatus is provided which comprises: a magnetic junction including: a first structure comprising a magnet with unfixed perpendicular magnetic anisotropy (PMA) with respect to a plane of a device; a second structure comprising one of...  
WO/2019/117538A1
The present invention relates to a compound having a novel structure, a photopolymer composition comprising the compound as a dye, a hologram recording medium produced from the photopolymer composition, an optical element comprising the ...  
WO/2019/118207A1
Methods, systems, and devices related to a multi-level self-selecting memory device are described. A self-selecting memory cell may store one or more bits of data represented by different threshold voltages of the self-selecting memory c...  
WO/2019/118005A1
A device (10) including an equalizer (70, 244) that includes a first input (102) configured to receive an input signal (81), a second input (104) configured to receive a reference signal (83), and a third input configured to receive an a...  
WO/2019/118931A1
Three-dimensional vertical memory array cell structures and processes. In an exemplary embodiment, a 3D vertical memory array structure is formed by performing operations that include forming an array stack having alternating metal layer...  
WO/2019/118096A1
A system and a method for power mode selection in a portable computing device is provided herein. The system and method may comprise operations for operating the portable computing device in a normal mode. The normal mode may utilize a p...  
WO/2019/118108A1
Embodiments of the present disclosure may relate to a memory controller that may include a memory interface and a logic circuitry component coupled with the memory interface. In some embodiments, the logic circuitry component is to progr...  
WO/2019/116915A1
The semiconductor circuit is provided with: a first circuit which can apply to a second node the reverse voltage of the voltage in a first node; a second circuit which can apply to the first node the reverse voltage of the voltage in the...  
WO/2019/118214A1
Systems, methods, and devices for providing power to low energy circuits include inrush circuits. Devices include a regulator that includes at least one driver device configured to generate a first current associated with a load comprisi...  
WO/2019/114450A1
A data edge transition method, applied to a memory system. The memory system comprises a processor and a memory driven by the processor. Multiple groups of data lines are connected between the processor and the memory. The transition met...  
WO/2019/117540A1
The purpose of the present invention is to provide a photopolymer composition, a hologram recording medium using the same, an optical device, and a holographic recording method, the photopolymer composition comprising: a polymer matrix h...  
WO/2019/118045A1
A memory device [100] includes a memory cell [101] coupled to a bitline [113] and a bitline complement [114]. A first capacitive structure [121] is charged with a first voltage source such as a memory supply voltage. A second capacitive ...  
WO/2019/118192A1
Methods, systems, and devices related to techniques to access a self-selecting memory device are described. A self-selecting memory cell may store one or more bits of data represented by different threshold voltages of the self-selecting...  
WO/2019/113921A1
The present invention relates to a flash memory programming circuit and programming method. The programming circuit comprises a programming transistor and a storage unit connected in series, wherein a gate electrode of the programming tr...  
WO/2019/116961A1
This semiconductor circuit is provided with: a first circuit which can apply to a second node the reverse voltage of the voltage on a first node; a second circuit which can apply to the first node the reverse voltage of the voltage on th...  
WO/2019/116932A1
A semiconductor device of the present disclosure is provided with: a memory cell which has a first terminal, a second terminal, a storage element that can assume a first resistance state and a second resistance state, and a non-linear el...  
WO/2019/118317A1
Systems, apparatuses and methods related to subarray addressing for electronic memory and/or storage are described. Concurrent access to different rows within different subarrays may be enabled via independent subarray addressing such th...  
WO/2019/114217A1
A computing array based on a 1T1R device, an operation circuit, and an operating method. The computing array comprises: a 1T1R array and a peripheral circuit, wherein the 1T1R array is used for implementing an operation and storing an op...  
WO/2019/118008A1
A memory device (14) may include a memory array (22) that includes multiple memory cells. The memory device (14) may also include multiple sense amplifiers (70) that, in operation, may each be connected to one or more memory cells. The s...  
WO/2019/117542A1
The present invention relates to a photopolymer composition comprising: a polymer matrix or a precursor thereof, the polymer matrix comprising a reaction product between a polyol having two or more hydroxy groups and a reactive isocyanat...  
WO/2019/118009A1
A memory device may include a memory array, which may also include, multiple memory cells. The memory device may also include one or more counters designed to generate internal memory addresses to sequentially access the multiple memory ...  
WO/2019/118223A1
Apparatuses and methods for data transmission offset values in burst transmissions. An example apparatus may include offset logic configured to provide offset values associated with a receiver circuit of a memory device coupled to a sign...  
WO/2019/114356A1
Disclosed in the present invention are a magnetic tunnel junction and a manufacturing method therefor. The manufacturing method for the magnetic tunnel junction comprises the following steps: a step of forming a first dielectric hole: fo...  
WO/2019/115333A1
Methods of creating and recreating a mix instructions file for mixing two or more music tracks are disclosed including the comparison of the music tracks used in creation and recreation, respectively. If possible and necessary, the recre...  
WO/2019/112937A1
The present disclosure includes apparatuses and methods related to data movement operations in non-volatile memory. An example apparatus can comprise an array of non-volatile memory cells including a plurality of sections each with a plu...  
WO/2019/112742A1
A wave pipeline includes a first stage, a plurality of second stages, and a third stage. The first stage receives a data signal representative of data and a clock signal, and may process the data at a first data rate equal to a clock rat...  
WO/2019/110873A1
A method, apparatus and computer-readable storage medium are provided to define a storyline based on path probabilities for a plurality of paths through the frames of a video. Relative to a method and for a plurality of frames of a video...  
WO/2019/111104A1
The present invention provides a semiconductor device which maintains data without being influenced by a change in temperature. The present invention is provided with a band gap reference circuit, a voltage reference circuit, a voltage c...  
WO/2019/112068A1
A storage circuit (11) is provided with: memory cells (MCij) each of which include a MTJ element; and reference cells (RCi) each of which include a series circuit of a linear resistor (FR) and a MTJ element set in a low resistance state....  

Matches 301 - 350 out of 858,792