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Patent Searching and Data


Matches 401 - 450 out of 854,506

Document Document Title
WO/2017/222899A1
A process for lapping a row of head sliders involves fixing the row to a lapping tool fixture, actuating each of multiple force pins to set each head slider for lapping to a respective target wedge angle, and simultaneously lapping accor...  
WO/2017/222592A1
Electrical switching technologies employ the otherwise undesirable line defect in crystalline materials to form conductive filaments. A switching cell includes a crystalline layer disposed between an active electrode and another electrod...  
WO/2017/219364A1
A method for processing data, a storage apparatus, a solid state disk and a storage system. The method is applied to an SSD, and comprises: an SSD receiving a write request from a controller, wherein the write request carries data to be ...  
WO/2017/219585A1
A shift register unit circuit(10) includes an input port(INPUT) for receiving an input signal, an output port(OUTPUT) for outputting a gate driving signal, a first clock input port(CLK) for receiving a first clock signal, a second clock ...  
WO/2017/221014A1
The present invention provides a magnetic head for erasing data on a magnetic tape, the magnetic head comprising a body having an elongate magnet mounted thereon, and a plurality of magnetisable portions in magnetisable communication wit...  
WO/2017/222775A1
Methods, systems, and apparatuses for memory array bit inversion are described. A memory cell (e.g., a ferroelectric memory cell) may be written with a charge associated with a logic state that may be the inverse of the intended logic st...  
WO/2017/222038A1
The purpose of the present invention is to provide a magnetoresistive element that has a high magnetic resistance (MR) ratio and a suitable device resistance (RA) for device applications. This magnetoresistive element has a structure in ...  
WO/2017/222870A1
The present disclosure includes apparatuses and methods to transfer data between banks of memory cells. An example includes a plurality of banks of memory cells and a controller coupled to the plurality of subarrays configured to cause t...  
WO/2017/223374A1
The present disclosure relates to a liquid crystal writing device including a first conductive layer, a second conductive layer, a cholesteric liquid crystal mixture layer sandwiched by the first conductive layer and the second conductiv...  
WO/2017/220991A1
A method for delivering an interactive video is provided, including delivering a first video clip of the interactive video in a first loop, and upon receiving a first input during delivery of the first video clip, delivering a first exit...  
WO/2017/221968A1
Provided is a processing device capable of, on the basis of data prepared by a recorder that only has recording function, acquiring information related to a time when the data was prepared. The processing device includes an acquisition u...  
WO/2017/219824A1
Provided are a shift register unit, a driving method, a gate driver circuit, and a display device. The shift register unit comprises: an input unit (11); a reset unit (12); a first pull-up node control unit (13); a second pull-up node co...  
WO/2017/222723A1
High aspect ratio vertical interconnect access (via) interconnections in magnetic random access memory (MRAM) bit cells are disclosed.In one aspect, an exemplary MRAM bit cell includes a coupling column interconnecting an access transist...  
WO/2017/216954A1
This audio data control device (2) is connected so as to communicate with an audio data transmission device (3) that reproduces and transmits audio data, and to receive the audio data. The audio data has connection determination informat...  
WO/2017/218080A1
In some embodiments, an electronic device displays a playback user interface that is configured to playback content on the electronic device. While displaying the playback user interface that is configured to playback the content on the ...  
WO/2017/214897A1
An electromagnetic interference protection circuit for a memory, and a vehicle-mounted electronic device. During daily work, a protection unit (2) outputs a switch signal to control a memory (1) so that same is in a write-protection stat...  
WO/2017/217612A1
A method for creating and sharing subtitles of video content by using a one-touch feature is provided. The method, which is a method implemented by a computer, comprises: a step of playing video content; a step of setting at least one ti...  
WO/2017/218033A1
A component for controlling playback of digital media objects using a single control input receives, from a server, a plurality of feature vectors, each feature vector representing one of a plurality of media objects, and receives one or...  
WO/2017/218255A1
Some embodiments provide a method for separating the motion detection zone(s) of an A/V recording and communication device from the motion alert zone(s) of the A/V recording and communication device. For example, an A/V recording and com...  
WO/2017/218055A1
Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage (Vth) of a memory cell can shift depending on when the read operation occurs. Countermeasures are provided for a first rea...  
WO/2017/218170A1
In one embodiment, an apparatus comprises a storage device comprising a NAND flash memory. The storage device is to program a plurality of cells of a first wordline of the NAND flash memory to cause a programmed cell of the first wordlin...  
WO/2017/217864A1
A method of executing a transition from playback of a first audio track to playback of a second audio track on an electronic device. The method will, during playback of the first audio track, initiate an execution of a transition from th...  
WO/2017/217613A1
A method for creating and sharing subtitles of video content by using machine learning is provided. The method, which is a method implemented by a computer, comprises: a step of playing video content; a step of providing information on a...  
WO/2017/216394A1
The invention relates to a method intended to provide or collect additional information concerning the content of a broadcast. For this purpose, it is necessary to design a process for synchronising between a reference audiovisual conten...  
WO/2017/218056A1
Disclosed is a method for responding to a single user read command of a complementary cell array including one or more complementary cell pairs, the method including: determining if a first group of cells out of a data word is in an eras...  
WO/2017/218199A1
In accordance with some embodiments, a method is performed at a device with one or more processors, non-transitory memory, a display, and an input device. The method includes displaying, on the display, a playback status indicator regard...  
WO/2017/215361A1
A shift register unit, gate driver circuit and driving method therefor. On the basis of a setting of a fourth reset module (108) in a shift register unit, at a tail end where a scanning pulse output end (OUTPUT) outputs a scanning pulse,...  
WO/2017/218839A1
In at least one embodiment, an optical data storage tape is provided. The optical data storage tape includes a read/write data area including a plurality of writeable tracks for storing data thereon, each writeable track having a first t...  
WO/2017/218341A1
System and methods for aligning event data recorded by recording devices. Recording devices create, transmit, and store alignment data. Alignment data created by a recording device is stored in the memory of the recording device with a t...  
WO/2017/215119A1
A read circuit of storage class memory comprises: an array; a read reference circuit, having the same bit line parasitic parameters as the array, having the same read transmission gate parasitic parameters as the array, used to generate ...  
WO/2017/212212A1
A quantum memory device includes an atomic ensemble (4) and a signal source of electromagnetic radiation (10) for generating modes to be stored and having a frequency corresponding to an off-resonant transition between first and second s...  
WO/2017/213261A1
This exchange bias utilization-type magnetization reversal element is provided with: antiferromagnetic driving layer antiferromagnetism (1) comprising first region (1a) and second region antiferromagnetism (1b), and third region antiferr...  
WO/2017/212827A1
The present invention provides a detergent composition for hard disk substrates, which displays excellent detergency against residual particles on a substrate surface. The present invention pertains to a detergent composition for hard di...  
WO/2017/214629A1
A light colored magnetic coating formulation (e.g., a paint formulation) having at least one solvent, at least one resin, and a plurality of ferromagnetic or magnetizable particles. The plurality of particles may have a mean particle siz...  
WO/2017/211094A1
A shift register, a gate drive circuit and a display device. The shift register comprises: an input unit (1), a first reset unit (2), a node control unit (3), a chamfering control unit (4), a first output unit (5) and a second output uni...  
WO/2017/213717A1
Disclosed is a memory device including: (a) a target memory cell having a first select gate, a target memory gate and a first source line wherein during a program operation the first select gate, target memory gate and first source line ...  
WO/2017/213953A1
Methods, systems, and devices for recovering fatigued ferroelectric memory cells are described. Recovery voltages may be applied to a ferroelectric memory cell that is fatigued due to repeated access (read or write) operations. The recov...  
WO/2017/214628A1
This patent document provides implementations and examples of circuits and devices based on low-energy consumption semiconductor structures exhibiting multi-valued states. In one aspect, a semiconductor device is configured to comprise: ...  
WO/2017/209815A1
A system and method is disclosed for fast secure destruction or erasure of data in a non-volatile memory. The method may include identifying a fast erase condition, such as an unauthorized access attempt, and then applying a fast erase p...  
WO/2017/208880A1
A spin-current assist type magnetoresistance effect device (200) according to the invention of the present application is provided with: a spin-current assist type magnetoresistance effect element (100) including a magnetoresistance effe...  
WO/2017/208698A1
The present invention suppresses an increase of a circuit scale. A semiconductor device (1) is provided with control circuits (1a, 1b) and memory (1c). Furthermore, an external element (2) is connected to the semiconductor device (1). Th...  
WO/2017/208016A1
There is provided a method for accessing a memory cell of a plurality of memory cells that are part of a memory unit, the memory cells being grouped into a plurality of memory cell groups, wherein each memory cell group is associated wit...  
WO/2017/206191A1
A data storage method and apparatus. The method comprises: monitoring a rate at which data is written into a mechanical hard drive disk; and when the monitored rate at which the data is written into the mechanical hard drive disk is lowe...  
WO/2017/206542A1
Provided are a shift register and an operation method therefor, a grid drive circuit, and a display device. The shift register comprises: an input module (11), wherein a first end thereof is connected to an input end (INPUT) of the shift...  
WO/2017/209842A1
In an aspect of the disclosure, a method and an apparatus are provided. The apparatus may be a content addressable memory. The content addressable memory includes a plurality of memory sections each configured to store data. Additionally...  
WO/2017/209858A1
Methods, systems, and devices for a sensing scheme that extracts the full or nearly full remnant polarization charge difference between two logic states of a ferroelectric memory cell or cells is described. The scheme employs a charge mi...  
WO/2017/209921A1
According to various aspects, a memory controller may schedule ZQ commands to periodically calibrate individual memory ranks in a multi-rank memory. The memory controller may schedule a ZQ short command at each ZQ interval and record tha...  
WO/2017/209781A1
A post-package repair system includes a memory channel controller, a first error counter, a scrubber, and a data processor. The memory channel controller converts data access requests to corresponding memory accesses, and provides return...  
WO/2017/209912A1
Examples of high-temperature memory modules used in a well operation are disclosed. In one example implementation according to aspects of the present disclosure, a memory module may include: a control unit configured to receive data from...  
WO/2017/208825A1
Provided are a hard disk drive (HDD) unit and electronic device that have high maintainability. In one embodiment of the present invention, the HDD unit includes an HDD case and an HDD holder. The HDD case is provided with an HDD tray an...  

Matches 401 - 450 out of 854,506