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Patent Searching and Data


Matches 401 - 450 out of 851,183

Document Document Title
WO/2017/048411A1
The present disclosure relates to phase change memory control. An apparatus includes a memory controller. The memory controller includes a word line (WL) control module and a bit line (BL) control module. The memory controller is to dete...  
WO/2017/044339A1
Systems and methods are disclosed for managing temperature in a data storage device. A data storage device includes non-volatile solid-state memory, a temperature sensor, a heating device, and a controller. The controller is configured t...  
WO/2017/044251A1
The present invention relates to a flash memory device that uses dummy memory cells as source line pull down circuits.  
WO/2017/041227A1
System and method can support three-dimensional display. The system can receive a plurality of image frames, which are captured by an imaging device on a movable object. Furthermore, the system can obtain state information of the image d...  
WO/2017/044095A1
Described is an apparatus which comprises: an input ferromagnet to receive a first charge current and to produce a first spin current; a first layer configured to convert the first spin current to a second charge current via spin orbit c...  
WO/2017/044338A1
Disclosed herein are systems, methods, and devices for parallel read and write operations. Devices may include a first transmission device coupled to a local bit line and a global bit line associated with a memory unit of a memory array....  
WO/2017/042900A1
Provided is an optical information recording technique in which change in phase difference between signal light and reference light during recording is corrected during recording to record a high quality hologram, and thereby phase multi...  
WO/2017/044165A1
Sense circuits in a memory device can be pre-charged to different levels in a sensing process to reduce the amount of time used for sensing. For example, in a program operation, a memory cell is in a fast programming mode until its thres...  
WO/2017/044695A1
An apparatus includes acoustic equipment and an enclosure to support the acoustic equipment. The enclosure includes a front cover member, a middle cover member, a back cover member, and a hinge to connect the front cover member to the ba...  
WO/2017/042587A1
The present techniques generally relate to correlated electron switches that are capable of asymmetric set or reset operations.  
WO/2017/044220A1
Embodiments describe techniques and configurations for an apparatus including a three-dimensional (3D) memory array having a plurality of strings of memory cells, where individual strings may have memory cells that correspond to differen...  
WO/2017/043149A1
The present invention makes it possible to perform highly reliable data reading by maintaining a sufficient margin that separates resistance states in a resistance variable memory. The memory includes a plurality of memory cells with eac...  
WO/2017/043111A1
According to one embodiment, a semiconductor memory device comprises a first bank and a second bank. Each of the first bank and the second bank comprises a memory cell having a variable resistor element, a reference cell, a sense amplifi...  
WO/2017/044167A1
Methods and systems are provided where non-volatile solid state memory may include selected memory cells coupled to a selected word line and proxy memory cells coupled to a proxy word line. The selected memory cells may be non-adjacent t...  
WO/2017/044110A1
Example embodiments relate to securing data with memristors. The examples disclosed herein provide a memristor where the memristor is in one of a first resistance state and a second resistance state. An encryption is applied to the memri...  
WO/2017/044233A1
A disclosed example includes selectively precharging first bitlines of first multi-level cell (MLC) memory cells of a wordline without precharging second bitlines of second MLC memory cells of the wordline during a program verify. First ...  
WO/2017/043105A1
According to one embodiment, a memory- includes a bit line connected to a memory cell; and a read circuit to execute reading of data from the memory cell. The read circuit includes a first circuit having a first input terminal and detect...  
WO/2017/043378A1
In the transmission of multiple kinds of LPCM signals/compressed digital audio signals, the present invention switches these signals and makes it possible to reproduce audio from these signals in a satisfactory manner. Digital audio sign...  
WO/2017/044047A1
The present application relates to a computational active Solid-State Drive(SSD) storage device, comprising: an active interface configured for data communication with one or more host machines, the active interface being configured to a...  
WO/2017/039608A1
A nonvolatile memory cell includes a volatile selector electrically coupled in series with a nonvolatile resistance memory device. The nonvolatile resistance memory device may be a switching material sandwiched between a first bottom ele...  
WO/2017/039948A1
An error check and scrub (ECS) mode enables a memory device to perform error checking and correction (ECC) and count errors. An associated memory controller triggers the ECS mode with a trigger sent to the memory device. The memory devic...  
WO/2017/037983A1
Provided is an electronic apparatus capable of protecting a plurality of HDD units from shocks without requiring size increase of the apparatus. According to one embodiment of the present art, an electronic apparatus is provided with a p...  
WO/2017/038201A1
[Problem] The present invention provides an information recording medium glass substrate production method, the glass substrate having a very low Ra and being able to sufficiently support higher recording capacity and higher accuracy, wh...  
WO/2017/036113A1
Circuits (300, 400), devices, methods for decision feedback equalization are described. A decision feedback circuit (300) can include a plurality of decision feedback equalizer (DFE) branches, each DFE branch including: a pre-computation...  
WO/2017/036293A1
A dynamic random access memory for a three-level unit, and a method for reading same. The dynamic random access memory (DRAM) for a three-level unit stores three voltage levels (0, VDD/2, VDD) on a plurality of storage units. A selected ...  
WO/2017/039203A1
The present invention provides an asynchronous serial communication system and method and comprises a semiconductor device, which has two terminals and receives a voltage required for operation from transmitted data through one terminal,...  
WO/2017/039781A3
Systems and methods supporting high performance real time pattern recognition by including time and regional multiplexing using high bandwidth, board-to-board communications channeis, and 3D verticai integration. An array of processing b...  
WO/2017/039826A2
Image-hosted data encryption implementations are presented that encrypt and decrypt data within a host image. A bit stream representing a data item and a host image are accessed. The host image has pixels which include one or more color ...  
WO/2017/038018A1
Provided is an opening/closing mechanism for a rotary cover that can stop a transparent cover that rotates within a plane at a suitable closed cover position. The opening/closing mechanism for a rotary cover is provided with a transparen...  
WO/2017/039689A1
Examples disclosed herein relate, in one aspect, to an electronic device including a processor, a lookup engine, and a content addressable memory (CAM) including a plurality of data tables. The lookup engine may obtain from the processor...  
WO/2017/038492A1
The present invention realizes, also at a content copy destination, a usage control configuration substantially similar to the content usage control performed on a copy source medium. According to the present invention, a data processing...  
WO/2017/040413A1
One embodiment of the present invention sets forth a technique for mitigating drift in audiovisual assets. The technique includes determining that an edit associated with a presentation timeline is within boundaries of a video frame. The...  
WO/2017/037147A1
The present invention relates to an apparatus for displaying medical image data of a body part. It is described to provide (12) medical data of a body part, and subsets of medical image data from the medical data are determined (14). A p...  
WO/2017/039687A1
Examples disclosed herein relate, in one aspect, to a method for searching an array of content addressable memory (CAM) devices, where each device stores a plurality of entries. The method may obtain a search key from a processor, search...  
WO/2017/040071A1
Systems and methods for driving a non-volatile memory device in a standby operating condition are disclosed. A standby detection circuit detects whether the non-volatile memory system is in a standby condition. In response to determining...  
WO/2017/036083A1
A shift register, a driving method thereof, a grid driving circuit, and a display apparatus. The shift register comprises an input module (1), a reset module (2), a touch control switching module (3), a node control module (4), a first o...  
WO/2017/040322A1
A non-volatile programmable bitcell has a read enable device with a source coupled with a bitline, an anti-fuse device with a gate coupled with a first write line, a drain coupled with a supply voltage and a source coupled with a drain o...  
WO/2017/035968A1
Disclosed are an audio playing method and apparatus for multiple playing devices. The method comprises: establishing, according to a connection request sent by a terminal, a Bluetooth connection between a playing device and the terminal;...  
WO/2017/040305A1
In some embodiments, a method includes receiving, at a device, digital audio content to be converted by a digital-to-analog converter to produce analog audio content. The digital audio content has at least one audible frequency. The meth...  
WO/2017/039947A1
A check bit read mode enables a memory device to provide internal check bits to an associated host. A memory controller of a memory subsystem can generate one or more read commands for memory devices of the memory subsystem. The read com...  
WO/2017/036121A1
A shift register, a gate electrode driving circuit and a display device are provided. The shift register comprises a pull-up node control unit (1), a pull-down node control unit (3), a pull-up output unit (2), a noise reduction unit (4) ...  
WO/2017/038493A1
The present invention realizes, also at a content copy destination, a usage control configuration substantially similar to the content usage control on a copy source medium. The present invention includes: a data processing unit that cop...  
WO/2017/036953A1
A method, apparatus and system for facilitating navigation toward a region of interest in an extended scene of video content include determining a timeline including information regarding at least one region of interest in the video cont...  
WO/2017/040053A1
Methods of operating a ferroelectric memory cell. The method comprises applying one of a positive bias voltage and a negative bias voltage to a ferroelectric memory cell comprising a capacitor including a top electrode, a bottom electrod...  
WO/2017/039772A1
The various implementations described herein include systems, methods and/or devices used to enable multi-phase erasure in a storage device. The method includes performing an erase operation on a portion of one or more non-volatile memor...  
WO/2017/039594A1
An example device in accordance with an aspect of the present disclosure includes a tray to couple to a computing system. A plurality of hot-pluggable first connectors receive a corresponding plurality of independently hot-pluggable stor...  
WO/2017/039611A1
A nonvolatile memory cell includes a diode electrically coupled in series with a unipolar nonvolatile resistance memory device. The unipolar nonvolatile resistance memory device includes a switching material sandwiched between a bottom e...  
WO/2017/033936A1
The purpose of the present invention is to provide: a non-magnetic amorphous Co alloy that can prevent the occurrence of crystallization during high-temperature treatment (for example, heat treatment at approximately 400–500°C during ...  
WO/2017/034563A1
Described is an apparatus which comprises: a magnetic junction device including a fixed magnetic layer and a free magnetic layer with perpendicular magnetization anisotropy (PMA); a spin orbit coupling (SOC) layer coupled to the free mag...  
WO/2017/032475A1
In a time-interleaved Analog to Digital Converter, circuit components and capacitances may be shared among a plurality of sample and hold circuits (16, 36, 18, 38, 20, 40, 22, 42) in each of two sets. The two shared circuits (12, 32, 14,...  

Matches 401 - 450 out of 851,183