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WO/2013/070367 |
Implementations include systems, methods and/or devices suitable for use in a memory system that may enhance the performance of error control codes used to improve the reliability with which data can be stored and read. Some implementati...
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WO/2013/069545 |
Provided is a complex compound which is composed of a compound represented by formula (I), a metal and at least one kind of ion that is selected from the group consisting of ions obtained by adding one or more protons to amines, ammonium...
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WO/2013/069330 |
According to one embodiment, a method for authenticating a device, wherein the device holds secret identification information, encrypted secret identification information, and key management information, and an authenticator holds an ide...
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WO/2013/068145 |
A synchronisation system for correlating positioning data and video data comprises a synchronisation unit which is arranged to: emit an identifier capable of being imaged by a video camera; store the identifier correlated in time with a ...
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WO/2013/071271 |
A device and method to perform memory operations at a clock domain crossing is disclosed. In a particular embodiment, a method includes providing a first clock signal to a write clock input of a memory to write data to the memory. The da...
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WO/2013/071176 |
A two-transistor one-MTJ (2T1MTJ) three port structure includes two separate pin layer structures coupled to one free layer structure. The pin layer structures may include an anti-ferromagnetic layer (AFM) layer coupled to a pin layer. T...
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WO/2013/070366 |
Implementations include systems, methods and/or devices suitable for use in a memory system that may enhance the performance of error control codes used to improve the reliability with which data can be stored and read. Some implementati...
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WO/2013/070493 |
A method includes providing data including hard bit data and soft bit data to a rank modulation decoder.
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WO/2013/070859 |
A case for holding optical discs includes a primary blank formed of foldable material and having at least six interconnected panels. In certain of the panels of the primary blank a U- shaped cutout is formed, and in certain other panels ...
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WO/2013/071072 |
A serial memory may have memory arranged in a plurality of memory blocks, a serial interface for receiving a read instruction and associated memory address; and a controller configured to only store a plurality of most significant bits f...
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WO/2013/070368 |
Implementations include systems, methods and/or devices suitable for use in a memory system that may enhance the performance of error control codes used to improve the reliability with which data can be stored and read. Some implementati...
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WO/2013/071129 |
The present disclosure includes methods and apparatuses that include resistive memory. A number of embodiments include a first memory cell coupled to a data line and including a first resistive storage element and a first access device, ...
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WO/2013/070916 |
Methods and non-volatile storage systems are provided for determining erratically programmed storage elements, including under-programmed and over- programmed storage elements. Techniques do not require any additional data latches. A set...
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WO/2013/069859 |
Disclosed are a device and method for controlling a flash memory for storing a mapping table of a block to be erased. A host interface unit transmits and receives a control signal and data to and from a host, and a memory interface unit ...
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WO/2013/071254 |
A method of establishing a reference level includes providing first and second non-overlapping paths from a first node to a second node, providing first and second reference magnetic random access memory (MRAM) elements in the first path...
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WO/2013/068221 |
The invention relates to integrated CMOS circuits with very low power consumption at rest, and especially volatile SRAM memories. The inverters of the circuit are formed by an nMOS transistor and a pMOS transistor. According to the inven...
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WO/2013/070915 |
Methods and non-volatile storage systems are provided for detecting defects in word lines. A "broken" word line defect may be detected. Information may be maintained as to which storage elements were intended to be programmed to a tracke...
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WO/2013/070922 |
A system for data storage including a removable memory element having a data storage device, and a docking station in communication with a host device and configured for receiving the removable memory cartridge so as to put the host syst...
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WO/2013/064368 |
The invention relates to a data storage medium (10) characterized in that it comprises a substrate based on diamond (30) comprising NV centres inserted into a crystalline unit cell of said substrate. The NV centres are able to emit a lig...
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WO/2013/064860 |
Apparatus comprises means for receiving basis vectors relating to each of at least three series of time-varying feature data; means for performing multiple correlations, each correlation being for a pair of said at least three series, th...
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WO/2013/066774 |
An integrated circuit includes a delay circuit and first and second interface circuits. The delay circuit delays a first timing signal by an internal delay to generate an internal timing signal. The first interface circuit communicates d...
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WO/2013/063687 |
A mass storage memory module system including a memory module having memory holding members which can be connected to each other, and removably connected to a memory controller. One or more modular memory holding members can be connected...
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WO/2013/063777 |
Examples are disclosed for facilitating recovery from failures associated with a storage array having a plurality of storage devices.
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WO/2013/065337 |
This sputtering target uses an alumina sintered body having a purity of at least 99.99% in terms of mass %, a relative density of at least 98%, and an average crystal grain size of less than 5 μm, or an alumina sintered body with a puri...
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WO/2013/066584 |
During the programming of a non-volatile memory cell, a voltage pulse is applied to an erase gate of the cell a delay time after voltage pulses are applied to the other elements of the cell. The erase gate voltage pulse ends at substanti...
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WO/2013/066656 |
This disclosure concerns memory cell sensing. One or more methods include determining a data state of a first cell coupled to a first data line in response to a request to sense a data state of a second cell coupled to a second data line...
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WO/2013/066703 |
A method includes generating a replacement default read threshold at least partially based on a default read threshold and on an updated read threshold. The method also includes sending the replacement default read threshold to the memory.
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WO/2013/066345 |
Decoder circuits having negative differential resistance (NDR) devices are described. In an example, a decoder circuit includes a plurality of input lines to receive select signals, a bias logic to provide a voltage bias, a plurality of ...
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WO/2013/066592 |
An integrated circuit die has a first die pad for receiving a first voltage and a second die pad for receiving a second voltage. The second voltage is less than the first voltage. A first circuit which is operable at the first voltage is...
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WO/2013/066042 |
Embodiments of the present invention provide a semiconductor storage device (SSD)-based storage system. Specifically, in a typical embodiment, the system comprises a SSD memory disk unit having (among other components) a memory controlle...
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WO/2013/064021 |
Provided is a method for manufacturing a resistive random access storage unit, including the steps of: forming a resistive layer (20) on a first metal layer with a flat surface; forming a passivation layer (30) on the resistive layer (20...
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WO/2013/066312 |
A drive carrier includes a bezel and opposing sidewalls connected to the bezel. At least one of the opposing sidewalls includes a plurality of slots that form at least part of a keying solution, and a dimension of at least two of the plu...
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WO/2013/066484 |
A mechanism for managing peak power in a memory storage array that includes sub-array blocks may reduce the peak currents associated with read and write operations by staggering the wordline signal activation to each of the sub-array blo...
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WO/2013/065418 |
Provided is a light source unit adjustment device calibration method. An operator attaches a standard (10) to a receptacle unit (20) of the adjustment device (1) and calibrates the angle of the optical axis by moving a measurement head (...
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WO/2013/064072 |
An apparatus comprising a plurality of memory components each comprising a plurality of memory banks, a memory controller coupled to the memory components and configured to control and select a one of the plurality of memory components f...
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WO/2013/062145 |
An Extended Circuit Integrated Suspension (ECIS) design and manufacture thereof, to allow for circuit elements to be disposed onto the load beam on the opposite side of the flexure circuit. An Extended Circuit Integrated Suspension (ECIS...
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WO/2013/061523 |
An Index.bdmv file is recorded in a BDMV directory of a rewritable recording medium. The Index.bdmv file contains an editability_flag and an extended_editability_flag. When the recording medium is loaded into a device, the editability_fl...
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WO/2013/061559 |
A nonvolatile storage cell comprises a first electrode (103), a second electrode (106) and a variable resistance layer (104). The variable resistance layer (104) includes: a first oxide layer (104a) composed of a metal oxide with nonstoi...
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WO/2013/061398 |
Provided is a high-density CxNyHz film and a film forming method. One embodiment of the present invention is a CxNyHz film formed on a substrate to which a film is to be formed, and the film is characterized by x, y, and z satisfying the...
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WO/2013/062611 |
An array of memory cells, in which one or more memory cells have a common doped region. Each memory cell includes a transistor with a floating gate, source and drain regions, and separate gate and drain voltage controls. Each memory cell...
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WO/2013/062523 |
A drive assembly includes a memory device and a computing device communicatively coupled to the memory device. The computing device is to receive environmental data from a host device via a second communication channel isolated from a fi...
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WO/2013/062561 |
A shiftable memory supporting atomic operation employs built-in shifting capability to shift a contiguous subset of data from a first location to a second location within memory during an atomic operation. The shiftable memory includes t...
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WO/2013/062526 |
A compression connector includes a housing and a plurality of contacts located within the housing. Each of the plurality of contacts is configured to bend at a plurality of locations when pressure is applied to the contact. In addition, ...
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WO/2013/062936 |
Back biasing word line switch transistors is disclosed. One embodiment includes word line switch transistors that are in a well in a substrate. A memory array having non-volatile storage devices may be in a separate well in the substrate...
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WO/2013/062521 |
A drive carrier includes a first computing device with light source control capability and a light source proximate to a front plate of the drive carrier. The first computing device receives a signal from a second computing device (exter...
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WO/2013/062559 |
Shiftable memory employs ring registers to shift a contiguous subset of data words stored in the ring registers within the shiftable memory. A shiftable memory includes a memory having built-in word-level shifting capability. The memory ...
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WO/2013/060972 |
To compensate for the corruption of a memory of a computer communicating with several identical computers via a communication bus: prior to any communication between the computers, a distinct number is allocated (200) to each of the comp...
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WO/2013/062519 |
A system includes a computing device with touch sensing capabilities and a sensor positioned on a drive carrier and electronically connected to the computing device. The computing device receives a sensor measurement and determines based...
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WO/2013/062522 |
An authenticatable device includes a substrate and a computing device with encryption capability affixed to the substrate. The computing device is to receive a challenge value and a first value from a host device, generate a second value...
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WO/2013/063096 |
Multifunction autofocus for automated microscopy includes automatic coarse focusing of an automated microscope by reflective positioning, followed by automatic image- based autofocusing of the automated microscope performed in reference ...
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