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WO/2020/106819A1 |
Embodiments of the disclosure are drawn to apparatuses and methods for a multi-bit duty cycle monitor. A clock signal may be provided to a memory' in order to synchronize one or more operations of the memory. The clock signal may have a ...
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WO/2020/105948A1 |
Disclosed herein is an image processing apparatus and a control method thereof. The image processing apparatus includes communication circuitry, a storage, and a controller configured to control the image processing apparatus to: perform...
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WO/2020/106823A1 |
Embodiments of the disclosure are drawn to apparatuses and methods for lookahead duty cycle adjustment of a clock signal. Clock signals may be provided to a semiconductor device, such as a memory device, to synchronize one or more operat...
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WO/2020/104091A1 |
The invention relates to a method for operating a memory assembly. A physical address is received. The physical address is associated with a first memory segment of a memory assembly. The physical address is modified to a modified physic...
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WO/2020/104922A1 |
The invention relates to a security system for protection against row hammering attacks, which monitors adjacent rows in order to generate alerts which determine mitigation actions that can be applied to any dynamic random-access memory....
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WO/2020/106570A1 |
A system comprising a memory component including blocks, and a processing device, operatively coupled with the memory component. The processing device determines endurance values for the memory component. For each selected block of the p...
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WO/2020/103000A1 |
A preparation method for a magnetic tunnel junction (MTJ), and the MTJ and a magnetoresistive random access memory. The MTJ comprises: a fixed ferromagnetic layer (11), a free ferromagnetic layer (12), and a magnetic tunnel barrier (13) ...
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WO/2020/105202A1 |
This information processing device is provided with a region setting unit, an information acquisition unit, a copy processing unit, and an output unit. On a hard drive which executes a read/write process for data in a substitute sector w...
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WO/2020/105471A1 |
Provided is a biaxially oriented thermoplastic resin film, at least one surface of which satisfies the following conditions (1) and (2), and that has suitable smoothness and windability. (1) When the projection density for projections wi...
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WO/2020/105596A1 |
A NAND flash memory 1 according to one embodiment includes a memory array 11; a detection circuit 17; and a drive circuit 19. The drive circuit 19 is a circuit for driving, via a linear word line WL connected to a plurality of memory cel...
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WO/2020/101819A1 |
In one aspect, an example method includes (i) presenting, by a playback device, first media content from a first source; (ii) encountering, by the playback device, a trigger to switch from presenting the first media content from the firs...
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WO/2020/102005A1 |
A method and system for dynamic music creation is disclosed. An emotion is assigned to one or more musical motifs and a game vector is associated with the emotion. The one or more musical motifs are mapped to the game vector based on the...
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WO/2020/101748A1 |
A word line driver circuit receives a word line input signal and supplies a word line driver output signal to a word line. The word line driver circuit includes a transistor having a first current carrying terminal coupled to the word li...
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WO/2020/101829A1 |
Some embodiments include a ferroelectric transistor having an active region which includes a first source/drain region, a second source/drain region, and a body region between the first and second source/drain regions. The body region ha...
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WO/2020/099854A1 |
The present invention relates to generating and training neural networks for application in numerous fields including object or event recognition in images including visual sequences. There is provided a computerised method of generating...
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WO/2020/099081A1 |
Arrangement (100) of memristors, wherein a first memristor (102) and a second memristor (104) are provided for encoding at least one bit, wherein a first line (106) to a first input (108) of the first memristor (102) and to a second inpu...
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WO/2020/100629A1 |
A tape cartridge according to one embodiment of the present invention is provided with a tape reel, a cartridge case, and a reel lock member. The tape reel includes a bottom-closed cylindrical reel hub around which a tape is wound. The c...
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WO/2020/098549A1 |
A word line control method, a word line control circuit device, and a semiconductor memory are provided. The method includes: acquiring a row address input signal; acquiring a test mode signal; performing logical and decoding operations ...
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WO/2020/102815A1 |
Methods and apparatus for NAND flash memory are disclosed. In an embodiment, a method is provided for programming a NAND flash memory includes setting programming conditions on word lines to set up programming of multiple memory cells as...
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WO/2020/100985A1 |
In one embodiment, there is provided a polishing liquid composition capable of reducing scratching of a substrate surface after polishing while ensuring polishing speed.　The present disclosure, in one embodiment, pertains to a polishin...
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WO/2020/100777A1 |
The present disclosure provides an optical disk device capable of stably reproducing data recorded on a high line density optical disk. The optical disk device of the present disclosure is characterized by comprising: a recording expecte...
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WO/2020/099983A1 |
The purpose of the present invention is to provide a semiconductor device that executes calculation processing with reduced power consumption. Provided is a semiconductor device including a first circuit positioned on a substrate and a s...
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WO/2020/101975A1 |
Methods, systems, and devices for temperature-based memory management are described. A system may include a memory device and a host device. The host device may identify a temperature (e.g., of the memory device). The host device may det...
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WO/2020/099584A1 |
The invention describes a memory device which combines a switchable resistive element and a superconductor element electrically in parallel. The switchable resistive element comprises an active material, which is switchable between first...
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WO/2020/093886A1 |
A shift register and a driving method therefor, a gate driving circuit and a display device. The shift register comprises: a scanning circuit (320) configured to generate a first signal used for enabling a gate driving signal to have a r...
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WO/2020/096670A1 |
A data storage system may include multiple data storage devices, such as hard disk drives, a cooling fan, and a sound balancer structure between the fan and the drives. The sound balancer is intentionally positioned where it substantiall...
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WO/2020/049363A3 |
A memory chip may include: a plurality of memory banks; a data storage configured to store access information indicative of access operations for one or more segments of the plurality of memory banks; and a refresh controller configured ...
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WO/2020/093529A1 |
Disclosed in the present application are a protection circuit for a memory in a display panel and a display panel. Said circuit comprises a timing controller, a memory, a power supply circuit and a switch circuit. By removing a write pro...
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WO/2020/097316A1 |
A method for plating nickel onto a glass surface of a substrate by sequentially contacting the surface with a solution having an oxidizing agent, a solution containing a silane compound, a Pd/Sn solution, and a nickel ion-containing solu...
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WO/2020/096522A1 |
The present disclosure relates to generally to two-dimensional amorphous carbon (2DAC) coating techniques. More particularly, the present disclosure is directed to a recording device comprising an overcoat layer on a substrate, wherein t...
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WO/2020/094072A1 |
A semiconductor memory is provided. The memory includes: a memory array(10); a row address processing unit(21) configured to output a row address; a bank address processing unit(22) configured to output a bank address; a column address p...
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WO/2020/095522A1 |
The state of reference cells in a storage device is correctly managed. A first memory cell array includes a first reference cell that generates the reference potential of a sense amplifier. A second memory cell array includes a second re...
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WO/2020/093387A1 |
A method for operating a phase change memory unit, and a related device. The phase change memory unit comprises a first electrode (101), a phase change layer (103) and a second electrode (102). The second electrode (102) is grounded. The...
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WO/2020/094808A1 |
The invention relates to a method for producing a component, a component produced according to such a method, and a measurement system in which an information area of the component is encoded/marked by means of deformation.
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WO/2020/095041A2 |
Various implementations described herein refer to an integrated circuit having a row of bitcells that are chained together in series to operate as a ring oscillator. Each bitcell in the row of bitcells has multiple transistors that are i...
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WO/2020/095361A1 |
A semiconductor storage device according to an embodiment comprises a plurality of planes and a sequencer. Each of the plurality of planes includes a plurality of blocks which are sets of memory cells. The sequencer executes a first oper...
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WO/2020/093252A1 |
A vehicle-mounted apparatus having a vehicle-mounted vibration reduction system comprises an apparatus main body (100), a hard disk enclosure (400) movably provided at the apparatus main body (100), a primary vibration reduction device (...
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WO/2020/095148A1 |
Provided is a semiconductor device in which data is written to a separate memory cell instead of a defective memory cell. The semiconductor device comprises a first circuit and a second circuit located on the first circuit. The first cir...
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WO/2020/095360A1 |
This domain wall motion type magnetic recording element (100) is provided with: a domain wall motion layer (10) in which first layers (11) that contain a rare earth metal and second layers (12) that contain a transition metal are alterna...
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WO/2020/093199A1 |
An embodiment of the present application provides a memcapacitor and a programming method for same, and a capacitive memory, wherein the memcapacitor comprises: a source electrode, which is a metal material; a first insulating dielectric...
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WO/2019/182684A3 |
A memory device includes rows and columns of memory cells, word lines each connected to a memory cell row, bit lines each connected to a memory cell column, a word line driver connected to the word lines, a bit line driver connected to t...
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WO/2020/097125A1 |
A film creation and management system and platform enables efficient, cost-effective, collaborative, and secure creation of filmed or interactive content. A system and platform for creating high-resolution filmed content in an efficient,...
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WO/2020/093796A1 |
A shift register (300, 400, 510, 520, 530, 800, 900), a method for driving the same, a gate drive circuit (500) and a display device (110). The shift register (300, 400, 510, 520, 530, 800, 900) comprises an input sub-circuit (310, 410, ...
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WO/2020/089582A1 |
A method of video playback comprises the steps of obtaining a 3D reconstruction of at least part of an environment, obtaining video footage of an activity within that at least part of the environment, obtaining data indicating a position...
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WO/2020/089885A1 |
Presented herein are methods and systems for adjusting code files to apply memory protection for dynamic memory regions supporting run-time dynamic allocation of memory blocks. The code file(s), comprising a plurality of routines, are cr...
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WO/2020/090223A1 |
The present invention addresses the problem of providing a structure with which it is possible to provide real-time content based on a user's body movement. This information processing device comprises a playback control unit (43) that c...
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WO/2020/092640A1 |
A memory sub-system can be determined to be operating within a target operating characteristic based on a threshold success rate associated with error control operations using a particular parameter. Upon determining that the memory sub-...
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WO/2020/087885A1 |
A shift register, a method for driving the shift register and a display apparatus are provided. The shift register includes a noise reduction control circuit and a pull-up node noise reduction circuit. The noise reduction control circuit...
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WO/2020/088241A1 |
The present application discloses a content addressing memory (CAM), a data processing method and a network device, relates to the technical field of storage, and can solve the problem of greater power consumption caused by large areas o...
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WO/2020/088211A1 |
Provided are a data compression method and a related apparatus, and a data decompression method and a related apparatus. The data compression method comprises: acquiring N data blocks to be compressed and N pieces of protection informati...
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