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WO/2019/010956A1 |
A shift register unit and a driving method therefor, a gate driving circuit, and a display apparatus. The shift register unit comprises: an input circuit (10), an output circuit (20), a pull-down control circuit (30) and a pull-down circ...
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WO/2019/012207A1 |
The invention concerns an RFID radio tag (1) for a vinyl disc comprising at least one electronic chip (2) and an antenna (5), configured as a spiral and wherein the central part (9) of the radio tag is provided with a through-hole. The r...
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WO/2019/013925A1 |
A power multiplexor includes: a first branch including a first transistor coupled in series with a second transistor between a first power supply and a power output; a second branch including a third transistor coupled in series with a f...
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WO/2019/012737A1 |
[Problem] To provide various means for efficiently attenuating vibrations applied to a turntable to dramatically reduce the noise picked up by a needle, thereby allowing a listener to hear original sounds buried in noise that prevents th...
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WO/2019/013775A1 |
A computing device that includes a plurality of memory devices and firmware to provide a migration data storage option that reserves a portion of a memory device to store, at least, encrypted metadata describing the physical layout infor...
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WO/2019/011996A1 |
A method for saving digital data on a photographic medium (1) in particular a strip, preferably a strip of 35 mm film, comprising the step involving imaging, on the medium (1), blocks (14) of pixels encoding the information to be saved a...
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WO/2019/010952A1 |
A shift-register circuit, a driving method thereof, a gate-driving circuit and a display apparatus are disclosed. The shift-register circuit includes an input sub-circuit (10), a reset sub-circuit (20), an output sub-circuit (30), a pull...
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WO/2019/011749A1 |
An input current (Iin) is transformed into an output integrated voltage (Vout_int) using a parallel connection of an operational transconductance amplifier and an integration capacitor. The output integrated voltage is reduced by repeate...
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WO/2019/014131A1 |
A magnetoresistive device comprises a fixed magnetic region positioned on or over a first electrically conductive region, an intermediate layer positioned on or over the fixed magnetic region, a free magnetic region positioned on or over...
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WO/2019/013955A1 |
Multiple (multi-) level cell (MLC) non-volatile (NV) memory (NVM) matrix circuits for performing matrix computations with multi-bit input vectors are disclosed. An MLC NVM matrix circuit includes a plurality of NVM storage string circuit...
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WO/2019/013953A1 |
Non-volatile (NV) memory (NVM) matrix circuits employing NVM circuits for performing matrix computations are disclosed. In exemplary aspects disclosed herein, an NVM matrix circuit is provided that has a plurality of NVM storage string c...
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WO/2019/013851A1 |
A semiconductor device includes a clock divider (72) that receives a clock signal (58) and generates even and odd clock signals (74, 76). The clock signal (58) includes a first frequency, while the even and odd clock signals (74, 76) eac...
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WO/2019/010044A1 |
One embodiment facilitates mitigating write amplification in a phase change memory-based storage device. During operation, the system receives, by a controller of the storage device, data to be stored in a phase change memory (PCM) of th...
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WO/2019/007043A1 |
A gate drive unit circuit and a driving method therefor, a gate drive circuit and a display apparatus. The gate drive unit circuit comprises: a shift register (SR) and several drive signal output sub-circuits (5), wherein each of the dri...
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WO/2019/010251A1 |
Methods and systems are provided for enhanced audio experiences in VR/AR applications. The apparatuses of this disclosure are adapted to record multiple binaural stereo pairs and play back select binaural pairs corresponding to user's he...
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WO/2019/007049A1 |
A shift register (SRi), a gate driving circuit (140) and a driving method therefor, and a liquid crystal display (10). The shift register (SRi) comprises: a pull-up sub-circuit (201), configured to set the potential of a pull-up node (PU...
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WO/2019/008186A1 |
A method is shown for providing a user interface for a 3D environment of 360° images. The method includes displaying a first 360 degree image in a sequence of 360 degree images; receiving user input to interact with one of a plurality o...
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WO/2019/008483A1 |
Provided is a semiconductor device having a large memory capacity per unit surface area. The invention relates to a memory cell having a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitive e...
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WO/2019/009086A1 |
This semiconductor laser device (1) is provided with: a lower electrode block (10) which has a first terminal hole and has a first and second connection hole on both sides of a recess that houses a submount where a semiconductor laser el...
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WO/2019/009082A1 |
The present technique relates to a signal processing device, a signal processing method, and a program that allow one DSD signal to also support a PCM signal output. A distribution device comprises: an extraction unit for extracting, whe...
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WO/2019/009876A1 |
A phase change memory structure (100) includes a phase change material layer (110), a top electrode layer (120) above the phase change material layer, a metal silicon nitride layer (130) in contact with the top electrode layer opposite f...
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WO/2019/009039A1 |
The present invention provides a list creation program for creating a content reproduction list corresponding to the traveling situation of a vehicle. Content information of contents stored in a plurality of portable wireless terminals, ...
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WO/2019/009942A1 |
In calibrating the phase skew between an SDRAM data strobe ("DQS") signal and data ("DQ") signal in a device, the data signal driver circuit impedance is adjusted to impair impedance matching on the DQ signal channel while system-level m...
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WO/2019/005113A1 |
Techniques are disclosed for forming resistive random-access memory (RRAM) including a tunnel source access transistor, such as a tunnel source MOSFET. The use of a tunnel source access transistor includes integrating a tunnel diode on t...
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WO/2019/005173A1 |
An apparatus is provided which comprises: a first magnet; a stack of layers, a portion of which is adjacent to the first magnet, wherein the stack of layers is to provide an inverse spin-orbit coupling effect; a second magnet; one or mor...
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WO/2019/004274A1 |
An aspect of the present invention is represented by the general formula (1A): (R-π-E-CH2)2-A for an organofluorine compound (wherein A is a divalent perfluoropolyether group; π is an arylene group or a single bond; R is an alkenyl gro...
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WO/2019/005923A1 |
Magnetic switching devices, including magnetic memory devices, are provided. The devices use high-quality crystalline films of 4d or 5d transition metal perovskite having a strong spinorbit coupling (SOC) to produce spin-orbit torque in ...
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WO/2019/005647A1 |
Disclosed herein are magnetic storage media with embedded disconnected circuits, magnetic storage systems comprising such media, and methods of using such media. A magnetic storage media comprises a recording layer comprising a storage l...
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WO/2019/002241A1 |
This disclosure falls into the field of adapting external content to a video stream, and more specifically it is related to analyzing the video stream to define a suitable narrative model, and adapting the external content based on this ...
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WO/2019/005147A1 |
An apparatus is provided which comprises: a magnetic junction having a free magnet layer which has perpendicular magnetic anisotropy (PMA), wherein the free magnet layer has anisotropy axis perpendicular to a plane of a device; and an in...
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WO/2019/000895A1 |
Provided are a method and system for managing an anomaly log of a Flash player, the method comprising: in a logic execution process of a Flash player, configuring anomaly nodes at corresponding key logic locations; and when the anomaly n...
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WO/2019/005046A1 |
An apparatus is provided which comprises: a magnetic junction having a free magnet layer; and an interconnect adjacent to the free magnet layer, wherein the interconnect includes a material to provide a positive spin Hall angle. In some ...
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WO/2019/005229A1 |
Systems and methods are described for compacting operating parameter sets in a data storage device. Data storage device may be configured to maintain multiple operating parameter sets, each of which stores various parameters for interact...
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WO/2019/000456A1 |
The present application provides a data mask (DM) transmission method, a memory controller, a memory chip, and a computer system. The method comprises: a memory controller transmits a first write command to a memory chip, wherein the fir...
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WO/2019/003578A1 |
A magnetic recording medium according to the present invention includes: an elongated substrate; and a magnetic layer containing magnetic powder and a binder, wherein the glass transition point of the binder is not lower than 75°C. When...
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WO/2019/003040A1 |
A system for creating a pulsating image, comprising an electronic device comprising a camera and configured to communicate with a storage; a designated application running on the electronic device; the designated application comprises: a...
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WO/2019/005230A1 |
Systems and methods are described for generating location-based read voltage offsets in a data storage device. Optimal read voltage thresholds vary across memory elements of a device. However, data storage devices are often limited in th...
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WO/2019/003014A1 |
Provided is a semiconductor device in which an increase in circuit surface area is curbed. This semiconductor device comprises a control circuit having a plurality of scan chain circuits; a DA converter which is electrically connected to...
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WO/2019/005158A1 |
A spin orbit torque (SOT) memory device includes a spin orbit torque electrode disposed in a dielectric layer above a substrate and a magnetic tunnel junction (MTJ) device disposed on a portion of the spin orbit torque electrode. The spi...
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WO/2019/000363A1 |
System and method can support data processing on a movable platform. The system comprises a memory buffer with a plurality of buffer blocks. A first data processor can perform a write operation to write data into the memory buffer, and p...
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WO/2019/003045A1 |
Provided is a storage device with a fast operating speed. This storage device is provided with a first and a second memory cell, a first and a second bit line, a first and a second switch, and a sense amplifier. The sense amplifier is pr...
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WO/2019/003047A1 |
Provided is a semiconductor device enabling high integration. Specifically provided is a semiconductor device which has a transistor, an interlayer film, and a first conductor, and in which: the transistor is provided with an oxide upon ...
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WO/2019/006066A1 |
Voltage-switched magneto-resistive random access memory (MRAM) employing separate read operation circuit paths from a shared spin torque write operation circuit path is disclosed. The MRAM includes an MRAM array that includes MRAM bit ce...
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WO/2019/004484A1 |
This substrate for magnetic disks is provided with: a substrate main body having two main surfaces; and films of a material having a loss coefficient of 0.1 or more, said films being arranged on the main surfaces. The thickness T of this...
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WO/2019/002179A1 |
Methods, systems, and computer program products for synchronizing audio signals captured by multiple independent devices during an audio event are described. Multiple recording devices, e.g. several smartphones, record the audio event. A...
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WO/2019/003959A1 |
An aspect of the present invention provides a polishing liquid composition capable of enhancing polishing speed and reducing short-wavelength undulation after polishing. An aspect of the present invention relates to a polishing liquid co...
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WO/2019/003037A1 |
Provided is a semiconductor device which is capable of holding a signal detected by a sensor element. This semiconductor device is provided with a sensor element, a first transistor, a second transistor, and a third transistor, wherein o...
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WO/2019/005019A1 |
Cross-point ferroelectric memory arrays, and methods of fabricating cross-point ferroelectric memory arrays, are described. In an example, an integrated circuit structure includes a first plurality of conductive lines along a first direc...
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WO/2019/004275A1 |
One embodiment of the present invention is an organofluorine compound represented by the general formula (R-π-E-CH2-A-CH2-E')n-π'-G … (1B) (where n is an integer of 2-5, A is a divalent perfluoropolyether group, π is an arylene grou...
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WO/2019/001711A1 |
The invention relates to an apparatus (1) for producing an n-layer optical information carrier, which apparatus has an injection molding unit (10) for producing a carrier body having a first information layer; and a first embossing unit ...
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