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WO/2024/064145A1 |
This application is directed to integrating field-effect transistors (FETs) and Schottky barrier diodes (SBDs) on a substrate and forming an integrated and planar semiconductor device. A P-type Metal Oxide Semiconductor (PMOS) transistor...
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WO/2024/063830A1 |
A memory device includes a horizontal source layer which is laterally separated into laterally isolated portions located in adjacent memory blocks by a dielectric backside trench fill structure or a source isolation dielectric structure.
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WO/2024/062988A1 |
[Problem] To provide a resin film which can be interposed between a substrate and a substrate holding part so as to easily hold the substrate on the substrate holding part, and which makes it possible to appropriately remove a plurality ...
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WO/2024/062664A1 |
Provided is a semiconductor device which has, during an OFF time, a carrier discharge path that is provided in an IGBT, and increases an IE effect while assuring breakdown resistance against avalanches, and is thereby capable of reducing...
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WO/2024/062804A1 |
Disclosed is a plasma processing device comprising a chamber, a substrate support unit, a plasma generation unit, and a bias power supply. The substrate support unit is provided inside the chamber. The plasma generation unit is configure...
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WO/2024/062946A1 |
This film formation device (100) comprises a chamber (1), a mounting stand (21), and a fluid bed (3). The fluid bed (3) is provided to a position, within the chamber (1), that faces a first main surface of a substrate (W) that is mounted...
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WO/2024/062695A1 |
Provided is a substrate processing apparatus the throughput of which is improved by reviewing the configuration of an apparatus having a batch-type module and a sheet-type module. In a sheet processing region R2 related to sheet processi...
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WO/2024/062829A1 |
In the present invention, a transistor comprises a collector layer, a base layer, and an emitter layer stacked in this order on an upper surface, which is one surface of a substrate. Four or more emitter electrodes are electrically conne...
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WO/2024/062802A1 |
This mask has an opening for forming a film of a pattern made of a vapor deposition material on a substrate and includes a mask body made of a non-magnetic substance and having the opening and a magnetic body formed on the mask body.
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WO/2024/060262A1 |
The present application discloses a semiconductor device, a manufacturing method, a power conversion circuit, and a vehicle. The semiconductor device comprises: an N-type semiconductor substrate, a first epitaxial layer, multiple gate tr...
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WO/2024/064127A1 |
A chemical mechanical polishing composition for tungsten CMP consists of, consists essentially of, or comprises a liquid carrier, cationic abrasive particles dispersed therein, an iron-containing accelerator, a tungsten etch inhibitor, a...
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WO/2024/063164A1 |
Provided is a semiconductor device having an annular trench formed around a through-hole, wherein reliability is improved. In the present invention, a semiconductor device comprises a semiconductor substrate, through-wiring, a rear-sur...
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WO/2024/064194A1 |
A spacer for parts of a reticle pod includes spacer contacts configured to contact alignment features of a cover and a baseplate of the reticle pod such that the cover and baseplate are separated by a gap. The spacer includes a frame con...
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WO/2024/061538A1 |
The present invention relates to an apparatus (92) for cleaning cup-shaped hollow bodies (94), the apparatus (92) comprising: a contact wall (20), onto which the hollow body (94) can be seated; at least one through-opening (24), which is...
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WO/2024/060277A1 |
The present application relates to a clamping apparatus, a manipulator, and a mechanical apparatus, which are used for clamping at least one of a wafer box and a wafer boat. The clamping apparatus comprises a carrying member and a clampi...
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WO/2024/062576A1 |
Provided is a technology for uniformly processing a surface of a substrate. The present invention comprises: a processing chamber for processing the substrate; a nozzle having a plurality of gas introduction parts for introducing a gas...
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WO/2024/063439A1 |
The present invention provides a substrate processing method. A substrate processing method according to an embodiment may include a first step of supplying a process gas to a chamber and exciting the process gas to react with a specific...
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WO/2024/060646A1 |
A semiconductor device includes a nanosheet stack on a substrate. A first source/drain is on a first side of the nanosheet stack and a second source/drain is on an opposing side of the nanosheet stack. A backside contact includes a first...
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WO/2024/063127A1 |
A pressure-sensitive adhesive sheet including a pressure-sensitive adhesive layer that catches elements separated from a holding substrate, wherein the pressure-sensitive adhesive layer has recesses and protrusions in the surface thereof...
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WO/2024/063129A1 |
The present invention enables an object held by an adhesive sheet to be picked up using a milder operation. This adhesive sheet comprises: a base material; and an adhesive layer that has protrusions/recessions on the front surface ther...
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WO/2024/063879A1 |
A method and apparatus for delivering I PA vapor to a substrate processing chamber. In one aspect, the invention includes a controller, a liquid mass flow controller (LMFC) associated with a vaporizer to convert a first fluid to a vapor,...
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WO/2024/062233A1 |
Disclosed is at least a method comprising: providing a source wafer having a leading surface, and on the leading surface is formed a device portion and a support portion; and providing a handling wafer, comprising on a leading surface th...
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WO/2024/063997A1 |
An embodiment etching tool includes an etch chamber for plasma etching a first wafer to be processed; a transfer chamber coupled to the etch chamber; a first run path between the transfer chamber and the etch chamber, the first run path ...
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WO/2024/063107A1 |
A release agent used to release a resin having an ether bond from a substrate, the agent comprising a sulfonic acid, a release promoter catalyst, and water.
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WO/2024/062516A1 |
This substrate bonding device comprises: gas discharge holes (1413c, 1423c) provided in second regions on a stage and a head; and a control unit that controls a chucking drive section and a gas supply section (1492) so as to release subs...
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WO/2024/062569A1 |
The present invention comprises: a treatment chamber that treats a substrate; at least one vaporizer that vaporizes a source supplied in a liquid form to produce a source gas; at least two tanks storing the source gas ejected from the va...
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WO/2024/062994A1 |
Implemented in a substrate processing method are: a first step for supplying a processing gas containing a halogen-containing gas and a basic gas to a substrate having a recess in which side walls are formed of a silicon film and a back ...
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WO/2024/063124A1 |
Provided is an adhesive sheet which further facilitates the detachment of an element. This adhesive sheet comprises an adhesive layer a surface of which has recesses and protrusions, wherein the adhesive sheet can be stretched in the pla...
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WO/2024/063128A1 |
Provided is a laminate comprising: an adhesive sheet for catching an element distant from a holding substrate; and a release sheet laminated on one surface of the adhesive sheet. The adhesive sheet is provided with an adhesive layer. The...
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WO/2024/062741A1 |
Provided is a method for modeling a wafer shape by means of a function. The function calculates a displacement z of a wafer in the thickness direction thereof, and is the sum of a plurality of functions including: a first function g(r) t...
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WO/2024/062762A1 |
A substrate processing apparatus 1 comprises a transfer block 5, a processing block 7, and a buffer unit 33. The transfer block 5 comprises a bulk transport mechanism HTR for storing a substrate W into a carrier C, and a first attitude t...
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WO/2024/063049A1 |
Provided is a substrate processing device that makes it possible to synchronize a plurality of clamp pins to stably position a substrate at a center of rotation. A substrate processing device 1 according to an embodiment of the present i...
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WO/2024/064049A1 |
An actuator assembly to actuate a plasma tuning ring in a processing chamber includes an actuator, a rod, bellows, and vacuum seals. The actuator is arranged external to the processing chamber. The processing chamber is under vacuum. The...
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WO/2024/062974A1 |
This remover composition for light irradiation removal contains a solvent and at least either a polymer or a compound that has a structure represented by formula (1) and a carbon content of 80% or less. (In formula (1), each of R1 and R2...
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WO/2024/062923A1 |
The present invention addresses the problem of providing a film that has excellent adhesion for bonding members, even at an extremely low temperature of about -50°C, and has high cold/heat cycle reliability. The invention relates to a...
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WO/2024/062305A1 |
Semiconductor devices and methods of making the same include a first lower device and a second lower device on a substrate. A first upper device is over the first lower device and a second upper device is over the second lower device. A ...
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WO/2024/060476A1 |
The present invention relates to the technical field of chip fixtures. Disclosed is a chip mounting fixture, comprising: a fixture body, wherein the fixture body is provided with chip slots which are uniformly distributed in an array and...
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WO/2024/064567A2 |
In an aspect, a transistor comprises a gate structure having a metal gate, a dielectric layer at least partially surrounding the metal gate, a metal cap over a portion of the metal gate that is not surrounded by the dielectric layer, and...
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WO/2024/063652A1 |
A thermal processing device (1) is disclosed herein for thermally processing material (MTR) on a substrate (STR). The thermal processing device comprises a support plate (10) which at a first main side (11) is provided with a layer stack...
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WO/2024/063479A1 |
The present invention relates to: an epitaxial die having a structure enabling easy detection of electrical defects in an epitaxial die before an upper wiring process and easy replacement of a defective epitaxial die; a semiconductor lig...
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WO/2024/063588A1 |
The present invention relates to a method for manufacturing a semiconductor device. The method for manufacturing a semiconductor device, according to an embodiment, may comprise the steps of: forming a thin film structure on a substrate;...
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WO/2024/063744A2 |
The present invention relates to a method (100) for enabling the use of an liquid-air interface in order to create the colloidal quantum well film desired to be created on a substrate surface.
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WO/2024/062877A1 |
The present invention addresses the problem of providing a chemical liquid which exhibits excellent removability of SiGe, while being suppressed in surface roughening of Ge if applied to an object to be processed containing Ge and SiGe. ...
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WO/2024/062703A1 |
Provided are a substrate processing method and a substrate processing apparatus that make it possible to selectively remove, in a satisfactory manner, a self-assembled monolayer that is provided to the surface of a substrate. The present...
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WO/2024/063873A1 |
Apparatus and methods for lifting a substrate from a substrate support include i. moving the substrate support and the substrate from a first position in a first direction toward lift pins, the substrate support having through holes each...
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WO/2024/060423A1 |
A surface modification method and device for a CIGS solar cell. The method comprises: starting a microwave power source (131) to ionize an inert gas in a microwave plasma generation chamber (132) so as to generate microwave plasma, bring...
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WO/2024/059012A1 |
A composite nanocrystalline silicon layer can be formed by depositing a polycrystalline silicon sublayer directly or indirectly on a substrate. An amorphous silicon sublayer is deposited on the polycrystalline silicon sublayer. The compo...
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WO/2024/055389A1 |
The present disclosure relates to a semiconductor structure/gate structure preparation method, a semiconductor structure, and a gate structure. The method comprises: providing a substrate; forming a first conductive layer having a first ...
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WO/2024/058943A1 |
In certain embodiments, a method includes depositing a photoresist layer over a semiconductor wafer to be patterned by photolithography, the photoresist layer having a first height, and exposing the photoresist layer to a pattern of acti...
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WO/2024/058678A1 |
The invention is related to a method of manufacture of van der Waals heterostructures based on transition metal dichalcogenides selectively grown by the chemical vapor deposition on a graphene substrate, wherein the surface of the graphe...
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