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Matches 1 - 50 out of 1,012,343

Document Document Title
WO/2018/164352A1
The present application relates to a method for manufacturing a patterned substrate. The method can be applied to, for example, a manufacturing process for devices such as an electronic device and an integrated circuit, or to manufacturi...  
WO/2018/165234A1
Described examples include a method (100) of making a semiconductor die package. The method (100) comprises arranging (118) at least one preformed die attach pad and at least two preformed leads on a lead frame carrier in a predetermined...  
WO/2018/165533A1
A high-pressure processing system for processing a substrate includes a first chamber, a pedestal positioned within the first chamber to support the substrate, a second chamber adjacent the first chamber, a vacuum processing system confi...  
WO/2018/164522A1
Provided are a method for manufacturing an electronic device capable of efficiently utilizing a material and a method for removing impurities using same. The method for manufacturing an electronic device comprises the steps of: placing a...  
WO/2018/161549A1
Provided are a manufacturing method for a display substrate, a display substrate, and a display device. The manufacturing method for a display substrate comprises: forming an insulating layer (135) on a base substrate (101), the base sub...  
WO/2018/164634A1
There is provided a method for manufacturing a fingerprint sensor module. The method comprises: providing a carrier comprising an adhesive; providing a plurality of fingerprint sensor devices, each sensor device in turn comprising a sens...  
WO/2018/164762A1
Multi-processor core three-dimensional (3D) integrated circuits (ICs) (3DICs) and related methods are disclosed. In aspects disclosed herein, ICs are provided that include a central processing unit (CPU) having multiple processor cores (...  
WO/2018/162605A1
The invention relates to the field of three-dimensional integration of microelectronic components and, more particularly, to a self-assembly method (100) for microelectronic components, comprising: - providing (101) a so-called self-alig...  
WO/2018/164267A1
The purpose of the present invention is to provide a composition for forming a resist underlayer film, which is capable of forming a resist underlayer film that has excellent flatness, while exhibiting excellent solvent resistance, heat ...  
WO/2018/164819A1
Methods and apparatus for in-situ incline cleaning an element disposed in a EUV generating chamber are disclosed. A capillary-based hydrogen radical generator is employed to form hydrogen radicals from hydrogen gas. The capillary-based h...  
WO/2018/163713A1
The present invention provides a light-emitting element comprising: a window layer-cum-support substrate; and a plurality of light-emitting units that are provided on the window layer-cum-support substrate and have mutually different lig...  
WO/2018/163935A1
A wafer support base 20 comprises a disc-shaped ceramic substrate 22 having a wafer mounting surface 22a, and includes an RF electrode 23 and a heater electrode 30 which are embedded in that order in the ceramic substrate 22 from the waf...  
WO/2018/164017A1
The purpose of the present invention is to provide a production method for a cured product pattern which has a high throughput and has uniform physical properties in a shot region of a substrate. The method for producing a cured material...  
WO/2018/161411A1
Provided are a thin film transistor array substrate and a manufacturing method thereof. The thin film transistor array substrate comprises: a substrate (301); a first data line (102); a first insulation layer (302); a scan line (101); a ...  
WO/2018/162546A1
Method for producing textured wafers and roughening spray jet treatment device. 2.1.The invention relates to a method for producing textured silicon wafers and to a device that can be used in a method of this kind for the roughening spra...  
WO/2018/164759A1
An integrated circuit (IC) device may include a substrate having an active device layer. The integrated circuit may also include a first defect layer. The first defect layer may have a first surface facing a backside of the active device...  
WO/2018/163389A1
A wafer feed device for feeding a wafer divided into a plurality of dies to a feed position, the wafer feed device being provided with: a die information storage unit for storing the number of dies for each rank allocated to each of the ...  
WO/2018/163618A1
[Problem] To provide a magnetic memory with which the occurrence of inversion errors can be suppressed and stable recording can be achieved. [Solution] A magnetic memory comprises: a spin orbit layer in which spin-polarized electrons are...  
WO/2018/163013A1
The present invention provides a semiconductor device having stable electrical properties. The present invention also provides a semiconductor device having high reliability. This semiconductor device has a gate electrode, a source elect...  
WO/2018/162082A1
Disk tray magazine (2) with a housing (1), with several disk trays (9), wherein the disk trays (9) are movable supported on the housing (1), wherein the disk trays (9) have at upper sides several recesses (13) for receiving an optoelectr...  
WO/2018/161846A1
Joint opening structures of 3D memory devices and fabricating method are provided. A joint opening structure comprises a first through hole penetrating a first stacked layer and a first insulating connection layer, a first channel struct...  
WO/2018/163650A1
Provided is an etchant composition useful for etching indium oxide-based layers, said etchant composition being free from hydrogen chloride but yet causing little width thinning by etching, showing good linearity and being capable of for...  
WO/2018/163900A1
The objective of the present invention is to provide a thermosetting composition for underfill for providing a seal between a substrate and a semiconductor chip which is mounted on the substrate in a facing-down manner, the composition b...  
WO/2018/163931A1
[Problem] To provide an etching device that suppresses over-etching of a group III nitride semiconductor. [Solution] An etching device 1000 has a processing chamber 1001, a susceptor 1100, a gas supply unit 1500, a plasma-generating unit...  
WO/2018/163748A1
This substrate processing apparatus comprises: a base which rotates around a vertical rotation axis line; a plurality of holding pins provided, on the base, at intervals along the rotation direction of the base, and holding a peripheral ...  
WO/2018/163575A1
[Problem] To provide a ferromagnetic tunnel junction element and a method for manufacturing the same with which it is possible to avoid increasing the element occupation area and the number of manufacturing steps, while also avoiding var...  
WO/2018/163872A1
The present disclosure relates to a semiconductor device and an electronic apparatus with which a higher withstand voltage can be achieved. In an N-type well on a surface of a semiconductor substrate, an outer peripheral structure region...  
WO/2018/164804A1
A method is provided to minimize travel distance and time between correction locations on a substrate when polishing a local area of a substrate, such as a semiconductor wafer, using a location specific polishing module. A correction pro...  
WO/2018/164810A1
Dynamically controlling voltage provided to three-dimensional (3D) integrated circuits (ICs) (3DICs) to account for process variations measured across interconnected IC tiers of 3DICs are disclosed herein. In one aspect, a 3DIC process v...  
WO/2018/164655A1
Disclosed herein are techniques for providing isolation in integrated circuit (IC) devices, as well as IC devices and computing systems that utilize such techniques. In some embodiments, a protective layer may be disposed on a structure ...  
WO/2018/162070A1
The invention relates to an electrostatic substrate retainer (2) for holding and retaining a substrate (4), having: a rotor (6, 6', 6'', 6'''), which has a retainer (7, 7', 7'') for fastening the substrate (4) on a retaining surface (7h,...  
WO/2018/163502A1
The present invention pertains to a film formation technique using charged particles and suppressing nonuniformity in the film thickness distribution caused by a leakage magnetic field. Provided is a film formation method embodying the t...  
WO/2018/165235A1
Micromachined ultrasonic transducers integrated with complementary metal oxide semiconductor (CMOS) substrates are described, as well as methods of fabricating such devices. Fabrication may involve two separate wafer bonding steps. Wafer...  
WO/2018/163599A1
Obtained is a semiconductor device in which occurrence of chipping in a thin semiconductor element during conveyance is suppressed. The semiconductor device is provided with: a semiconductor element (1) having a front surface electrode (...  
WO/2018/163012A1
Provided is a semiconductor device having good electrical properties. This semiconductor device has an oxide, an insulator, and a conductor overlapping a first region of the oxide with the insulator interposed therebetween, wherein the o...  
WO/2018/163752A1
The present invention relates to a method for manufacturing a wafer by cutting a semiconductor single crystal ingot, the method being characterized in that: wafer-shaped workpieces are obtained by slicing the semiconductor single crystal...  
WO/2018/164180A1
This apparatus 10 for manufacturing a semiconductor device is provided with: a base part 12; a bonding stage 14 having a placement surface 15 on which the substrate 100 is placed, the bonding stage being provided on the base part 12; and...  
WO/2018/164175A1
An adhesive tape for semiconductor processing, which is composed of a substrate and an adhesive layer that is provided on one surface of the substrate, and which is characterized in that: the substrate has a multilayer structure; at leas...  
WO/2018/163721A1
The present invention relates to a carrier for a double-sided polishing device, the carrier having: a carrier base material in which a holding hole for holding a wafer during polishing is formed; and an insert material disposed along the...  
WO/2018/163995A1
The purpose of the present invention is to provide a pattern formation method which has high throughput and for which a shot area can be processed with uniform precision. A pattern formation method characterized in that, in a method for ...  
WO/2018/161206A1
A method for fabricating a tunneling field effect transistor and a method for fabricating an inverter. The method for fabricating a tunneling field effect transistor comprises: fabricating a main axis (202) on a substrate (201); covering...  
WO/2018/163850A1
Provided is an epitaxial wafer reverse surface inspecting method capable of detecting a pin mark defect on a reverse surface of an epitaxial wafer, and capable of quantitatively evaluating a defect size of each point-like defect in the p...  
WO/2018/161526A1
A display substrate, a display panel and a preparation method for the display substrate, wherein the display substrate comprises: a backing substrate (20); a plurality of sub-pixel regions (22) arranged in an array on the surface of the ...  
WO/2018/161511A1
A magnetic field generation mechanism of a reaction chamber (17) and the reaction chamber (17). The magnetic field generation mechanism comprises a coil (1) surrounding the reaction chamber (17); the coil (1) comprises a columnar spiral ...  
WO/2018/163020A1
In order to provide a semiconductor device with high reliability and favorable electrical characteristics, this semiconductor device has: a first insulator having an opening; a first conductor provided inside the opening and having a fir...  
WO/2018/163839A1
The present technique relates to a semiconductor device and a production method, which enable decrease of PID. The present technique provides a semiconductor device which comprises: a first layer; a second layer that is laminated on the ...  
WO/2018/163605A1
[Problem] To provide a semiconductor device with which it is possible to minimize increases in production cost and ensure high reliability while reducing parasitic capacitance. [Solution] There is provided a semiconductor device equipped...  
WO/2018/165296A1
A method of depositing a metal seed for performing bottom-up gapfill of features of a substrate includes providing a substrate including a plurality of features; flowing a dilute metal precursor solution into the features, wherein the di...  
WO/2018/161205A1
An apparatus for cleaning semiconductor substrates includes a chamber (101), a chuck (102), a liquid collector (104), an enclosing wall (105), at least one driving mechanism (106), at least one internal dispenser (111), and at least one ...  
WO/2018/163386A1
Provided is a technology for enabling uniform substrate processing. The technology comprises: a processing chamber for processing a substrate; a heating device including a plurality of microwave supply sources for supplying microwaves fo...  

Matches 1 - 50 out of 1,012,343