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WO/2011/124088 |
A gate stack structure and a manufacturing method thereof are provided. The structure comprises a gate dielectric layer (120) formed on an active region and a connection region (104) in a substrate (100); a gate formed on the gate dielec...
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WO/2011/125940 |
Disclosed is a TFT which employs an oxide semiconductor as an active layer (channel layer) and is provided with a resistance layer between the active layer and either the source electrode or drain electrode, wherein the ON current is inc...
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WO/2011/125456 |
The semiconductor device includes the read circuit which reads data written to a memory cell. The read circuit includes a first transistor, a second transistor, a first switch, and a second switch. A first terminal of the first transisto...
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WO/2011/124061 |
A method for fabricating a semiconductor device and a semiconductor device are provided. The method comprises: providing a substrate(101); forming a gate stacking on the substrate(102); forming an interlayer dielectric layer covering the...
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WO/2011/125353 |
Disclosed is a circuit board (1) which is provided with a plurality of transistor elements, which are provided on the same insulating substrate (2) corresponding to two-dimensionally arranged pixels or a group of a predetermined number o...
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WO/2011/126609 |
Transistors (21, 41) employing floating buried layers may be susceptible to noise coupling into the floating buried layers. In IGFETS this is reduced or eliminated by providing a normally-ON switch (80, 80') coupling the buried layer (10...
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WO/2011/124001 |
A semiconductor device and a manufacturing method thereof are provided. The method includes the steps: providing a semiconductor substrate (1001), forming a transistor structure on the semiconductor substrate (1001), the transistor struc...
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WO/2011/126770 |
A transistor includes a source region including a first impurity region implanted into a substrate, a drain region including a second impurity region implanted into the substrate, and a gate including an oxide layer formed over the subst...
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WO/2011/126609 |
Transistors (21, 41) employing floating buried layers may be susceptible to noise coupling into the floating buried layers. In IGFETS this is reduced or eliminated by providing a normally-ON switch (80, 80') coupling the buried layer (10...
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WO/2011/122345 |
Disclosed is a pressure detection device equipped with a glass substrate (140) as a substrate; a lower electrode (172) disposed above the glass substrate (140); an upper electrode (171) including one or more holes (173) as pass-through o...
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WO/2011/123115 |
A nanoscale switching device has an active region containing a switching material. The switching device has a first electrode and a second electrode with nanoscale widths, and the active region is disposed between the first and second el...
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WO/2011/122670 |
The disclosed semiconductor device contains: a semiconductor layer having a first conductivity type; a plurality of body regions that have a second conductivity type and that are formed at intervals at the surface layer of the aforementi...
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WO/2011/120979 |
A semiconductor device and a method of forming a structure in a target substrate for manufacturing a semiconductor device is provided. The method comprises the step of providing a masking layer (120) on the target substrate (110) and pro...
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WO/2011/122514 |
An object of the present invention is to provide a highly reliable power supply device which can withstand long-term use. Another object of the present invention is to provide a power supply device with reduced power consumption. The pow...
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WO/2011/121738 |
Disclosed is an n-channel HK/MG transistor, which has a gate insulating film composed of a first high dielectric material film containing La and Hf, and a gate electrode composed of a laminated film composed of a metal film and a polycry...
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WO/2011/122322 |
Provided is a crack-free epitaxial substrate. Said epitaxial substrate is configured by forming group III nitride layer groups on a foundation substrate consisting of (111)-oriented single crystal silicon, in such a way that that the (00...
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WO/2011/122364 |
An object is to stabilize electric characteristics of a semiconductor device including an oxide semiconductor to increase reliability. The semiconductor device includes an insulating film; a first metal oxide film on and in contact with ...
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WO/2011/122206 |
Disclosed is a method for manufacturing a laminated body wherein a short-circuit and a leak generated between the lower electrode and the upper electrode can be suppressed. Also disclosed is the laminated body. The laminated body (1) is ...
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WO/2011/123332 |
A transistor includes an n-well implanted in a substrate, a source region including a p-body region in the n-well, and a n+ region and a p+ region in the p-body region, a drain region including a n+ region, and a dual gate between the so...
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WO/2011/123332 |
A transistor includes an n-well implanted in a substrate, a source region including a p-body region in the n-well, and a n+ region and a p+ region in the p-body region, a drain region including a n+ region, and a dual gate between the so...
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WO/2011/122176 |
There are dangling bonds (33) of silicon atoms (31) on the surface of a silicon nitride film, which is formed as a gate insulating film on a glass substrate, before the formation of a microcrystalline silicon film that constitutes a chan...
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WO/2011/120344 |
A light emitting diode is provided, comprising: a p-doped region defining a first end surface and a second end surface opposite to each other; and an n-doped region defining a first end surface and a second end surface opposite to each o...
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WO/2011/121680 |
Disclosed is a flowrate sensor having a flowrate detection means built into a surface mounted package. The flowrate sensor is equipped with: a fluid path (70) that is formed within the package (12), and which draws fluid from a fluid int...
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WO/2011/121776 |
Disclosed is a process for producing a semiconductor device in which a lattice-relaxed SiGe layer is formed on an insulation layer. In the process, a SiGe layer formed on an insulation layer is so processed as to have an island-like stru...
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WO/2011/121830 |
Disclosed is a lateral field effect transistor which has improved switching speed and is reduced in operational failure. Specifically, a gate wiring line (43) comprises a base portion (44), a plurality of finger-like portions (45) that p...
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WO/2011/122205 |
Disclosed are a thin film transistor and an image display device that are capable of being produced more simply and with fewer production steps. The method for producing a thin film transistor, as set forth in claim 1 of the present inve...
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WO/2011/123333 |
A transistor includes an n-well implanted in a substrate, a source region including a p-body region, a n+ region and a p+ region in the p-body region, a drain region comprising a n+ region, and a gate between the source region and the dr...
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WO/2011/122280 |
A semiconductor display device comprising a pixel portion and a signal line driver circuit comprising a first circuit, a second circuit configured to control timing of the sampled serial video signals by the first circuit, and a third ci...
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WO/2011/122363 |
The oxide semiconductor film has the top and bottom surface portions each provided with a metal oxide film containing a constituent similar to that of the oxide semiconductor film. An insulating film containing a different constituent fr...
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WO/2011/123333 |
A transistor includes an n-well implanted in a substrate, a source region including a p-body region, a n+ region and a p+ region in the p-body region, a drain region comprising a n+ region, and a gate between the source region and the dr...
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WO/2011/118104 |
Disclosed is a semiconductor device (1) that has semiconductor layers (21-25) and a substrate (2). The semiconductor layers (21-25) are made from silicon carbide, and comprise at least a part of the current path. The substrate (2) has a ...
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WO/2011/117936 |
Disclosed is a transistor which is provided with: a base layer (301) formed on a substrate (300); and an operation layer (302), which is formed on the base layer (301), and is composed of a nitride semiconductor. The base layer (301) is ...
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WO/2011/116524 |
A trench type semiconductor device having low gate resistance and manufacturing method thereof and an element structure of power semiconductor device and a device distribution are provided, the semiconductor power device has: a buried tr...
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WO/2011/118321 |
Provided is a semiconductor device wherein a circuit, which is operative to prevent the occurrence of false firing by avoiding adverse effects that would otherwise be caused by a high temperature caused by a switching element, is formed ...
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WO/2011/118374 |
Disclosed are a sensor which operates at low cost and high sensitivity, and an energy-efficient wireless sensor platform which allows said sensor to operate. The sensor is provided with a detection film which emits heat due to incidence ...
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WO/2011/118512 |
In conventional IGBTs, accumulation quantity of holes is maintained by aggressively reducing the area rate of a main cell and suppressing the quantity of holes discharged to the emitter side, and conductivity modulation of a base layer i...
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WO/2011/116642 |
A micro electro mechanical system (MEMS) device and a method of forming the same are provided. The MEMS device comprises a semiconductor substrate (100); a well region (110) formed in the semiconductor substrate (100); a source region(11...
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WO/2011/118099 |
Disclosed is a field effect transistor with both high threshold voltage and low on resistance, a method of manufacture for the field effect transistor, and an electronic device. The field effect transistor comprises: a buffer layer (112)...
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WO/2011/118433 |
Provided is an epitaxial substrate for a semiconductor element having excellent Schottky contact characteristics, said characteristics being stable over time. The epitaxial substrate for a semiconductor element is provided with: an under...
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WO/2011/118101 |
Disclosed is a semiconductor device (1) having a principal surface (2A) with an off angle of at least -3° and up to +5° from a (0-33-8) surface in a <01-10> direction. The device is provided with a substrate (2) comprising silicon carb...
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WO/2011/118788 |
Disclosed is a method for manufacturing a silicon substrate having a glass embedded therein, wherein a step generated on the polishing surface due to the difference between the polishing rate of silicon and that of the glass is suppresse...
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WO/2011/116964 |
The invention relates to a method for providing a metal electrode on the surface of a hydrophobic material (7), comprising the steps of: moving an end of a capillary (5), containing a fluid comprising metal particles dissolved in a solve...
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WO/2011/118515 |
Disclosed is a display device provided with: a plurality of stripe-shaped data electrodes (3) which are formed on a first substrate (1) and which extend in the vertical direction; a plurality of scanning lines (11) and a plurality of ref...
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WO/2011/118176 |
Disclosed is an integrated circuit which contains carbon nanotube field-effect transistors and which can retain the excellent characteristics of those carbon nanotube field-effect transistors even if the manufacturing process of the inte...
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WO/2011/118364 |
It is an object to provide a semiconductor device for high power application which has good properties. A means for solving the above-described problem is to form a transistor described below. The transistor includes a source electrode l...
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WO/2011/118741 |
In a transistor including an oxide semiconductor film, a metal oxide film which has a function of preventing electrification and covers a source electrode and a drain electrode is formed in contact with the oxide semiconductor film, and ...
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WO/2011/118787 |
The disclosed manufacturing method for a glass-embedded silicon substrate enables the rapid embedding of glass and suppresses voids. Concave sections (52) are formed on the main surface of a silicon substrate main body (51). A first main...
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WO/2011/118076 |
A semiconductor device which comprises a substrate (37), a non-volatile memory (a memory cell) (21) comprising a memory cell transistor (a switching element ) (33) and a floating gate electrode (a memory retention part) (36), and a passi...
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WO/2011/118395 |
Disclosed is a magnetic memory element provided with: a first magnetization free layer which is constructed from a ferromagnetic body having perpendicular magnetic anisotropy; a reference layer which is provided near the first magnetizat...
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WO/2011/118098 |
Disclosed is a field effect transistor with both high threshold voltage and low on resistance, a method of manufacture for the field effect transistor, and an electronic device. The field effect transistor comprises: a buffer layer (112)...
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