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Matches 1 - 50 out of 268,809

Document Document Title
WO/2018/168676A1
Provided is a resin which is excellent in terms of solubility in common solvents, crosslinking temperature, time required for crosslinking, solvent resistance (cracking resistance), dielectric breakdown strength, leakage current, solvent...  
WO/2018/168639A1
This semiconductor device (100) comprises a TFT (10) that is supported by a substrate (11); and the TFT (10) comprises a gate electrode (12g), a gate insulating layer (14) that covers the gate electrode (12g), and an oxide semiconductor ...  
WO/2018/167602A1
Provided is a high-yield method for manufacturing a semiconductor device, the method comprising a peeling step. In the present invention, a peeling method comprises a step in which a first material layer and a second material layer are l...  
WO/2018/166411A1
Provided are a thin film transistor and an array substrate. The thin film transistor comprises a source electrode (17), a drain electrode (16) and an active layer (14). The thin film transistor further comprises: a barrier layer (15) loc...  
WO/2018/165809A1
A device includes a semiconductor substrate (100); a buried layer (101); and a trench (128) with inner walls extending from the buried layer (101) to a surface of the semiconductor substrate (100), the trench (128) having sidewalls, a bo...  
WO/2018/166088A1
Disclosed is a display panel, wherein the display panel comprises: a substrate (1); an active switch (2) arranged on the substrate (1); and a light shielding layer (3) arranged between the active switch (2) and the substrate (1), wherein...  
WO/2018/168013A1
This MEMS sensor is provided with: a plurality of pressure detection units having a plurality of first electrodes 11 and a plurality of second electrodes 12 which respectively face each other with cavity portions 13 therebetween; and a c...  
WO/2018/166018A1
Provided are a thin-film transistor and method for manufacturing same, and a display panel. During an annealing process, an aluminum layer (21) is combined with oxygen ions in an amorphous oxide semiconductor layer (24) to form an Al2O3 ...  
WO/2018/169762A1
In debonding a temporarily adhesive-bonded carrier-workpiece pair by a combination of chemical and mechanical methods, solvents or chemicals are used to remove the adhesives primarily through dissolution, and a thin wire, filament, or bl...  
WO/2018/168984A1
An active matrix substrate according to an aspect of the present invention is provided with: a pixel unit having a plurality of gate lines, a plurality of source lines, and a plurality of pixel electrodes; and a division switch circuit f...  
WO/2018/167601A1
Provided is a semiconductor device which is microfabricated and is highly integrated. The present invention comprises: an oxide semiconductor having a first region, a second region, and a third region adjacent to the first region and the...  
WO/2018/168004A1
The present invention provides: metal fine particles which exhibit sufficient electrical conductivity and transistor characteristics with a firing temperature around 120°C; a metal fine particle dispersion which contains the metal fine ...  
WO/2018/167925A1
A highly reliable semiconductor device can be obtained. A semiconductor device (11) comprises a semiconductor substrate, a first gate wiring (22) and a second gate wiring (22), a first metal part (20a), an insulating member (40), and a s...  
WO/2018/167591A1
Provided is a semiconductor device which can be microfabricated or highly integrated. The present invention comprises a first conductive body, a second conductive body on the first conductive body, a first insulating body covering the se...  
WO/2018/167588A1
Provided is a semiconductor device which can be microfabricated or highly integrated. The semiconductor device has an oxide in a channel formation region. The semiconductor device comprises a first transistor, a second transistor, a firs...  
WO/2018/169528A1
An integrated circuit structure is provided which comprises: a stack of source regions of a stack of transistors and a stack of drain regions of the stack of transistors; and a gate stack that forms gate regions for the stack of transist...  
WO/2018/167593A1
Provided are a novel material, and a transistor in which the novel material is used. A composite oxide having at least two regions, wherein one of the regions includes In, Zn, and element M1 (where element M1 is one or more of Al, Ga, Si...  
WO/2018/169009A1
An imaging device according to an embodiment of the present invention comprises: a photoelectric conversion unit that converts incident light into an electrical charge; and a detection unit that detects the electrical charge generated by...  
WO/2018/167871A1
[Problem] To increase dv/dt withstand capability without significantly affecting ON characteristics of a semiconductor device. [Solution] In a semiconductor 1, in a plane parallel to a main surface 10a, a main electrode 22 includes: an e...  
WO/2018/166024A1
A method for manufacturing a TFT and a method for manufacturing an array substrate. The method comprises: forming, on a base substrate (20), transfer layers (212) that are provided alternately at intervals; forming, on the transfer layer...  
WO/2018/169024A1
(Object) To miniaturize a field-effect transistor. (Means of Achieving the Object) A field-effect transistor includes a semiconductor film formed on a base, a gate insulating film formed on a part of the semiconductor film, a gate electr...  
WO/2018/168069A1
This semiconductor device has a first JTE region formed around an active section, a second JTE region formed around the first JTE region, and a third JTE region formed around the second JTE region. The first JTE region, second JTE region...  
WO/2018/163286A1
A silicon carbide semiconductor device (100) is provided with: a diffusion protection layer (9) that is provided below a gate insulating film (7) on the bottom surface of a gate trench (6); gate wiring (18), which is provided on an insul...  
WO/2018/163618A1
[Problem] To provide a magnetic memory with which the occurrence of inversion errors can be suppressed and stable recording can be achieved. [Solution] A magnetic memory comprises: a spin orbit layer in which spin-polarized electrons are...  
WO/2018/163013A1
The present invention provides a semiconductor device having stable electrical properties. The present invention also provides a semiconductor device having high reliability. This semiconductor device has a gate electrode, a source elect...  
WO/2018/164656A1
Disclosed herein are quantum nanowire devices, and related methods and computing devices. In some embodiments, a quantum nanowire device may include: a plurality of nanowires parallel to each other; a first gate surrounding individual on...  
WO/2018/162993A1
A method for producing a thin-film-transistor involves forming a flexible substrate on a rigid substrate, forming a plurality of fins and trenches in a structural layer arranged on the flexible substrate, forming a wavy gate layer, chann...  
WO/2018/163469A1
This MEMS sensor comprises a first MEMS (a first MEMS and a drive circuit therefor) and a second MEMS (a second MEMS and a drive circuit therefor). This MEMS sensor comprises: a voltage application unit (a booster circuit) which applies ...  
WO/2018/163575A1
[Problem] To provide a ferromagnetic tunnel junction element and a method for manufacturing the same with which it is possible to avoid increasing the element occupation area and the number of manufacturing steps, while also avoiding var...  
WO/2018/163872A1
The present disclosure relates to a semiconductor device and an electronic apparatus with which a higher withstand voltage can be achieved. In an N-type well on a surface of a semiconductor substrate, an outer peripheral structure region...  
WO/2018/164655A1
Disclosed herein are techniques for providing isolation in integrated circuit (IC) devices, as well as IC devices and computing systems that utilize such techniques. In some embodiments, a protective layer may be disposed on a structure ...  
WO/2018/163012A1
Provided is a semiconductor device having good electrical properties. This semiconductor device has an oxide, an insulator, and a conductor overlapping a first region of the oxide with the insulator interposed therebetween, wherein the o...  
WO/2018/165174A1
Methods and designs are provided for a vertical power semiconductor switch having an IGBT-with-built-in-diode bottom-side structure combined with a SJMOS topside structure in such a way as to provide fast switching with low switching los...  
WO/2018/161206A1
A method for fabricating a tunneling field effect transistor and a method for fabricating an inverter. The method for fabricating a tunneling field effect transistor comprises: fabricating a main axis (202) on a substrate (201); covering...  
WO/2018/163020A1
In order to provide a semiconductor device with high reliability and favorable electrical characteristics, this semiconductor device has: a first insulator having an opening; a first conductor provided inside the opening and having a fir...  
WO/2018/163605A1
[Problem] To provide a semiconductor device with which it is possible to minimize increases in production cost and ensure high reliability while reducing parasitic capacitance. [Solution] There is provided a semiconductor device equipped...  
WO/2018/163167A1
A novel electric rectifier for use in a rectenna device is provided. The rectenna device can advantageously be used in a variety of applications. The electric rectifier comprises an integrated structure comprising: a diode structure comp...  
WO/2018/161397A1
A TFT array substrate (10), comprising a substrate (11) and a TFT switch (101) formed on the substrate (11). The TFT switch (101) comprises a polysilicon layer (12), a gate (13), a first lightly-doped region (14), and a heavily-doped reg...  
WO/2018/163944A1
The present invention provides a semiconductor device capable of ensuring a high level of reliability while realizing higher definition. This semiconductor device comprises a substrate and a thin-film transistor supported by the substrat...  
WO/2018/164856A1
Switches for electromagnetic radiation, including radiofrequency switches and optical switches, are provided. Also provided are methods of using the switches. The switches incorporate layers of high quality VO2 that are composed of a plu...  
WO/2018/162965A1
A technique relates to a superconducting quantum device. A fixed frequency transmon qubit (110A) is provided. A tunable frequency transmon qubit (110B) is provided. The fixed frequency transmon qubit (110A) is coupled to the tunable freq...  
WO/2018/163593A1
A drift layer (2) comprises silicon carbide, and has a first electrical conductivity type. A trench bottom part protection layer (7) is provided on the bottom part of a gate trench (6), and has a second electrical conductivity type. A de...  
WO/2018/163624A1
This semiconductor device is provided with: a semiconductor substrate (11) which is a drift layer (12); a base layer (13); a plurality of trenches (14); an emitter region (15); an emitter electrode (20); a collector layer (30); a collect...  
WO/2018/163997A1
This active matrix substrate is provided with a substrate (1), a peripheral circuit which comprises a plurality of first TFTs 10, and a plurality of second TFTs (20). Each one of the first and second TFTs (10, 20) comprises: gate electro...  
WO/2018/163913A1
The production method according to the present invention comprises: a step for supplying, in a laminate in which layer pairs each having a wiring layer formed on an insulation layer form a stepped configuration, a catalyst solution on th...  
WO/2018/161412A1
A SiC dual-trench MOSFET device having an integrated Schottky diode: two trenches are provided in a cell structure of an active region of a SiC dual-trench MOSFET device, said trenches being a gate trench which is provided in the center ...  
WO/2018/165088A1
A Schottky contact structure (18) for a semiconductor device (10) having a Schottky contact (20) and an electrode (22) for the contact structure disposed on the contact. The Schottky contact comprises: a first layer (24) of a first metal...  
WO/2018/163287A1
In the gate electrode forming step according to the present invention, a second metal film (18b) is formed on a first metal film (18a) by adding oxygen or nitrogen to an inert gas atmosphere, and after patterning the first metal film (18...  
WO/2018/163583A1
Provided is a magnetic memory with which multivalued information can be recorded in a first memory cell (10) and an increase in the manufacturing costs can be suppressed, the magnetic memory comprising: first and second tunnel junction e...  
WO/2018/163946A1
A semiconductor device (100) according to an embodiment of the present invention comprises: a substrate (1); a plurality of TFTs (10) supported by the substrate; and a protective layer (20) covering the plurality of TFTs. Each TFT is a b...  

Matches 1 - 50 out of 268,809