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Matches 1 - 50 out of 266,334

Document Document Title
WO/2018/070263A1
The present invention comprises: a step for forming, on the front surface of a SiC substrate 1, an active region of a semiconductor device; a step for forming, on the rear surface of the SiC substrate 1, a SiC substrate-drain electrode b...  
WO/2018/070349A1
Provided are: an imaging panel for X rays which is capable of suppressing leak current from a photoelectric conversion layer; and a manufacturing method therefor. An imaging panel 1 generates an image on the basis of scintillation light ...  
WO/2018/068406A1
A dual-gate InGaAs PMOS field-effect transistor, which relates to the technical field of semiconductor integrated circuit manufacturing. The field-effect transistor comprises a bottom gate electrode (101), a bottom gate dielectric layer ...  
WO/2018/070034A1
A region comprising SiO2 layers (221-226), Si3N4 layers (321-326), and SiO2 layers (421-426), and C layers (6bc, 6bd) and SiO2 layers (7bc, 7bd) both ends of which in a Y-Y' direction are located on the SiO2 layers (421, 423, 424, 426) a...  
WO/2018/068170A1
A thin film transistor, a display panel and a display apparatus having the same, and a fabricating method thereof are provided. The thin film transistor includes a base substrate (BS) and an active layer (AL) on the base substrate (BS) h...  
WO/2018/070808A1
A transistor comprises: a substrate; a first and a second type of wells contacting each other at an upper portion of the substrate; and a breakdown voltage improvement region forming vertical high concentration-doped areas according to e...  
WO/2018/070260A1
The present disclosure relates to a semiconductor device, a method for manufacturing a semiconductor device, and a plasma induced damage (PID) protection device, which enable highly efficient avoidance of a large PID charge and high-prec...  
WO/2018/068221A1
A thin film transistor includes a base substrate (BS); an active layer (AL) on the base substrate (BS) comprising a channel region (CR), a source electrode contact region (SCR), and a drain electrode contact region (DCR); a gate insulati...  
WO/2018/068301A1
Provided are a diode and a manufacturing method thereof. The diode comprises: a first substrate (112), the first substrate being an n-type doped substrate and having a doping concentration equal to or greater than 1×1018cm-3; a first se...  
WO/2018/070417A1
This structure includes: a metal oxide semiconductor layer; and a noble metal oxide layer, wherein the metal oxide semiconductor layer and the noble metal oxide layer are adjacent to each other, and the film thickness of the noble metal ...  
WO/2018/067250A1
A layer stack including an alternating stack of insulating layers and sacrificial material layers is formed over a substrate. After formation of memory stack structures, backside trenches are formed through the layer stack. The sacrifici...  
WO/2018/066483A1
A semiconductor element which comprises an n-type Si portion, a first layer that is arranged on the n-type Si portion, a second layer that is arranged on the first layer, and an electrode layer that is arranged on the second layer. The f...  
WO/2018/064893A1
A light enhanced vibration energy harvesting device and an array are disclosed in the present disclosure, the light enhanced vibration energy harvesting device comprising a thin film transistor and a piezoelectric unit. The piezoelectric...  
WO/2018/066143A1
One of the problems addressed by the present invention is to provide an optical sensor, a solid-state imaging device, and a signal reading method drive therefor that greatly contribute to a further development of industry and to the real...  
WO/2018/066173A1
A silicon carbide epitaxial substrate includes: a silicon carbide single crystal substrate which has a main surface tilted at more than 0º and equal to or less than 8º to the {0001} plane and has a diameter of 100 mm or more; a silicon...  
WO/2018/067843A1
Embodiments of the present disclosure relate to a heating, ventilating, air conditioning, and refrigeration (HVAC&R) system that includes a variable speed drive (52) configured to provide power to a motor (50) that drives a compressor (3...  
WO/2018/066172A1
According to one embodiment of the present invention, a laser annealing device (1) is provided with: a laser oscillator (4) that generates a laser beam (L); a floating transfer stage (3) for floating and transferring a workpiece (W) to b...  
WO/2018/065861A1
The purpose of the present invention is to reutilize glass substrates, and to increase semiconductor device mass productivity. A glass substrate comprises on one surface thereof a first material and a second material. The first material ...  
WO/2018/066547A1
An oxide sintered body which contains a perovskite phase and a bixbyite phase represented by In2O3.  
WO/2018/066496A1
The present invention improves the dielectric breakdown resistance of a power module which comprises an SiC-IGBT and an SiC diode. This power module comprises an SiC-IGBT 110 and an SiC diode 111; and the film thickness of a resin layer ...  
WO/2018/066202A1
According to one embodiment of the present invention, a laser irradiation device (1) has: an optical system module (20) that applies laser light (L1) to a subject to be irradiated; a blocking plate (51), in which a slit (54) for passing ...  
WO/2018/066662A1
When a portion of a p-type SiC layer (50) for forming a p-type deep layer (5), said portion being formed above the surface of an n+-type source region (4), is removed, a sacrificial layer (60) having fluidity is formed on the p-type SiC ...  
WO/2018/063206A1
Described herein are quantum integrated circuit (IC) assemblies that include quantum circuit components comprising a plurality of qubits and control logic coupled to the quantum circuit components and configured to control operation of t...  
WO/2018/063363A1
An embodiment includes a transistor comprising: first, second, and third layers each including a group III-V material; a channel included in the second layer, which is between the first and third layers; and a gate having first and secon...  
WO/2018/063160A1
Methods and apparatus to form GaN-based transistors during backend-of-line processing are disclosed. An example integrated circuit includes a first transistor formed on a first semiconductor substrate. The example integrated circuit incl...  
WO/2018/063489A1
A field efect transistor having at least a gate, source, and drain electrodes and a semiconductor channel for controlling transport of charge carriers between the source and drain electrodes, the gate being insulated from the channel by ...  
WO/2018/059108A1
A semiconductor device, manufacturing method thereof, and electronic apparatus comprising same. The semiconductor device comprises: a substrate (1001); a first device and a second device formed on the substrate (1001), wherein the first ...  
WO/2018/061711A1
A semiconductor device (1) is provided with: a nitride semiconductor chip (6) that has a silicon substrate (2) having a first thermal expansion coefficient and a InxGayAl1-x-yN layer (0≤x≤1, 0≤y≤1, 0≤x+y≤1) formed in contact ...  
WO/2018/063252A1
Methods and apparatus to form silicon-based transistors on group III-nitride materials using aspect ratio trapping are disclosed. An example integrated circuit includes a group III-nitride substrate and a fin of silicon formed on the gro...  
WO/2018/060240A1
The first object of the invention is directed to a UV detector comprising a p-n junction with a substrate coated with a layer of p-type oxide material, said p-type oxide material being coated with a layer of n-type oxide material which i...  
WO/2018/063333A1
Techniques are disclosed for forming tunneling transistors including source and drain (S/D) regions processed through contact trenches. The techniques allow for final S/D material formation to be delayed in the process flow, thereby help...  
WO/2018/058939A1
Provided are a thin film transistor, a GOA circuit, a display substrate and a display device. The thin film transistor comprises a first electrode (310), a second electrode (320) and a third electrode (330). The first electrode (310) and...  
WO/2018/061819A1
[Problem] To provide: an organic semiconductor film which is capable of effectively inhibiting the formation and expansion of cracks, even if patterned or exposed to high heat; an organic semiconductor transistor in which the organic sem...  
WO/2018/063397A1
Embodiments of the invention include an RF switch and methods of forming an RF switch. In an embodiment, the RF switch may include a semiconductor substrate with a GaN active device layer. The RF switch may further include a transistor r...  
WO/2018/063613A1
A sensor assembly is provided with a housing, a sensor package, and terminals. The housing may Include a connector opening configured to mate with a wire harness connector. The sensor package may include conductive pads exposed in a surf...  
WO/2018/063165A1
Embodiments of the present disclosure describe a non-planar gate thin film transistor. An integrated circuit may include a plurality of layers formed on a substrate, and the plurality of layers may include a first one of a source or drai...  
WO/2018/063269A1
Disclosed herein are single electron transistor (SET) devices, and related methods and devices. In some embodiments, a SET device may include: first and second source/drain (S/D) electrodes; a plurality of islands, disposed between the f...  
WO/2018/063395A1
A semiconductor structure including a group III-N semiconductor material is disposed on a silicon substrate. A group III-N transistor structure is disposed on the group III-N semiconductor material. A well is disposed in the silicon subs...  
WO/2018/063315A1
Techniques are disclosed for forming tunneling transistors including source and drain (S/D) regions employing a contact resistance reducing layer. The contact resistance reducing layer may be formed between at least one of the S/D region...  
WO/2018/060679A1
We disclose herein a method of manufacturing a silicon carbide (SiC) based insulated gate bipolar transistor (IGBT), the IGBT comprising: a monocrystalline silicon substrate; a collector region of a first conductivity type disposed over ...  
WO/2018/061435A1
This spin current magnetization reversal element is provided with: a ferromagnetic metal layer; and a spin orbital torque wiring extending in a first direction that intersects the lamination direction of the ferromagnetic metal layer, an...  
WO/2018/063407A1
A transistor including a gate stack and source and drain on opposing sides of the gate stack; and a first material and a second material on the substrate, the first material disposed between the substrate and the second material and the ...  
WO/2018/063399A1
Embodiments of the invention include a semiconductor device and methods of forming such devices. In an embodiment, the semiconductor device includes a source region, a drain region, and a channel region formed between the source region a...  
WO/2018/063202A1
Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack including a barrier layer and a quantum well layer; gate...  
WO/2018/063356A1
A semiconductor layer is deposited on a subfin layer on a substrate. A charge trap layer is deposited on a portion of the semiconductor layer. The semiconductor layer has at least one of a thermal resistivity and a carrier velocity great...  
WO/2018/063272A1
Graphitic barrier layers for metal interconnects are described. The graphitic barrier layers are substantially conformal to a metal feature portion of an interconnect and have thicknesses in a range from 0.3 nanometers (nm) to 2 nm. This...  
WO/2018/063138A1
Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include a base and a fin extending away from the base and including a quantum well lay...  
WO/2018/063270A1
Disclosed herein are quantum dot devices with single electron transistor (SET) detectors. In some embodiments, a quantum dot device may include: a quantum dot formation region; a group of gates disposed on the quantum dot formation regio...  
WO/2018/060237A1
The first object of the invention is directed to a three-layer architecture p-n junction comprising a substrate as first layer, a second layer of p-oxide material coated on said substrate, and a third layer of n-oxide material coated on ...  
WO/2018/059109A1
A semiconductor device, manufacturing method thereof, and electronic apparatus comprising same. The semiconductor device comprises: a substrate (1001); a first source/drain layer (1005), a trench layer (1009), and a second source/drain l...  

Matches 1 - 50 out of 266,334