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Matches 1 - 50 out of 282,464

Document Document Title
WO/2021/003806A1
A semiconductor device and a manufacturing method therefor. The semiconductor device comprises: a first electrode layer (1); a substrate layer (2) located on the first electrode layer (1); an epitaxial layer (3) located on the substrate ...  
WO/2021/007002A1
Three-dimensional integration can overcome scaling limitations by increasing transistor density in volume rather than area. To provided gate-all-around field-effect-transistor devices with different threshold voltages and doping types on...  
WO/2021/003871A1
A flexible array substrate, comprising a first flexible substrate (11), a water-oxygen barrier layer (12), a second flexible substrate (13), a buffer layer (14), and an array structure layer; a portion of the array structure layer locate...  
WO/2021/005847A1
The layered body includes: a base part comprising silicon carbide and having a first surface that is a silicon surface; and a carbon atom thin film disposed over the first surface and comprising carbon atoms, the carbon atom thin film ha...  
WO/2021/007536A1
A method for microfabrication of a three dimensional transistor stack having gate-all- around field-effect transistor devices. The channels hang between source/drain regions. Each channel is selectively deposited with layers of materials...  
WO/2021/005796A1
According to this method for manufacturing a flexible light-emitting device, a laminate structure (100) is readied, the laminate structure (100) being provided with: a base (10); a functional layer region (20) including a TFT layer and a...  
WO/2021/005846A1
A terminal region of a semiconductor substrate in a semiconductor device has a plurality of p-type guard rings and a plurality of first diffusion regions. When the semiconductor substrate is seen in a plan view, one of the plurality of f...  
WO/2021/005903A1
Provided is a silicon carbide semiconductor device (60) comprising: an active region (51); and a terminal structure (52) arranged outside the active region (51). The silicon carbide semiconductor device (60) comprises: a second conductiv...  
WO/2021/005896A1
This semiconductor device has: a semiconductor substrate; a gate insulation film provided on a surface of the semiconductor substrate; a joining film that is provided on the gate insulation film and that contains silicon or aluminum; and...  
WO/2021/006565A1
A thin film transistor according to an embodiment of the present invention comprises an active layer formed between a gate insulating film and source and drain electrodes. The active layer comprises: a first metal oxide thin film; a seco...  
WO/2021/005435A1
Provided is a semiconductor device that has a large storage capacity per unit area. The semiconductor device has: a first insulating body having a first opening; a first conductor upon the first insulating body and having a second openin...  
WO/2021/005432A1
Provided is a semiconductor device having a large storage capacity. The semiconductor device comprises: an oxide disposed on a substrate; a plurality of first electrical conductors on the oxide; a first insulator which is disposed on the...  
WO/2021/007003A1
Microfabrication of a collection of transistor types on multiple transistor planes in which both HV (high voltage transistors) and LV (low-voltage transistors) stacks are designed on a single substrate. As high voltage transistors requir...  
WO/2021/005798A1
According to the method for manufacturing a flexible light emitting device of the present disclosure, a laminate structure (100) is prepared that comprises: a base (10); a functional layer region (20) including a TFT layer and a light-em...  
WO/2021/006105A1
This terahertz device includes a base material, a terahertz element, an antenna base, and a reflective film. The terahertz element is attached to the base material and generates electromagnetic waves. The antenna base is provided in a po...  
WO/2021/003767A1
The present invention provides a manufacturing method for a thin film transistor substrate, and a thin film transistor substrate. The manufacturing method for a thin film transistor substrate of the present invention comprises: sequentia...  
WO/2021/003773A1
Provided are a fabrication method for a flexible array substrate, a flexible array substrate and a flexible display apparatus. The fabrication method for a flexible array substrate uses a silver nanowire material to form a conductive pat...  
WO/2021/006219A1
A magnetic element (100) according to an embodiment comprises: a wiring layer (10) which extends in a first direction (x) and includes a ferromagnetic body; and a nonmagnetic layer (20) which is laminated in a second direction (z), onto ...  
WO/2021/007399A1
In the highly efficient fabrication processes for HNOR arrays provided herein, the channel regions of the storage transistors in the HNOR arrays are protected by a protective layer after deposition until the subsequent deposition of a ch...  
WO/2021/006526A1
The present invention relates to a semiconductor element and a method for manufacturing same, wherein the semiconductor element may comprise: a base element, an intermediate layer formed in at least one direction of the base element; and...  
WO/2021/002225A1
A semiconductor device according to the present invention comprises a semiconductor element, a first lead, a second lead, and a connection lead. The semiconductor element comprises: an electron transit layer formed from a nitride semicon...  
WO/2021/001719A1
The present invention relates to a high-performance imaging device that can be manufactured in a small number of steps. In the present invention: a first stacked body is formed, said stacked body being obtained by stacking a circuit, in ...  
WO/2021/002942A1
Some embodiments include a memory array having a vertical stack of alternating insulative levels and control gate levels. Channel material extends vertically along the stack. The control gate levels comprising conductive regions. The con...  
WO/2021/002282A1
The present invention improves transistor performance. A semiconductor device according to an embodiment is provided with an insulating film (12) isolating an n-type transistor forming region (Tr1) and a p-type transistor forming region ...  
WO/2021/001645A1
A method for producing a semiconductor device, which includes epitaxially forming a first layer of n-type conductivity on a substrate or on a previously epitaxially formed layer; epitaxially forming a body layer of p-type conductivity on...  
WO/2021/002115A1
[Problem] To provide a random number generating unit and a computing system using the same, the random number generating unit comprising a magnetic tunnel junction element and enabling development of characteristics required for executio...  
WO/2021/002276A1
Provided is a semiconductor integrated circuit comprising: a substrate; a first conductive-type impurity region formed on the substrate; and a plurality of second conductive-type impurity regions each independently formed in the first co...  
WO/2021/001363A1
The invention relates to a method for producing a device (1) comprising: a deposition of a first resin layer (5) of lithography above or on a protective layer (4) such that the protective layer (4) is included between a conductive layer ...  
WO/2021/002934A1
A method of forming a memory device includes forming a second insulation layer on a first conductive layer formed on a first insulation layer formed on semiconductor substrate. A trench is formed into the second insulation layer extendin...  
WO/2021/002892A1
A method of forming a memory device that includes forming a first polysilicon layer using a first polysilicon deposition over a semiconductor substrate, forming an insulation spacer on the first polysilicon layer, and removing some of th...  
WO/2020/258452A1
The present invention provides a display panel and a manufacturing method therefor. The display panel defines a display area and an edge area, and the display panel comprises a substrate, a gate layer, a gate insulating layer, a thin fil...  
WO/2020/261039A1
Provided is a semiconductor device withi minimized increase in circuit area and less power consumption. The semiconductor device has a high-frequency amplification circuit, an envelope detection circuit, and power supply circuit. The pow...  
WO/2020/260301A1
Autonomous security device and electrical system comprising a device of said kind. Security device comprising: a. a main input terminal (A) intended to be connected to a first DC voltage source (BAT), b. a main output terminal (B) intend...  
WO/2020/261692A1
Provided is a semiconductor device, characterized in that the semiconductor device is a multi-gate transistor having a plurality of gates in a common active region, wherein: the multi-gate transistor has, respectively in a source region ...  
WO/2020/261356A1
This semiconductor film has a corundum crystal structure composed of an α-Ga2O3 or α-Ga2O3-based solid solution, has a void, and includes a halogen element in the void.  
WO/2020/257974A1
Provided are a heterojunction bipolar transistor and a preparation method therefor. The heterojunction bipolar transistor comprises a substrate, and a collector region layer, a base region layer, and an emitter region layer which are seq...  
WO/2020/258865A1
Disclosed are a wafer and a method for manufacturing same, and a semiconductor device. The method for manufacturing a wafer comprises: providing a wafer body, wherein a scribe line for dicing is provided on the wafer body; and forming an...  
WO/2020/262541A1
An imaging device pertaining to an embodiment of the present disclosure comprises: a first substrate having a sensor pixel that performs photoelectric conversion; a second substrate having a pixel circuit that outputs a pixel signal on t...  
WO/2020/262110A1
The present invention provides a method for manufacturing an organic electronic device of superior long-term shelf-life in which the occurrence of deformations, such as wrinkles, in a seal member is suppressed. The present invention pe...  
WO/2020/261891A1
The present invention addresses the problem of providing a carbon nanotube liquid dispersion that can be applied, by inkjet, at a desired position with higher precision. This carbon nanotube liquid dispersion contains at least a solvent ...  
WO/2020/262501A1
A first imaging device according to one embodiment of the present disclosure comprises: a first substrate having, on a first semiconductor substrate, a first transistor and a photoelectric conversion unit constituting a sensor pixel; and...  
WO/2020/263339A1
A memory device includes a semiconductor channel extending between a source region and a drain region, a plurality of pass gate electrodes, a plurality of word lines, a gate dielectric located between the semiconductor channel and the pl...  
WO/2020/258496A1
The present application relates to a cell structure and a semiconductor device using the same. The cell structure comprises a semiconductor substrate; a plurality of slot units are provided at the top end of the semiconductor substrate; ...  
WO/2020/263557A1
A semiconductor device includes a plurality of nano-channel field-effect transistor stacks positioned adjacent to each other such that source-drain regions are shared between adjacent nano-channel field-effect transistor stacks, each nan...  
WO/2020/261574A1
The present invention provides an α-Ga2O3 semiconductor film which is capable of making the device characteristics uniform. This α-Ga2O3 semiconductor film has, as the main phase, a crystal having a corundum crystal structure that is c...  
WO/2020/264278A1
Single-axis teeter-totter accelerometers having a plurality of anchors are disclosed. The plurality of anchors may be arranged about a rotation axis of the teeter-totter proof mass. Each of the plurality of anchors may be coupled to the ...  
WO/2020/263635A1
Capacitor structures including a first island of a first conductive region and a second island of the first conductive region having a first conductivity type, an island of a second conductive region having a second conductivity type dif...  
WO/2020/262322A1
The present invention provides a processing method with which a desired shape can be easily obtained in the processing of an oxide semiconductor layer in which two oxide semiconductors having different crystallinities are stacked. This p...  
WO/2020/261471A1
A channel layer (103) has a quantum well configuration constituted by InGaAs or InGaAsSb, and is constituted by a barrier layer (131), a well layer (132), and a barrier layer (133). The present invention comprises an intermediate layer (...  
WO/2020/262502A1
A solid-state imaging device, according to the present invention, comprises, for each pixel: a first substrate having a photoelectric converter and a charge accumulator in which is stored a signal charge generated by the photoelectric co...  

Matches 1 - 50 out of 282,464