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Matches 1 - 50 out of 270,220

Document Document Title
WO/2018/221032A1
The present invention provides: an IGBT that achieves both low conduction loss and low switching loss; and a power conversion device to which the IGBT is applied. The present invention is characterized by being provided with: a semicondu...  
WO/2018/218986A1
A thin film transistor manufacturing method, a thin film transistor and a display substrate. The manufacturing method comprises: sequentially forming, on a base substrate (31), a polycrystalline silicon pattern layer (34) and a protectio...  
WO/2018/219110A1
A thin film transistor, a control method therefor, an array substrate, and a display device. The thin film transistor comprises: a substrate (100); a gate (5), provided on the substrate (100); a gate insulating layer, covering the surfac...  
WO/2018/221400A1
Provided is a pressure detection device capable of suppressing a load on a ceramic substrate. A pressure detection device (10) has: a ceramic substrate (20); and a pressure sensor (30) that is electrically connected to the substrate (20)...  
WO/2018/220491A1
Provided is a novel semiconductor device in which a storage circuit is constituted by a unipolar circuit that uses OS transistors. Thus, connections with different layers inside the storage circuit are unnecessary. Consequently, the numb...  
WO/2018/220470A1
Provided is a comparison circuit to which a negative voltage to be compared can be input directly. The comparison circuit includes a first input terminal, a second input terminal, a first output terminal, and a differential pair. The com...  
WO/2018/220741A1
Provided is a technique for obtaining sufficiently large drain current in a field effect type transistor using a nitride semiconductor. The invention involves: forming on the upper surface of a semiconductor substrate 1, a channel layer ...  
WO/2018/221327A1
This TFT substrate (101A) is provided with: a dielectric substrate (1); and a plurality of antenna unit areas (U) arranged on the dielectric substrate (1). Each of the plurality of antenna unit areas (U) has: a TFT (10); a patch electrod...  
WO/2018/218547A1
Disclosed are a metal oxide thin film transistor (10) and a display panel (100) having said metal oxide thin film transistor (10). The metal oxide thin film transistor (10) comprises a gate (11), a source (14) and a drain (15), wherein t...  
WO/2018/221711A1
The present invention provides a low-resistance nitride compound semiconductor which has been difficult to manufacturing in the past. Furthermore, high electron mobility is shown, and therefore it is possible to configure a high-performa...  
WO/2018/218880A1
A method for manufacturing an array substrate, and an array substrate and a display apparatus. The method for manufacturing an array substrate comprises: providing a base substrate (200); forming a semiconductor layer (213) on the base s...  
WO/2018/220879A1
Provided is a semiconductor device comprising a semiconductor substrate having a drift region of a first conductivity type, a first trench section provided from the upper surface of the semiconductor substrate to the interior of the semi...  
WO/2018/221294A1
An active matrix substrate according to an embodiment of the present invention is provided with: a substrate; a plurality of first TFTs supported by the substrate and provided in a non-display region; and a peripheral circuit including t...  
WO/2018/219084A1
Provided are a thin film transistor, a manufacturing method therefor, and an array substrate. The thin film transistor is formed on a base substrate (1), and the thin film transistor comprises: an active layer (4); a first signal metal l...  
WO/2018/220471A1
Provided is a low-power-consumption storage device. The storage device has first through third transistors, first wiring, second wiring, memory cells, and a capacitive element. The first through third transistors are serially connected. ...  
WO/2018/222976A1
Described herein is a technology for the creation of "smooth" metal oxide films or coatings using organic cross-linking agents to enable low-temperature sintering. These metal oxide films can be used in conjunction with low-melting tempe...  
WO/2018/217315A1
A compound semiconductor field effect transistor (FET) may include gallium nitride (GaN) and alloy material layers. The compound semiconductor FET may also include a pair of L-shaped contacts on the GaN and alloy material layers. The com...  
WO/2018/217269A1
A non-volatile memory cell stores 1.5 bits of data in three polarization states. The memory cell may have two ferroelectric layers and three electrodes. The energy bands of the ferroelectric layers are adjusted by providing two of the el...  
WO/2018/216222A1
This MOSFET 100 is characterized by comprising a semiconductor substrate 110 having a super junction structure 117, and a gate electrode 126 formed through a gate insulation film 124 on the first main surface side of the semiconductor su...  
WO/2018/215727A1
We disclose herein a gate controlled bipolar semiconductor device comprising: a collector region of a first conductivity type; a drift region of a second conductivity type located over the collector region;a body region of a first conduc...  
WO/2018/217568A1
An integrated circuit (IC) device may include a semiconductor structure. The semiconductor structure may include a source contact, a drain contact, and a gate. A first fluorocarbon spacer may be between the gate and the source contact. A...  
WO/2018/217682A1
This invention discloses formulations of mutually compatible sets of graphene, graphene- carbon, metal and dielectric inks for the fabrication of high performance membrane touch switches (MTS). The compositions of these inks are optimize...  
WO/2018/217973A1
Methods and structures for forming epitaxial layers of nitrogen-polar and nitrogen-polar semipolar Ill-nitride materials on unpatterned and patterned sapphire substrates are described. Nitrogen-polar semipolar GaN can be grown from incli...  
WO/2018/215729A1
A gate controlled semiconductor device comprising a collector region of a first conductivity type; a drift region of a second conductivity type located over the collector region; a body region of a first conductivity type located over th...  
WO/2018/214899A1
Provided are a gate electrode and a manufacturing method thereof, and a manufacturing method of an array substrate. The manufacturing method of a gate electrode comprises the following steps: providing a substrate, the substrate comprisi...  
WO/2018/214758A1
Embodiments of the present disclosure relate to a metal wire, a thin-film transistor and a manufacturing method therefor, an array substrate and a display device. The metal wire is applied to the thin-film transistor, and comprises a cop...  
WO/2018/215892A1
Embodiments of the invention are directed to methods and resulting structures for enhancing drive current and increasing device yield in n-type carbon nanotube field effect transistors (CNT FETs) with scaled contacts using a wetting laye...  
WO/2018/217288A1
Certain aspects of the present disclosure generally relate to a semiconductor device and techniques for fabricating a semiconductor device. In certain aspects, the semiconductor device includes a fin, a first non-insulative region dispos...  
WO/2018/216309A1
This solid-state imaging device (1) is provided with: a pixel region (11); and an analog-to-digital conversion circuit unit (12) for analog-to-digital converting voltage signals output from pixels disposed in the pixel region (11), where...  
WO/2018/214119A1
Provided are a graphene field-effect transistor and a preparation method therefor, belonging to the field of field-effect transistors. The transistor comprises: a substrate (1), a graphene channel layer (2) formed on a substrate gate, a ...  
WO/2018/217570A1
A complementary metal-oxide-semiconductor (CMOS) transistor may include a first semiconductor structure and a gate stack on the first semiconductor structure. The gate stack may include a gate dielectric layer on the first semiconductor ...  
WO/2018/215878A1
Provided is a semiconductor device with excellent properties. This semiconductor device comprises a transistor. The transistor comprises a first oxide, a second oxide above the first oxide, an insulator above the second oxide, and an ele...  
WO/2018/214480A1
Provided are an island-like electron-transmitting thin film transistor, and manufacturing method. The thin film transistor consists of a gate (02), a gate insulation layer (03), an active layer, and source and drain electrodes (06) seque...  
WO/2018/214647A1
Provided are an array substrate, a preparation method, a display panel and a display device. The array substrate comprises: a substrate; a light-shielding layer arranged on the substrate; and a transistor arranged on a side, away from th...  
WO/2018/212693A1
There is provided an x-ray sensor (21) having an active detector region including a plurality of detector diodes (22) at a first side of the sensor, and with placement of the junction termination (23) at a second opposite side of the sen...  
WO/2018/211378A1
The present invention provides a novel semiconductor device. Alternatively, the present invention provides a storage device that is capable of holding more multivalue information. One among the source and the drain of a write transistor ...  
WO/2018/211341A1
Embodiments are directed to a method and resulting structures for a vertical field effect transistor (VFET) having a reduced bottom contact resistance. A multilayered bottom doped region having alternating doped layers and doped sacrific...  
WO/2018/213178A1
A semiconductor device is provided. The semiconductor device includes a semiconductor device layer having silicon carbide and having an upper surface and a lower surface. The semiconductor device also includes a heavily doped body region...  
WO/2018/211351A1
A semiconductor device with favorable electrical characteristics, a semiconductor device with stable electrical characteristics, or a highly reliable semiconductor device or display device is provided. A first insulating layer and a firs...  
WO/2018/211368A1
The present invention provides a semiconductor device capable of achieving good electric properties and high integration. This semiconductor device has an oxide in a channel formation region, and is provided with a transistor and a wirin...  
WO/2018/209736A1
The present invention relates to the technical field of display panels, and in particular to a thin film transistor and a manufacturing method therefor. The thin film transistor is disposed on a substrate and comprises a drain electrode ...  
WO/2018/212100A1
Each pixel region of an active matrix substrate (1002) has: a lower insulation layer (5); an oxide semiconductor layer (7) which is disposed atop the lower insulation layer and which includes an active region (7a) of an oxide semiconduct...  
WO/2018/210186A1
A thin film transistor and manufacturing method thereof, array substrate and display panel. The thin film transistor comprises: a light shielding layer (22) disposed above a base substrate (21); and an active layer (24) disposed above th...  
WO/2018/211735A1
The present invention enhances the precision of detecting degradation of a semiconductor device. A first metal pattern (51) and a second metal pattern (52) are connected to a control unit (100). A bonding wire (41) connects the first met...  
WO/2018/211568A1
A source electrode (5), a drain electrode (6), and a T-type gate electrode (9) are formed on GaN-based semiconductor layers (3, 4) to form a transistor. Insulating films (10, 11) for covering the T-type gate electrode (9) are formed. The...  
WO/2018/212853A1
A heterojunction bipolar transistor (HBT) thermal sensing device includes a well structure as a layer between an HBT sub-collector and an HBT substrate. In one instance, the HBT sub-collector contacts an emitter, a collector, and a base ...  
WO/2018/209753A1
A thin film transistor manufacturing method, an array substrate manufacturing method, and a display device. The thin film transistor manufacturing method comprises: providing a substrate (11); covering the substrate (11) with an isolatio...  
WO/2018/211661A1
Gate fingers (2-1 to 2-6) are provided by being aligned with each other in one direction, drain electrodes (3-1 to 3-3) and source electrodes (4-1 to 4-4) are alternately disposed by being adjacent to each other, and gate head lengths ar...  
WO/2018/211340A1
Embodiments are directed to a method and resulting structures for a vertical field effect transistor (VFET) having an embedded bottom metal contact. A semiconductor fin is formed on a doped region of a substrate. A portion of the doped r...  
WO/2018/212975A1
Integrated circuits (ICs) that avoid or mitigate creation of changes in accumulated charge in a silicon-on-insulator (SOI) substrate, particularly an SOI substrate having a trap rich layer. In one embodiment, a FET is configured such tha...  

Matches 1 - 50 out of 270,220