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Matches 1 - 50 out of 22,953

Document Document Title
WO/2019/094957A1
The various embodiments described herein include methods, devices, and systems for fabricating and operating superconducting circuits. In one aspect, an electric circuit includes: (1) a first superconducting component having a first term...  
WO/2019/093178A1
In order to lower a magnetic field measuring element in the height direction thereof while reducing interference, this magnetic field measuring element is characterized by comprising a Superconducting QUantum Interference Device (SQUID) ...  
WO/2019/091592A1
A technique relates to correcting an area of overlap between two films created by sequential shadow mask evaporations. At least one process is performed of: correcting design features in an original layout to generate a corrected layout ...  
WO/2019/086942A1
A set of superconducting devices is interconnected in a lattice that is fabricated in a single two- dimensional plane of fabrication such that a superconducting connection can only reach a first superconducting device in the set while re...  
WO/2019/070935A3
Approaches useful to operation of scalable processors with ever larger numbers of logic devices (e.g., qubits) advantageously take advantage of QFPs, for example to implement shift registers, multiplexers (i.e., MUXs), de-multiplexers (i...  
WO/2019/081970A1
A vertical q-capacitor (202, 302, 700, 1100, 1400, 1800) includes a trench (304, 502, 902, 1202, 1204, 1602) in a substrate (400) through a layer (602, 1302, 1304) of superconducting material (402). A superconductor is deposited in the t...  
WO/2019/060829A3
A switchable Josephson junction is provided that includes a plurality of ferromagnetic insulators (8, 12) that are defined by their respective magnetic alignments. A first superconducting layer (10) that is positioned between any two of ...  
WO/2019/036081A3
A method of forming a superconductor interconnect structure is disclosed. The method includes forming a dielectric layer overlying a substrate, forming an interconnect opening in the dielectric layer, and moving the substrate to a deposi...  
WO/2019/071005A1
The various embodiments described herein include methods, devices, and systems for implementing logic gates. In one aspect, a circuit includes: (1) a superconducting component having a plurality of alternating narrow and wide portions; (...  
WO/2019/069894A1
Provided is a switch element having: a switch core material 61 that is formed from a superconducting material capable of transitioning from a normal conducting state above the critical field to a superconducting state below the critical ...  
WO/2019/070935A2
Approaches useful to operation of scalable processors with ever larger numbers of logic devices (e.g., qubits) advantageously take advantage of QFPs, for example to implement shift registers, multiplexers (i.e., MUXs), de-multiplexers (i...  
WO/2019/063113A1
The present invention generally relates to superconducting devices, more specifically, to integrating Josephson amplifiers or josephson mixers into printed circuit boards. A printed circuit board includes one or more board layers. A firs...  
WO/2019/067039A1
A superconducting apparatus is formed by depositing a first dielectric material (104) on a substrate (102) and curing the first dielectric material at a first temperature, forming a first superconducting layer comprising a first set of p...  
WO/2019/060829A2
A switchable Josephson junction is provided that includes a plurality of ferromagnetic insulators that are defined by their respective magnetic alignments. A first superconducting layer that is positioned between any two of the ferromagn...  
WO/2019/059879A1
A stacked device including a first substrate that includes a quantum information processing device, a second substrate bonded to the first substrate, and multiple bump bonds and at least one pillar between the first substrate and the sec...  
WO/2019/058357A1
An electromagnetic wave sensor (1) of extremely high sensitivity comprises a spin filter junction formed by an insulating layer (30) arranged between a metal electrode (20) and a superconducting layer (10) carrying an exchange field for ...  
WO/2019/055048A1
A method of reducing junction resistance variation for junctions in quantum information processing devices fabricated using two-step deposition processes. In one aspect, a method includes providing a dielectric substrate (208), forming a...  
WO/2019/050525A1
The subject matter of the present disclosure may be embodied in devices, such as flexible wiring, that include: an elongated flexible substrate; multiple electrically conductive traces arranged in an array on a first side of the elongate...  
WO/2019/049720A1
A superconducting device (1) is provided in a magnet device (2) including a magnet part (3) that generates a magnetic field. The superconducting device (1) has a superconducting bulk part (4) disposed outside the magnet part (3). The sup...  
WO/2019/045763A1
A method of fabricating a device is presented. The method includes forming a multilayer stack (101', 102', 103') on a substrate (10', 100') which has a principal surface. The multilayer stack includes a supporting layer (102') formed ove...  
WO/2019/044783A1
Provided is a high-temperature superconductor wire connection in which high-temperature superconductor wires comprising high-temperature superconductor layers are connected to each other; wherein facing first and second high-temperature ...  
WO/2019/045762A1
A method for forming at least part of a quantum information processing device is presented. The method includes providing a first electrically-conductive layer formed of a first electrically-conductive material (100') on a principal surf...  
WO/2019/038528A1
According to a first aspect of the present invention, there is provided a method of forming a superconduting joint between ReBCO tapes. Two or more ReBCO tapes are provided, each having an exposed ReBCO region. A bridge is provided, comp...  
WO/2019/038409A1
A superconducting logic element (1), comprising: a superconducting tunnel junction (10) comprising a first (20) and a second (30) superconductor; a first insulating ferromagnet (40) in contact with the first superconductor (20), configur...  
WO/2019/032115A1
Embodiments of the present disclosure propose methods of fabricating quantum circuit assemblies that include Josephson Junctions connected below the plane of supporting circuitry. A exemplary quantum circuit assembly includes supporting ...  
WO/2019/025019A1
A technique relates to a superconducting qubit. A Josephson junction includes a first superconductor and a second superconductor formed on a non-superconducting metal. A capacitor is coupled in parallel with the Josephson junction.  
WO/2019/023577A1
The various embodiments described herein include methods, devices, and systems for fabricating and operating transistors. In one aspect, a transistor includes: (1) a semiconducting component configured to operate in an on state at temper...  
WO/2019/013386A1
The present invention relates to a superconducting cable having a machined surface and a manufacturing method therefor, and the technical matter of the present invention relates to including the steps of: removing burrs formed at the edg...  
WO/2019/010090A1
Majorana-based qubits based on the formation of superconducting islands, some parts of which are topological (T) and some parts of which are non-topological (S), and techniques for fabricating such qubits are disclosed. In one embodiment...  
WO/2019/001753A1
A mixed semiconductor-superconductor platform is fabricated in phases. In a masking phase, a dielectric mask is formed on a substrate, such that the dielectric mask leaves one or more regions of the substrate exposed. In a selective area...  
WO/2018/236374A1
Described herein are qubit devices that employ superconductive materials and ways of protecting such materials from oxidation. In one aspect of the present disclosure, a qubit device that includes at least one quantum circuit component/e...  
WO/2018/235988A1
The present invention principally relates to a biaxial die assembly, which is for aligning a plurality of stacked conductors, comprising: a pair of die bodies; a recessed portion which is recessed on each of the die bodies such that, on ...  
WO/2018/236102A1
The present invention relates to a lamination structure of a superconducting wire. The present invention provides the superconducting wire having a metal substrate, a buffer layer, a superconducting layer, and a stabilizer layer which ar...  
WO/2018/231396A1
Laminated superconductor wires (100) are disclosed, comprising a high temperature superconductor (HTS) layer (75a) having two cap layers (72a, 104a) in direct contact with opposite surfaces thereof, a first lamination layer (96a) affixed...  
WO/2018/231909A1
A method of fabricating a semiconductor structure is provided. The method includes evaporating at least one precursor and depositing an epitaxial film containing a halide perovskite derived from the at least one precursor on a single cry...  
WO/2018/232332A1
The invention is directed to a photodetector which includes a superconducting nanowire composed of niobium-germanium, a protective layer configured to inhibit oxidation of the superconducting nanowire, and a current source configured to ...  
WO/2018/227083A1
A multi-filament high temperature superconducting cable having improved AC current carrying capacity, quench resistance and flexibility. The multi-filament cable is formed from a plurality of stacked exfoliated filaments which provide cu...  
WO/2018/224876A1
A technique relates to forming a sidewall tunnel junction. A first conducting layer is formed using a first shadow mask evaporation. A second conducting layer is formed on a portion of the first conducting layer, where the second conduct...  
WO/2018/226586A1
A method includes generating a bias signal from a first device, and applying the bias signal to a second device, the first device having (a) a superconducting trace and (b) a superconducting quantum interference device (SQUID), in which ...  
WO/2018/221524A1
Provided is a thermal-insulated multiple pipe for superconducting power transmission, having high thermal insulation properties and having no damage to spacers even when laid using the reel-lay method. A thermal-insulated multiple pipe f...  
WO/2018/221522A1
Provided is a thermal-insulated multiple pipe for superconducting power transmission having excellent thermal insulation properties and highly suppressing heat incursion from outside caused by radiation, even when not using super insulat...  
WO/2018/221523A1
Provided is a thermal-insulated multiple pipe for superconducting power transmission having excellent thermal insulation properties, having highly suppressed heat incursion from outside caused by radiation, even when not using super insu...  
WO/2018/211764A1
This superconducting wire material is provided with a first wire material having a first superconducting material layer, a second wire material having a second superconducting material layer, and a superconducting material joining layer....  
WO/2018/212041A1
A quantum bit device according to the present invention is provided with: a first quantum bit substrate 10 that has, on the surface thereof, a first superconductive wire 13 disposed so as to have a part magnetically coupled with a first ...  
WO/2018/211766A1
This superconducting wire material is provided with a first wire material having a first superconducting material layer, a second wire material having a second superconducting material layer, and a joining layer. At least a portion of th...  
WO/2018/213024A1
A method is provided of forming a superconductor interconnect structure. The method comprises forming a dielectric layer overlying a substrate, forming an interconnect opening in the dielectric layer, and moving the substrate to a deposi...  
WO/2018/211321A1
A technique relates to a superconducting chip. Resonant units have resonant frequencies, and the resonant units are configured as superconducting resonators. Josephson junctions are in the resonant units, and one or more of the Josephson...  
WO/2018/211480A1
The sheath (3) is a material, which consists of aluminium (Al) matrix, in which nanometric aluminium oxide particles (Al203) are homogenously dispersed, wherein the content of Al2O3 is 0.25 to 5 vol.% and the balance is Al. It is preferr...  
WO/2018/211765A1
This superconducting wire material is provided with a first wire material containing a first superconducting material layer, a second wire material containing a second superconducting material layer, and a first superconducting material ...  
WO/2018/207727A1
This superconducting wire is provided with: a superconducting laminate in which a superconducting layer is formed on a tape-like substrate, with an intermediate layer being interposed therebetween; and a stabilization layer which covers ...  

Matches 1 - 50 out of 22,953