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WO/2023/201779A1 |
A magnetic random memory unit, comprising: a first spin-orbit torque provision layer, having two or more regions, said regions at least having a first region and a second region, the first region having a first doping characteristic, and...
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WO/2023/178595A1 |
Provided in the present invention are a magnetic storage unit and a magnetic storage device. The magnetic storage unit comprises: a first free layer, a first coupling layer, a second free layer, a barrier layer and a reference layer, whi...
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WO/2023/178596A1 |
The present invention provides a storage and computing device, a counter, a shift accumulator, and an in-memory multiply-accumulate structure. According to the storage and computing device, storage is realized by using the storage and co...
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WO/2023/142420A1 |
A semiconductor apparatus and a manufacturing method therefor and an electronic device. The manufacturing method comprises: providing a substrate (100); forming a bottom electrode layer (210), a magnetic tunnel junction layer (220), and ...
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WO/2023/124497A1 |
The present invention provides a SOT-MRAM memory cell and a preparation method therefor, and a SOT-MRAM. In a SOT-MRAM memory cell, by means of adding an insulation layer between a SOT track layer and a free layer of a magnetic tunnel ju...
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WO/2023/124142A1 |
The present invention provides a preparation method for a MRAM. The preparation method comprises: providing a substrate, the substrate comprising an array region and a logic region; depositing a dielectric on the surface of the substrate...
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WO/2023/116046A1 |
A memory and a preparation method therefor. The memory comprises: a bottom circuit layer (1); a bottom electrode (2) provided on the upper surface of the bottom circuit layer (1); an oxide layer (3) provided around the bottom electrode (...
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WO/2023/097909A1 |
The present disclosure relates to the technical field of semiconductors. Provided are a semiconductor structure and a preparation method therefor. The preparation method for a semiconductor structure comprises: providing a substrate, whe...
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WO/2023/097907A1 |
The present disclosure relates to the technical field of semiconductors, and provides a semiconductor structure and a method for preparing same. The method for preparing a semiconductor structure comprises: providing a substrate that has...
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WO/2023/087884A1 |
A magnetic sensor and a manufacturing method therefor. The magnetic sensor comprises: a chip provided with a bottom electrode and a device group disposed on the chip, the device group comprising a first magnetic tunnel junction device el...
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WO/2023/060627A1 |
An SOT-MRAM and a manufacturing method therefor. The SOT-MRAM comprises a substrate (10) and a plurality of memory units provided on the substrate (10). Each memory unit comprises an SOT layer deposited on the substrate (10), and magneti...
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WO/2023/058928A1 |
The present invention pertains to: a switching device based on spin-orbit torque; and a method for manufacturing same. A switching device based on spin-orbit torque according to an embodiment comprises: a heavy metal input terminal exten...
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WO/2023/045049A1 |
Provided in the present invention is a method for etching a mask of a magnetic tunnel junction. The method comprises: etching a dielectric layer step by step, and removing a photoresist and residual organic substances by means of an ashi...
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WO/2023/041267A1 |
A semiconductor structure (1500) includes a bottom MTJ stack (507) with a bottom fixed layer (508), a bottom barrier layer (510), and a bottom free layer (512). The semiconductor structure also includes a top MTJ stack (519) with a top f...
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WO/2023/038680A1 |
A tunneling magnetoresistance (TMR) device has an improved seed layer for the lower or first ferromagnetic layer that eliminates the need for boron in the two ferromagnetic layers. The seed layer, for example a RuAl alloy, has a B2 cryst...
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WO/2023/035156A1 |
Provided in the embodiments of the present application are a magnetic storage apparatus and a preparation method therefor. The method comprises: forming a plurality of bottom electrodes and a plurality of insulators on a substrate, where...
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WO/2023/029395A1 |
Disclosed in embodiments of the present application are a manufacturing method for a semiconductor structure, a semiconductor structure, and a semiconductor memory. The manufacturing method comprises: providing a substrate; sequentially ...
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WO/2023/030992A1 |
A memory device that includes an magnetoresistive random-access memory (MRAM) stack (50) positioned on an electrode (55), a metal line (60) in contact with the electrode, and a sidewall spacer (47) abutting the MRAM stack. The memory dev...
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WO/2023/029398A1 |
Embodiments of the present application disclose a manufacturing method for a semiconductor structure, the semiconductor structure, and a semiconductor memory. The manufacturing method comprises: providing a substrate; sequentially formin...
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WO/2023/029527A1 |
A magnetic access device and a memory. The magnetic access device comprises an SAF layer, a reference layer, a tunnel layer, a free layer, a conductive spin conduction layer located on a surface of the free layer away from the tunnel lay...
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WO/2023/029260A1 |
The present invention provides a control method for sidewall contamination of an MRAM magnetic tunnel. In the control method, there is no need to additionally coat an insulation protection layer on the sidewall of an MTJ layer, but a uni...
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WO/2023/029648A1 |
Embodiments of the present disclosure relate to the field of semiconductors. Provided are a semiconductor structure, a manufacturing method therefor, and a memory. The semiconductor structure may at least comprise: multiple transistors a...
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WO/2023/025500A1 |
Embodiments disclosed herein include a semiconductor structure (100). The semiconductor structure includes a spin transfer torque (STT) magnetoresistive random access memory (MRAM) stack (104). The semiconductor structure also includes a...
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WO/2023/019804A1 |
Provided in the present invention is a method for reducing damage to a magnetic tunnel junction (MTJ) of an MRAM. The method comprises: providing a base structure, wherein the base structure comprises a substrate, a lower electrode, an M...
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WO/2023/022764A1 |
The present disclosure generally relate to spin-orbit torque (SOT) magnetic tunnel junction (MTJ) devices comprising a topological insulator (TI) modulation layer. The TI modulation layer comprises a plurality of bismuth or bismuth-rich ...
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WO/2023/012006A1 |
An approach to provide a structure of a double magnetic tunnel junction device (1200) with two spacers (404, 707) that includes a bottom magnetic tunnel junction stack (204), a spin conducting layer (208) on the bottom magnetic tunnel ju...
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WO/2023/005970A1 |
Disclosed are a magnetic random access memory and an apparatus. The magnetic random access memory comprises: a seed layer (5) having a first crystal orientation; a spin orbit torque distribution layer (4) provided on the seed layer (5), ...
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WO/2023/006411A1 |
A memory device (100) with in-array magnetic shield includes an electrically conductive structure (108), including a bottom electrode (112), embedded within an interconnect dielectric material (106) located above a first metal layer (104...
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WO/2023/002513A1 |
Disclosed is an apparatus and a method. Spin-splitting is induced at a superconductor and spin-polarization facilitated for tunneling across a tunnel barrier so that electric current across the tunnel barrier between a conductor and the ...
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WO/2023/279738A1 |
Embodiments of the present disclosure provide a method for fabricating a magnetic random access memory and a magnetic random access memory. The method comprises: sequentially fabricating a bottom electrode through hole, a bottom electrod...
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WO/2023/274627A1 |
A method of manufacturing and resultant device are directed to an inverted wide-base double magnetic tunnel junction device having both high-efficiency (100') and high-retention (100) arrays. The method includes a method of manufacturing...
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WO/2022/264887A1 |
In this film formation method, during sputter treatment in which a selected target selected from among a plurality of targets is subjected to sputtering, a film formation device performs a selected-side reciprocal action in which a magne...
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WO/2022/262533A1 |
A semiconductor device including a second magnetic tunnel junction stack aligned above a spin conductor layer above a first magnetic junction stack, a sidewall dielectric surrounding the second magnetic tunnel junction stack, a vertical ...
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WO/2022/265058A1 |
Provided are: a laminated film which enables a writing current to flow, and can achieve a high-density and/or high-speed memory; and a magnetoresistive effect element using the same. A magnetic laminated film 10 comprises: a first ferrom...
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WO/2022/261875A1 |
A magnetic storage module, an operation method therefor, a controller, and a storage system, for use in reducing a current generated after a voltage is applied to a storage unit, thereby reducing an interference current accumulated on a ...
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WO/2022/264529A1 |
A storage device (100) is provided with: a plurality of magnetic memory elements (30); and a selection circuit (8) that selects an intended magnetic memory element (30) from the plurality of magnetic memory elements (30). The plurality o...
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WO/2022/260720A1 |
A magnetoelectric memory device includes a magnetic tunnel junction located between a first electrode and a second electrode. The magnetic tunnel junction includes a reference layer, a nonmagnetic tunnel barrier layer, a free layer, and ...
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WO/2022/259601A1 |
[Problem] To reduce labor for setting a range within which a magnetic field can be measured. [Solution] A magnetic field measuring instrument 1 measures a measurement target magnetic field. The magnetic field measuring instrument 1 compr...
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WO/2022/252918A1 |
A semiconductor device including a magnetic tunnel junction stack, a metallic hard mask aligned above the magnetic tunnel junction stack and an air gap surrounding the metallic hard mask. A method including forming a magnetic tunnel junc...
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WO/2022/248224A1 |
Embodiments of the invention include a method for fabricating a magnetoresistive random-access memory (MRAM) structure and the resulting structure. A first type of metal (1220) is formed on an interlayer dielectric layer (210) with a plu...
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WO/2022/247522A1 |
A magnetoresistive random access memory (MRAM) device having chip identification using normal operating voltages is provided. No dedicated programming is needed. Instead, programming of the MRAM device is free and random and is a result ...
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WO/2022/248985A1 |
Provided is a semiconductor device which has a new configuration. This semiconductor device comprises: a first substrate; a first element layer provided in contact with a second substrate; and a first through-electrode provided to the se...
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WO/2022/248223A1 |
Provided is a magnetoresistive random-access memory (MRAM) cell. The MRAM cell (500) comprises a top contact(502), a hard mask layer (504) below the top contact, and a magnetic tunnel junction, MTJ, (506) below the hard mask layer. The M...
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WO/2022/242611A1 |
Disclosed in embodiments of the present invention are a compound semiconductor Hall element and a manufacturing method therefor. The compound semiconductor Hall element comprises a substrate, a bonding layer, a magnetic induction portion...
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WO/2022/244734A1 |
The purpose of the present disclosure is to improve the accuracy of detection of the direction of a magnetic field applied to a magnetic sensor. A magnetic sensor (100) includes at least one bias magnet (5), a first half-bridge circuit (...
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WO/2022/243279A1 |
A method (50) for fabricating an asymmetric SOT-MRAM memory cell unit, said memory cell unit comprising a conductor track and a pad, arranged on the conductor track and comprising at least one first magnetic region with free magnetizatio...
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WO/2022/241735A1 |
Provided in the embodiments of the present disclosure are a spin logic device, a processing in-memory device, a half adder and a full adder. In the spin logic device, a magnetic unit comprises a spin Hall effect layer and a ferromagnetic...
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WO/2022/244735A1 |
The purpose of the present disclosure is to improve the accuracy of detecting the orientation of a magnetic field which is applied to a magnetic sensor. A magnetic sensor (100) comprises: a first half-bridge circuit (H1); a second half-b...
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WO/2022/233249A1 |
A semiconductor structure forms two or more tightly pitched memory devices using a dielectric material for a gap fill material. The approach includes providing two adjacent bottom electrodes in a layer of an insulating material and above...
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WO/2022/233235A1 |
A resistive memory device includes a magnetic tunnel junction structure. The magnetic tunnel junction structure includes a free magnetic layer. The free magnetic layer includes a magnetic material configurable to host topological spin te...
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