Login| Sign Up| Help| Contact|

Patent Searching and Data


Matches 501 - 550 out of 6,124

Document Document Title
WO/2012/162867A1
Provided is a resistive random access memory using an electric field enhancement layer, comprising: a top electrode (201), a bottom electrode (203), and a stacked layer located between the top electrode (201) and the bottom electrode (20...  
WO/2012/158719A1
An improved method of fabricating a resistive memory device is disclosed, A resistive memory includes a bottom electode, atop electrode and a resistive material layer interposed therebetween, interfaces are formed between the resistive m...  
WO/2012/153818A1
A resistance-changing element which comprise a first electrode, a second electrode, and an ion-conducting layer disposed between the first electrode and the second electrode and which changes in resistance when metal ions supplied from t...  
WO/2012/151725A1
Provided are a semiconductor memory structure and a control method thereof, relating to the technical field of semiconductor non-volatile memories. The semiconductor memory structure includes a storage unit for storing information and a ...  
WO/2012/142735A1
Provided is a semiconductor memory structure and a method for manufacturing the same, relating to the technical field of micro-electronic devices. The semiconductor memory performs, for example, erase operation and read operation control...  
WO/2012/140971A1
Provided is a thin film with which changes in resistance due to charge- and orbital-ordering of perovskite-type manganese oxide are fully realized. An embodiment of the present invention provides a perovskite-type manganese oxide thin fi...  
WO/2012/140887A1
A method of manufacturing a variable-resistance type nonvolatile storage element of the present invention comprises: a process for forming a lower electrode layer (2) on a substrate (11); a process for forming a variable-resistance layer...  
WO/2012/141898A2
This disclosure provides embodiments for the formation of vertical memory cell structures (38) that may be implemented in RRAM devices. In one embodiment, memory cell area may be increased by varying word line (22) height (?WL) and/or wo...  
WO/2012/141898A3
This disclosure provides embodiments for the formation of vertical memory cell structures (38) that may be implemented in RRAM devices. In one embodiment, memory cell area may be increased by varying word line (22) height (?WL) and/or wo...  
WO/2012/136435A1
The present invention relates to an electronic device (100) comprising a first electrode (103), a second electrode (104), and a solid electrolyte (102) made of an ion-conducting material, said first and second electrodes (103, 104) being...  
WO/2012/127542A1
An organic molecular memory for controlling a current flowing through a memory cell and achieving stable operation and high degree of reliability is provided. The organic molecular memory includes a first electrode, a second electrode ma...  
WO/2012/126186A1
A resistance variable memory and a fabricating method thereof are provided. The memory includes a substrate(24), a plane upper electrode(21), a pinnacle-shape lower electrode(23) with the middle part protruding upward, and a resistance v...  
WO/2012/127735A1
This variable resistance element is formed by sandwiching between a pair electrodes a metal oxide layer the resistance of which is varied, and the metal oxide layer comprises a pair of variable resistance layers that bring about resistan...  
WO/2012/128134A1
A semiconductor memory device according to the embodiment comprises a memory cell array including a memory cell layer containing plural memory cells operative to store data in accordance with different resistance states; and an access ci...  
WO/2012/127861A1
The purpose of the present invention is to provide a method for manufacturing a variable resistance nonvolatile storage device, which has good consistency with a dual damascene process that is suitable for the formation of fine copper wi...  
WO/2012/128017A1
A method for writing to a resistive memory device having a plurality of resistive memory elements, in which a first process and a second process are performed in the stated order in a writing process in which a first variable resistor ch...  
WO/2012/127718A1
According to one embodiment, a resistance-change memory includes a memory cell and a control circuit. The memory cell comprises first and second electrodes, and a variable resistance layer disposed between the first electrode and the sec...  
WO/2012/126222A1
A method for preparing a metal oxide resistor memory is provided. The method comprises: forming a W plug lower electrode in the MOS device; forming a cap layer (201a), a first dielectric layer (101) and an etch-stop layer (201b) on the W...  
WO/2012/127863A1
An organic molecular memory of an embodiment includes a first conductive layer, a second conductive layer, and an organic molecular layer interposed between the first conductive layer and the second conductive layer, the organic molecula...  
WO/2012/124314A1
Provided are a non-volatile storage element drive method and a non-volatile storage device that are capable of achieving a stable storage operation. The drive method is for a non-volatile storage element, said non-volatile storage elemen...  
WO/2012/120893A1
This method for producing a non-volatile recording device (10) contains: a step for forming a tantalum oxide material layer (106aF) configured from an oxygen-deficient transition metal oxide; a step for forming a tantalum oxide material ...  
WO/2012/117467A1
This reconfigurable circuit (10) is provided with: a switch element group wherein switch elements (1) wherein an on state and off state can be rewritten in accordance with resistance state are disposed; and a configuration controller (60...  
WO/2012/118791A1
In some aspects, a method of forming a reversible resistance-switch¬ ing metal-insulator-metal ("MIM") stack is provided, the method in¬ cluding: forming a first conducting layer (24) comprising a titani¬ um-rich titanium nitride (TiN...  
WO/2012/117773A1
This solid-state memory is provided with a recording layer the electrical properties of which change with the phase transition of matter. The recording layer is produced from a superlattice that is obtained by laminating a thin film form...  
WO/2012/114744A1
A non-volatile storage element manufacturing method comprises: a step of forming a first lower part electrode layer (108), an electric current control layer (109), and a first upper part electrode layer (110), and, upon the first upper p...  
WO/2012/111205A1
According to one embodiment, a variable resistance layer 2 includes a semiconductor element. A resistance change is reversibly possible in the variable resistance layer according to supply and collection of a metal element of a second el...  
WO/2012/108151A1
A nonvolatile latch circuit (100) according to the present invention is formed by connecting both the outputs of an inverter circuit (20) and an inverter circuit (21) cross-coupled to each other through a series circuit formed by sequent...  
WO/2012/108185A1
A non-volatile storage element drive method comprises: an initialization step of applying an initialization voltage pulse to a series circuit wherein a load resistor (5) having a first resistance value is connected in series to a resista...  
WO/2012/105139A1
The present invention has an ion-conducting layer (11), and a first electrode (21) and a second electrode (22) respectively formed on front and reverse surfaces of the ion-conducting layer (11). The first electrode (21) is formed from a ...  
WO/2012/105225A1
Provided is a method for manufacturing a variable resistance nonvolatile storage device such that a metal electrode that forms a lower electrode on the bottom of a memory cell hole can be formed reliably without having electrical conduct...  
WO/2012/105232A1
Provided is a data read method that, in a variable-resistance non-volatile recording element, is difficult to be affected by the phenomenon of resistance value fluctuations during data reading. The data read method of a variable-resistan...  
WO/2012/105214A1
Provided is a method for manufacturing a variable resistance element that can improve the endurance characteristics of nonvolatile storage. This method for manufacturing a variable resistance element (112) comprises: a step (A) for formi...  
WO/2012/102025A1
A nonvolatile memory device (100) comprises the following: a nonvolatile memory element (101) having a first electrode, a second electrode, and a resistance change layer that is disposed between the first electrode and the second electro...  
WO/2012/100501A1
A resistance conversion type random memory unit and a memory device are provided. The memory unit is constitutive of an upper electrode (2), a resistance conversion function layer, a middle electrode (4), a dissymmetrical tunnel barrier ...  
WO/2012/100562A1
Provided are a resistive random access unit and a resistive random access memory. The resistive random access unit is formed by a resistive random access memory and a two-state resistor connected in series. Because the two-state resistor...  
WO/2012/100502A1
A nonvolatile memory unit and a memory device are provided. The memory unit includes an upper electrode (1), a dissymmetrical tunnel barrier structure and a lower electrode (5) in turn from top to bottom, wherein the dissymmetrical tunne...  
WO/2012/097565A1
The present invention provides a phase change memory cell and a manufacture method thereof The phase change memory cell includes a semiconductor substrate,a first electrode layer, a phase change material layer, a second electrode layer...  
WO/2012/098879A1
A resistance change element has a first electrode (107), a second electrode (105), and a resistance change layer (106) provided interposed between the first and second electrodes (107, 105) so as to be in contact with the first and secon...  
WO/2012/090404A1
A nonvolatile storage element of the present invention is provided with a variable resistance element (104a), which has: a first electrode layer (103); a second electrode layer (105); and a variable resistance layer (104), which is dispo...  
WO/2012/087183A2
In the method, a pre-selected working area of a graphene film with a linear dimension of 2,000 nm, which working area is divided into sections having a dimension of 50-100 nm, is subjected to the effect of a pulsed alternating magnetic f...  
WO/2012/083672A1
A three-dimension (3D) semiconductor memory device based on 1T1R memory structure with a vertical surrounding gate transistor (SGT) and a manufacturing method thereof are provided. The ratio of on/off current can be effectively controlle...  
WO/2012/086169A1
[Problem] To provide a method of manufacturing a dielectric device and an ashing method, which are capable of minimizing resist residue. [Solution] In the aforementioned ashing method, a base material, having its surface etched with a pl...  
WO/2012/087183A3
In the method, a pre-selected working area of a graphene film with a linear dimension of 2,000 nm, which working area is divided into sections having a dimension of 50-100 nm, is subjected to the effect of a pulsed alternating magnetic f...  
WO/2012/079296A1
A multilayer phase change material with low thermal conductivity is provided. The periodic multilayer film structure is formed by alternately stacking two kinds of single layer film phase change materials which are different from at leas...  
WO/2012/080967A1
The invention relates to a memristive element (M) formed by: a first electrode (10); a second electrode (30); and an active region (20) making direct electrical contact with said first and second electrodes, characterized in that said ac...  
WO/2012/081248A1
A nonvolatile memory device comprises: a first electrode wiring (151) formed in a strip shape; a third interlayer insulating layer (16); a variable resistance layer which is a laminated structure that is formed on the region covering the...  
WO/2012/077518A1
[Problem] To provide a perovskite manganese oxide thin film that: (1) is capable of primary phase transition; and (2) is ordered at the A site. [Solution] The present invention provides a perovskite manganese oxide thin film (2) that inc...  
WO/2012/077174A1
When, in the present invention, a thin channel semiconductor layer formed on the side wall of a laminated film in which an insulating film and gate electrode are alternately laminated is removed on that laminated film, increases in conta...  
WO/2012/077517A1
[Problem] To increase the transition temperature of a perovskite manganese oxide thin film to above that of the bulk thereof. [Solution] An embodiment of the present invention provides a perovskite manganese oxide thin film (2) which is ...  
WO/2012/073471A1
The present invention provides a nonvolatile memory element comprising a variable resistance layer having a layered structure, wherein the variable resistance layer has a high resistance change ratio, and the present invention also provi...  

Matches 501 - 550 out of 6,124