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Matches 101 - 150 out of 6,384

Document Document Title
WO/2019/055003A1
Embedded non-volatile memory structures having selector elements with ballast are described. In an example, a memory device includes a word line. A selector element is above the word line. The selector element includes a selector materia...  
WO/2019/055052A1
Approaches for fabricating RRAM stacks with reduced forming voltage, and the resulting structures and devices, are described. In an example, a resistive random access memory (RRAM) device includes a conductive interconnect in an inter-la...  
WO/2019/049980A1
In order to achieve both high-density implementation of applications in the form a reconfiguration circuit without a redundancy bit and the capability to continuously run applications with redundancy, the present invention is a reconfigu...  
WO/2019/050579A1
A method of forming a resistive memory device includes forming an alternating stack of insulating layers and sacrificial material layers that extend along a first horizontal direction over a substrate, forming a laterally alternating seq...  
WO/2019/046030A1
In an example, a memory array may include a plurality of first dielectric materials and a plurality of stacks, where each respective first dielectric material and each respective stack alternate, and where each respective stack comprises...  
WO/2019/045808A1
An alternating stack of insulating layers and electrically conductive layers is formed over a substrate. Sidewalls of the electrically conductive layers are laterally recessed to form laterally recessed regions. After formation of a conf...  
WO/2019/043206A1
The disclosed device comprises a thin film layer (4) of a phase transition material disposed over a substrate (2), and a confinement layer (3) adjacent to the thin film layer. The thin film layer has first and second in-plane lattice par...  
WO/2019/032166A1
The disclosed two-dimensional array of vertical field effect transistors (200A) includes a one-dimensional array of ladder-shaped gate electrode lines (52), each including a pair of rail portions (522) that extend laterally along a first...  
WO/2019/008339A3
Subject matter disclosed herein may relate to construction of a correlated electron material (CEM) device. In particular embodiments, after formation of a film comprising layers of a transition metal oxide (TMO) material and a dopant, at...  
WO/2019/022860A1
A vanadium dioxide (VO2)-based threshold switch device exhibiting current-controlled negative differential resistance (S-type NDR), an electrical oscillator circuit based on the threshold switch device, a wafer including a plurality of s...  
WO/2019/016539A1
A switching resistor comprises a dielectric layer disposed between a first electrode layer and a second electrode layer, the switching resistor having a high resistance state and a low resistance state. The switching resistor is responsi...  
WO/2019/009296A1
[Problem] To stabilize the transition of a resistance variable element from a low resistance state to a high resistance state. [Solution] This switch element includes a resistance variable element, a first transistor, and a second transi...  
WO/2019/009877A1
A phase change memory structure (100) can include a memory cell, a dielectric material (130) adjacent to the memory cell, and a bit line. The memory cell can include a phase change material layer (110) and a top electrode layer (120) abo...  
WO/2019/009876A1
A phase change memory structure (100) includes a phase change material layer (110), a top electrode layer (120) above the phase change material layer, a metal silicon nitride layer (130) in contact with the top electrode layer opposite f...  
WO/2019/005113A1
Techniques are disclosed for forming resistive random-access memory (RRAM) including a tunnel source access transistor, such as a tunnel source MOSFET. The use of a tunnel source access transistor includes integrating a tunnel diode on t...  
WO/2019/005468A1
The present disclosure includes memory cells having resistors, and methods of forming the same. An example method includes forming a first conductive line, forming a second conductive line, and forming a memory element between the first ...  
WO/2018/089936A9
Disclosed is a resistive random access memory (RRAM). The RRAM includes a bottom electrode made of tungsten and a switching layer made of hafnium oxide disposed above the bottom electrode, wherein the switching layer includes a switchabl...  
WO/2019/005167A1
An approach for integrating a resistive random access memory (RRAM) device on a dual bottom electrode layer is described. In an example, a resistive random access memory (RRAM) device includes a dual bottom electrode disposed above a sub...  
WO/2019/005168A1
A memory device includes a wordline disposed above a substrate and a selector element disposed above the wordline, where the selector element includes a phase change material. The memory device further includes a bipolar memory element d...  
WO/2018/236360A1
Phase field effect transistors (Phase FETs) having ferroelectric gate dielectrics are described. In an example, an integrated circuit structure includes a channel layer above a substrate. The channel layer is composed of a material havin...  
WO/2018/236432A1
A method is provided that includes forming a word line above a substrate, the word line disposed in a first direction, forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first directi...  
WO/2018/236356A1
Ferroelectric field effect transistors (FeFETs) having compound semiconductor channels are described. In an example, an integrated circuit structure includes a semiconductor channel layer above a substrate. The semiconductor channel laye...  
WO/2018/231210A1
Described herein are two approaches for providing thin film ferroelectric materials. The first approach is based on using a templating layer in contact with a ferroelectric layer, the material of the templating layer being such that it i...  
WO/2018/231296A1
A method is provided that includes forming a word line above a substrate, forming a bit line above the substrate, forming a nonvolatile memory material between the word line and the bit line, the nonvolatile memory material including a s...  
WO/2018/223801A1
Disclosed are a resistive device and a manufacturing method therefor, a manufacturing method for a display substrate, and a display apparatus, wherein same belong to the field of electronic manufacturing. The manufacturing method for a r...  
WO/2018/225993A1
According to an embodiment, a phase-change memory device comprises: an upper electrode and a lower electrode; a phase-change layer in which a crystal state thereof is changed by heat supplied by the upper electrode and the lower electrod...  
WO/2018/220356A1
The present techniques generally relate to fabrication of correlated electron materials (CEMs) devices used, for example, to read from a resistive memory element or to write to a resistive memory element. In embodiments, by limiting curr...  
WO/2018/222237A1
A method is provided that includes forming a word line above a substrate, forming a bit line above the substrate, forming a nonvolatile memory material between the word line and the bit line, and forming a memory cell including the nonvo...  
WO/2018/221114A1
A memory device according to an embodiment of the present disclosure comprises a logic circuit in which a plurality of wiring layers including layers that have different wiring pitches are laminated, and a memory element provided between...  
WO/2018/214142A1
A resistive memory device, and manufacturing method thereof. The resistive memory device comprises: a lower electrode (101); an oxide layer (102) containing the metal of the lower electrode and located on the lower electrode (101); a res...  
WO/2018/213208A1
A semiconductor power conversion device includes a plurality of device cells in different portions of the active area, each including a respective gate electrode. The device includes a gate pad having a plurality of integrated resistors,...  
WO/2018/207831A1
In order to output two potential values of a power supply voltage and a ground voltage and provide a reconfigurable logic integrated circuit having a small circuit area, this programmable logic circuit is provided with: a first switch; a...  
WO/2018/205915A1
Disclosed by the present invention is a VOx gating tube-based phase change storage unit, comprising a lower electrode layer, a VOx gating layer, a phase change function layer and an upper electrode layer. The present invention uses VOx t...  
WO/2018/207972A1
The present invention relates to a transparent and flexible resistive switching memory to which a transparent electrode having an OMO structure is applied, and a method for manufacturing the same. In addition, the present invention may c...  
WO/2018/203459A1
A selective element according to one embodiment of the present disclosure is provided with: a first electrode; a second electrode disposed opposite to the first electrode; a semiconductor layer that is provided between the first electrod...  
WO/2018/193759A1
[Problem] To produce a variable resistance element having excellent electrical characteristics at low cost. [Solution] A method for producing a variable resistance element according to the present invention comprises the formation of a f...  
WO/2018/190241A1
A crossbar switch using a variable-resistance element corresponding to multiple fan-out, wherein in order to enable switch operation at high speed with high reliability, a switch circuit is used having: a plurality of four-terminal switc...  
WO/2018/190071A1
A storage device according to one embodiment of the present disclosure is provided with: a plurality of first wiring layers which extend in one direction; a plurality of second wiring layers which extend in another direction; and a plura...  
WO/2018/186166A1
Memory structures with a plurality of memory cells that each include a memory device in combination with a switch device are provided. The memory device and switch device of each cell are connected in series, and include at least first a...  
WO/2018/186940A1
First electrically conductive lines (134) are formed over a substrate (10). A two-dimensional array of vertical stacks (180) is formed, each of which includes a first electrode (212), an in-process resistive memory material portion (214)...  
WO/2018/186997A1
The present disclosure includes three dimensional memory arrays, and methods of processing the same. A number of embodiments include a plurality of conductive lines separated from one other by an insulation material, a plurality of condu...  
WO/2018/182649A1
A resistive random access memory (RRAM) device includes a bottom electrode disposed above a substrate, a top electrode disposed above the bottom electrode, an oxygen exchange layer disposed between the bottom electrode and the top electr...  
WO/2018/182742A1
An apparatus is described. The apparatus includes a computation unit. The computation unit includes stacked, resistive elements. Each of the resistive elements is coupled to its own respective input node. Each of the resistive elements i...  
WO/2018/182799A1
A method is provided that includes forming a bit line above a substrate; forming a word line above the substrate, and forming a non-volatile memory cell between the bit line and the word line. The non-volatile memory cell includes a non-...  
WO/2018/181019A1
The present invention provides a resistance change element that improves set voltage variation between elements. Provided is a semiconductor device that includes at least two resistance change elements, a first terminal, and a second ter...  
WO/2018/181921A1
The present invention enables improvement of a set-forming yield while preventing insulation breakdown of a rectifying element when being set. In a plurality of switching cells, terminals on one side of two variable resistance elements a...  
WO/2018/180536A1
The purpose of the present invention is to provide a circuit capable of reducing leakage power in a programmable logic circuit using resistance change elements. To this end, the present invention is a programmable logic integrated circui...  
WO/2018/180759A1
This time change element includes a time change phase transition material for which the phase transition between solids progresses with the passage of time after manufacturing, irrespective of whether there is stimulus from outside, the ...  
WO/2018/182678A1
Resistive switch devices including a thermal layer and processes for forming the devices are provided. The thermal layer can be thermally resistive layer and electrically insulating. As such, the thermal layer can be arranged to cap or o...  
WO/2018/180228A1
A memory device according to an embodiment of the present disclosure comprises a memory cell array which is configured such that, when, of a plurality of memory cells, a plurality of first memory cells of which corresponding fourth wires...  

Matches 101 - 150 out of 6,384