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Matches 401 - 450 out of 6,246

Document Document Title
WO/2014/160460A1
Metal-oxide films (e.g., aluminum oxide) with low leakage current suitable for high-k gate dielectrics are deposited by atomic layer deposition (ALD). The purge time after the metal-deposition phase is 5-15 seconds, and the purge time af...  
WO/2014/158754A1
A resistive memory cell (100) includes a ring-shaped bottom electrode (102), a top electrode (108), and an electrolyte layer (106) arranged between the bottom and top electrodes. A ring-shaped bottom electrode is formed by forming a diel...  
WO/2014/158793A1
CBRAM or ReRAM type resistive memory cells are proposed, including a top electrode (106), a bottom electrode (102) having an elongated trench shape defining a pair of spaced-apart bottom electrode sidewalls (110A, HOB), and an electrolyt...  
WO/2014/150985A1
Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. A ReRAM cell includes an embedded resistor and resistive switching layer connected in series. The embedded resistor prevents excessive electric...  
WO/2014/111481A3
Disclosed is a complementary resistor switch (3) comprising two outer contacts, between which two piezo- or ferroelectric layers (11a and 11b) having an inner common contact are situated. At least one region (11', 11") of the layers is m...  
WO/2014/139277A1
A gate device unit for a cross array integration mode of a bipolar resistive random access memory. The gate device unit comprises an n-p diode (11) and a p-n diode (12) and the n-p diode (11) and the p-n diode (12) are opposite in polari...  
WO/2014/145445A2
An opposed-piston engine that forms an inviscid layer between pistons and the respective cylinder walls. In an aspect, the opposed-piston engine utilizes a Scotch yoke assembly that includes rigidly connected opposed combustion pistons. ...  
WO/2014/145995A2
An expandable curved inter-body fusion device is presented. The expandable curved inter-body fusion device can have a first plate, a second plate, and an insert positioned substantially therebetween the first plate and the second plate. ...  
WO/2014/142040A1
Provided is an electronic element that functions as a switch or memory even if a metal nanoparticle is not used. The electronic element is provided with an electrode (5A) and another electrode (5B) that are arranged so as to have a nanog...  
WO/2014/137485A1
In one embodiment of the present invention, a resistive switching device (11) includes a first electrode (120) disposed over a substrate and coupled to a first potential node. A switching layer (130) is disposed over the first electrode ...  
WO/2014/137943A2
A memory element programmable between different impedance states can include a first electrode; a switching layer formed in contact with the first electrode and including at least one metal oxide; and a buffer layer in contact with the s...  
WO/2014/133979A1
In some aspects, a memory cell is provided that includes a steering element and a memory element. The memory element includes a first conductive material layer, a first dielectric material layer disposed above the first conductive materi...  
WO/2014/128990A1
This phase change channel transistor comprises: a channel layer which contains a phase change material that undergoes a topological phase transition by the application of an electric field; a source electrode and a drain electrode, which...  
WO/2014/121618A1
The present invention relates to a high-reliability non-volatile resistive random access memory and a preparation method therefor. The memory comprises a top electrode, a bottom electrode, and a resistance change material located between...  
WO/2014/119537A1
Decrease in the width of a bit line caused resistance to sharply increase. In the present invention, a semiconductor device is equipped with: a common source line; a common bit line; multiple memory cells which are arranged in multiple r...  
WO/2014/120843A1
A process for forming reversible resistance-switching memory cells having resistance-switching nano-particles (532) which provide a reduced contact area to top (546) and bottom (504) electrodes of the memory cells, thereby limiting a pea...  
WO/2014/112365A1
In switching elements each using a two-terminal-type variable resistance element, improper writing or any improper operation is often caused and the reliability of the switching elements cannot be improved easily. A switching element acc...  
WO/2014/111481A2
In accordance with various embodiments, a complementary resistance switch can comprise: two outer contacts (T1, T2), between which two piezo- or ferroelectric layers (11a and 11b) are situated, which are separated from one another by an ...  
WO/2014/101344A1
A second-order memristor having a multi-resistance-state property and modulation method thereof, the device units of the memristor comprising: an upper electrode, a lower electrode, and a functional material layer between the upper and l...  
WO/2014/101773A1
A method for forming a resistive random access is provided. The method comprises : steps of: s1) providing a silicon substrate (1OO); s2) forming an isolating layer (200) on the silicon substrate(1OO); s3) forming a bottom electrode (300...  
WO/2014/103691A1
Provided are a storage element and a storage device, wherein resistance retention performance during low-current writing can be improved. A storage element of the present invention comprises a first electrode, a storage layer and a secon...  
WO/2014/103577A1
Provided is a storage apparatus provided with a plurality of storage elements (40) having storage layers (41) comprising a plurality of layers (20, 30) and electrodes (10), one layer (20) among the plurality of layers being extended in a...  
WO/2014/094334A1
Provided is a memristor based on AgInSbTe chalcogenide compounds. The memristor includes an upper electrode layer (103), a lower electrode layer (101) and a functional material layer (102) located between the upper and lower electrode la...  
WO/2014/100749A2
A resistor array for multi-bit data storage without the need to increase the size of a memory chip or scale down the feature size of a memory cell contained within the memory chip is provided. The resistor array incorporates a number of ...  
WO/2014/094417A1
Disclosed are a resistive random access memory and a preparation method thereof. The resistive random access memory comprises a bottom electrode (11), a resistive random access layer (12) and a top electrode (14). The resistive random ac...  
WO/2013/073993A8
The present invention relates to micro- and nano-electronics devices based on non-conventional materials. Such memristor devices with stable and reproducible characteristics can be used in the production of computer systems based on the ...  
WO/2014/087784A1
Provided are a memory element and a memory device which can attain an improvement in the retention of an intermediate resistance in writing with a low current. Also provided are a memory element and a memory device which can attain a red...  
WO/2014/084006A1
[Problem] To obtain large drive current for a vertical-type cell transistor, improve the processing accuracy of an active field, and reduce memory cell size. [Solution] A semiconductor device (1) is provided with the following: a first a...  
WO/2014/080616A1
This nonvolatile semiconductor storage device is provided with: a first memory cell (MC0), which includes a first cell transistor (TC0) and a first variable resistance element (RR0); a second memory cell (MC1), which includes a second ce...  
WO/2014/076869A1
A variable resistance layer (106) interposed between a first electrode (105) and a second electrode (107) has a first variable resistance layer (106a) in contact with the first electrode (105), and a second variable resistance layer (106...  
WO/2014/076509A2  
WO/2014/020478A3
A bipolar resistive switching device comprises a bottom electrode, a stack of at least two transition metal oxides layers, the stack including at least one oxygen gettering layer, and a top electrode. A particular configuration is Pt/TaO...  
WO/2013/109954A3
Embodiments of the invention generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has improved device switching performance and lifetime, due to the addition of a curre...  
WO/2014/061091A1
The purpose of the present invention is to provide a semiconductor storage device allowing the total surface area of a direct peripheral circuit to be kept small. This semiconductor storage device is provided with a selection transistor ...  
WO/2014/058858A1
A polymer-based device comprising a substrate; a first electrode disposed on the substrate; an active polymer layer disposed on and in contact with the first electrode; and a second electrode disposed on and in contact with the active po...  
WO/2014/057734A1
The present invention addresses the problem of inhibiting the evolution of a poisoning gas to eliminate wiring-pattern resolution failures and thereby forming a desired wiring layer structure to provide functional elements having an impr...  
WO/2014/047974A1
A resistive random access memory and a preparation method thereof. The resistive random access memory comprises a substrate (4) and multiple storage units that are separated from each other on the substrate (4). Each storage unit compris...  
WO/2014/050198A1
The present invention provides a "three-terminal switch" of novel structure, having two signal electrodes and a control electrode for controlling a switching action that forms or eliminates a metal bridge that couples the signal electrod...  
WO/2014/045372A1
The objective of the present invention is, in a semiconductor recording device in which a plurality of memory cells are connected in series, to suppress the current supplied to recording elements from varying between layers. In the semic...  
WO/2014/043630A1
Provided are nonvolatile memory assemblies each including a resistive switching layer and current steering element. The steering element may be a transistor connected in series with the switching layer. Resistance control provided by the...  
WO/2013/192216A3
A three-dimensional memory is formed as an array of memory elements across multiple layers positioned at different distances above a semiconductor substrate. Cylindrical stacks of memory elements are formed where a cylindrical opening ha...  
WO/2014/040356A1
Provided are a phase change memory location for replacing DRAM and FLASH and a manufacturing method therefor, comprising a phase change material layer and a cylindrical lower electrode in contact therewith and located thereunder, and cha...  
WO/2014/040359A1
A high-speed, high-density, low-power consumption, phase-change memory unit and a manufacturing method therefor. First, a transitional material layer (5) having an accommodation space is manufactured on the surface of a structure of a fi...  
WO/2014/043109A1
Techniques for producing a single-crystal phase change material and the incorporation of those techniques in an electronic device fabrication process flow are provided. In one aspect, a method of fabricating an electronic device is provi...  
WO/2014/040358A1
Provided in the present invention are a TiSiN material layer-containing phase-change memory unit and a manufacturing method therefor. The phase-change memory unit comprises a phase-change material layer and a lower electrode arranged the...  
WO/2014/040357A1
An antimony-rich high-speed phase-change material for use in a phase-change memory device, a manufacturing method for the material, and an application thereof. The antimony-rich high-speed phase-change material for use in the phase-chang...  
WO/2014/038152A1
Provided is a variable resistance element (1) equipped with: a first electrode (3); a second electrode (6); a first metal oxide layer (51) disposed between the first electrode and the second electrode and having a first resistivity; a se...  
WO/2014/036837A1
Provided are a resistive random access memory having a leakage-restraining feature, and a manufacturing method thereof. The resistive random access memory can restrain Sneak current in a cross-shaped array of a large-sale RRAM. A memory ...  
WO/2014/034420A1
Provided is a resistance change memory element (20A) that includes: a resistance change insulating film (8); a source electrode (17A) arranged on a first principal surface of the resistance change insulating film; a drain electrode (18A)...  
WO/2013/173140A3
A three-dimensional array of memory elements reversibly change a level of electrical conductance/resistance in response to one or more voltage differences being applied across them. Memory elements are formed across a plurality of planes...  

Matches 401 - 450 out of 6,246