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Matches 1 - 50 out of 8,058

Document Document Title
WO/2018/004851A1
Integrated circuit (IC) chip "on-die" inductor structures (systems and methods for their manufacture) may improve signaling from a data signal circuit to a surface contact of the chip. Such inductor structures may include a first data si...  
WO/2018/004563A1
An integrated circuit (IC) comprises one or more intra-metal finger to finger capacitors having a closed loop and one or more inter-metal plate to plate capacitors integrated with the one or more intra-metal finger to finger capacitors.  
WO/2018/004651A1
Techniques are disclosed for forming an integrated circuit including a capacitor having a multilayer dielectric stack. For example, the capacitor may be a metal-insulator-metal capacitor (MIMcap), where the stack of dielectric layers is ...  
WO/2018/003864A1
Provided are: a semiconductor device in which a non-volatile switch on which a rectifier is mounted and a non-volatile element on which a rectifier is not mounted are formed in the same wiring; and a method for producing a semiconductor ...  
WO/2017/221708A1
[Problem] To enable formation of a plurality of batteries having an arbitrarily defined shape from a sheet-shaped battery in which a charge layer is sandwiched between a positive pole layer and a negative pole layer, to be performed easi...  
WO/2017/218135A1
Capacitive interconnects and processes for fabricating the capacitive interconnects are provided. In some embodiments, the capacitive interconnect includes first metal layers, second metal layers; and dielectric layers including a dielec...  
WO/2017/217119A1
[Problem] To provide a circuit element, a storage device, an electronic instrument, a method for writing information to the circuit element, and a method for reading information from the circuit element. [Solution] A circuit element prov...  
WO/2017/217316A1
The present invention provides a technique of forming a device pattern at an accurate position on both surfaces of a sheet-shaped secondary battery or a sheet-shaped device. This method for manufacturing a sheet-shaped secondary battery ...  
WO/2017/204863A1
Some embodiments include a ferroelectric device comprising ferroelectric material adjacent an electrode. The device includes a semiconductor material-containing region along a surface of the ferroelectric material nearest the electrode. ...  
WO/2017/199618A1
[Problem] To provide a secondary battery manufacturing method with which an increase in discharge capacity can be achieved. [Solution] The secondary battery manufacturing method according to the present invention comprises stacking, in t...  
WO/2017/170149A1
To stabilize programming operation and to reduce leakage current. A variable resistance element according to the present invention is provided with: an interlayer insulating film; a first electrode that is formed within the interlayer in...  
WO/2017/155625A1
Disclosed herein are electronic components having three-dimensional capacitors disposed in a metallization stack, as well as related methods and devices. In some embodiments, for example, an electronic component may include: a metallizat...  
WO/2017/150617A1
Provided is a thin film in which the semiconductor characteristics of an In-Ga-Zn-O-based oxide are reversible, and a method of manufacturing the same. A semiconductor/insulator reversible-change thin film comprising an In-Ga-Zn-O-based ...  
WO/2017/144855A1
According to one embodiment of the present disclosure, a device comprises a latching circuitry, where the latching circuitry comprises at least one correlated electron switch, hereinafter termed CES, element. The latching circuitry furth...  
WO/2017/139410A1
Some features pertain to an integrated device that includes a die and a first redistribution portion coupled to the die. The first redistribution portion includes at least one dielectric layer and a capacitor. The capacitor includes a fi...  
WO/2017/137269A1
With a micro-electronic electrode assembly (1) having a first electrode (3) arranged on a substrate (2), wherein the first electrode (3) has a thin layer made of a first electrode material having a solid state lattice, wherein the first ...  
WO/2017/127205A1
A tunable bus-mediated coupling system is provided that includes a first input port coupled to a first end of a variable inductance coupling element through a first resonator and a second input port coupled to a second end of the variabl...  
WO/2017/126664A1
A microswitch configured from a first electrode, a second electrode, and a porous polymer metal complex conductor, wherein the microswitch is characterized in that the porous polymer metal complex conductor is expressed by formula (1) be...  
WO/2017/123332A1
An integrated radio frequency (RF) circuit structure may include a resistive substrate material and a switch. The switch may be arranged in a silicon on insulator (SOI) layer supported by the resistive substrate material. The integrated ...  
WO/2017/119938A1
A skewed, co-spiral inductor structure includes a first trace (410) arranged in a first spiral pattern that is supported by a substrate. The skewed, co-spiral inductor structure also includes a second trace (420) arranged in a second spi...  
WO/2017/112397A1
An exemplary MIM capacitor may include a first metal plate, a dielectric layer on the first metal plate, a second metal plate on the dielectric layer, a via layer on the second metal plate, and a third metal plate on the via layer where ...  
WO/2017/100237A1
The teachings of the present disclosure may be applied to the manufacture and design of capacitors. In some embodiments of these teachings, a capacitor may be formed on a heavily doped substrate. For example, a method for manufacturing a...  
WO/2017/095678A1
A method used in forming an electronic component comprising conductive material and ferroelectric material comprises forming a non-ferroelectric metal oxide-comprising insulator material over a substrate. A composite stack comprising at ...  
WO/2017/086399A1
According to the present invention, electrode layers 24, 26 are connected to a bismuth ferrite layer 22 by being arranged so as to sandwich the bismuth ferrite layer 22 from a direction that is perpendicular to the c-axis of a bismuth fe...  
WO/2017/085173A1
The invention relates to a nickel electrode, comprising an electrically conductive nickel sheet and a nickel layer applied thereto consisting of spherical, porous nickel particles adhering to each other, obtainable by a method comprising...  
WO/2017/066309A1
Methods of processing a substrate include: providing a substrate having a polymer dielectric layer, a metal pad formed within the polymer dielectric layer and a first metal layer formed atop the polymer dielectric layer; depositing a pol...  
WO/2017/059104A1
Example methods and mechanisms are described herein for implementing and adiabatically operating a topological quantum computing (TQC) phase gate that complements the existing Clifford operations, and thereby allows universal quantum com...  
WO/2017/057046A1
The present art relates to a semiconductor device capable of improving yield. A volatile logic circuit of the present invention has a storage node, and stores inputted information. A plurality of nonvolatile elements are connected to the...  
WO/2017/051527A1
The purpose of the present invention is to enable manufacture of a metal-precipitating resistance changing element in which variations in program voltage and high-resistance-state leak current are decreased while decreasing the program v...  
WO/2017/052813A1
Embodiments of the invention include inductors integrated into a package substrate that have increased thicknesses due to the use of shaped vias, and methods of forming such packages. In an embodiment of the invention an inductor may be ...  
WO/2017/048369A1
An augmented capacitor structure includes a substrate and a first capacitor plate of a first conductive layer on the substrate. The augmented capacitor structure also includes an insulator layer on a surface of the first capacitor plate ...  
WO/2017/041936A1
The invention relates to a method for producing a trench capacitor (2), comprising the steps of providing a substrate (200), which has a front side (201) and a back side (202), producing a trench structure having trenches (210) on the fr...  
WO/2017/043011A1
According to an embodiment of the present invention, a secondary battery manufacturing method is a method for manufacturing a secondary battery having a plurality of unit cells 21 that are connected in parallel. The method is provided wi...  
WO/2017/038095A1
The purpose of the present invention is to provide a method for efficiently performing characterization of a programmable logic integrated circuit having a crossbar switch involving the use of a resistance change element, in order to per...  
WO/2017/038008A1
An oxide semiconductor secondary battery according to the present embodiment is provided with: a first electrode (14); an n-type metal oxide semiconductor layer (16) formed on the first electrode (14); a charge layer (18) that is formed ...  
WO/2017/025760A1
The present techniques generally relate to apparatus and methods for providing programmable currents for correlated electron switches.  
WO/2017/021721A1
Subject matter disclosed herein relates to correlated electron switches.  
WO/2017/018706A1
The embodiment of the present invention relates to a method for manufacturing a capacitor having a high dielectric constant, which can prevent surface deterioration of a dielectric film due to a vacuum break and prevent the quality of th...  
WO/2017/011269A3
An optical radiation source produced from a disordered semiconductor material, such as black silicon, is provided. The optical radiation source includes a semiconductor substrate, a disordered semiconductor structure etched in the semico...  
WO/2017/007555A1
An integrated circuit structure (100) includes: a semiconductor substrate (102); a shallow trench isolation (STI) region (106) in the semiconductor substrate (102); one or more active devices formed on the semiconductor substrate (102); ...  
WO/2017/004316A3
Copper (Cu) grain boundaries can move during a thermal cycle resulting in the Cu grain position being offset. Such Cu pumping can disturb the surface of a bottom metal, and can physically break a dielectric of a metal-insulator-metal (MI...  
WO/2017/002284A1
Provided is a battery having desired characteristics, and a charging/discharging method. A battery according to an embodiment of the present invention is provided with: a first electrode layer (6); a second electrode layer (7); and a cha...  
WO/2017/004316A2
Copper (Cu) grain boundaries can move during a thermal cycle resulting in the Cu grain position being offset. Such Cu pumping can disturb the surface of a bottom metal, and can physically break a dielectric of a metal-insulator-metal (MI...  
WO/2016/208116A1
A secondary battery manufacturing method according to the present invention is a method for manufacturing a secondary battery which includes a charging layer that captures electrons by forming energy levels in a band gap by causing a pho...  
WO/2016/203751A1
Provided is a rectifying element wherein current-voltage characteristics are improved. The rectifying element has: a first electrode and a second electrode; a rectifying layer that is provided between the first electrode and the second e...  
WO/2016/205604A1
Disclosed is a method for manufacturing a thin film resistor after completing a copper chemical mechanical polishing (CMP) process on a copper process module including the steps of: depositing a dielectric barrier layer (100) across at l...  
WO/2016/205078A3
A three dimensional memory device includes a memory device region containing a plurality of non-volatile memory devices, a peripheral device region containing active driver circuit devices, and a stepped surface region between the periph...  
WO/2016/205078A2
A three dimensional memory device includes a memory device region containing a plurality of non-volatile memory devices, a peripheral device region containing active driver circuit devices, and a stepped surface region between the periph...  
WO/2016/199556A1
Provided is a memory device having a structure suitable for higher integration while ensuring ease of manufacture. The memory device is provided with n memory cell units which are layered on a substrate successively from a first memory c...  
WO/2016/199412A1
In order to improve the number rewrites by improving the dielectric breakdown resistance of an ion conducting layer in a variable resistance element, this variable resistance element is provided with: a first electrode that contains at l...  

Matches 1 - 50 out of 8,058