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Matches 1 - 50 out of 8,593

Document Document Title
WO/2020/260747A1
The present invention relates to s capacitor structure implemented using a semiconductor process. The capacitor structure comprises a plurality of interdigitated positive and negative electrode fingers separated by a dielectric material,...  
WO/2020/263635A1
Capacitor structures including a first island of a first conductive region and a second island of the first conductive region having a first conductivity type, an island of a second conductive region having a second conductivity type dif...  
WO/2020/261736A1
In the present invention, with regard to a selection element that is provided with a plurality of switch layers and that performs selection control in accordance with an applied voltage, the usage-possible period of the selection element...  
WO/2020/261191A1
An opto-electronic device comprises light transmissive regions extending through it along a first axis to allow passage of light therethrough. The transmissive regions may be arranged along a plurality of transverse configuration axes. E...  
WO/2020/237345A1
An electronic circuit for thin-film transistors, the circuit including: a driving TFT; an input signal; a compensation TFT provided between gate and source terminals of the driving TFT; a storage TFT provided between the input signal and...  
WO/2020/235591A1
The purpose of the present invention is to provide a novel variable resistance device, the resistance state of which is variable. Consequently, one of typical variable resistance devices according to the present invention is provided w...  
WO/2020/124225A9
The present application relates to thin film transistors having a semiconducting channel comprising a network of carbon nanotubes that are electrically coupled to a source electrode and a drain electrode and electrically insulated from, ...  
WO/2020/213240A1
In order to improve memory access parallelism without sacrificing the operation margin, a storage unit is provided with a plurality of first wires extending in a first direction, a plurality of second wires extending in a second directio...  
WO/2020/209894A1
A method is provided for forming a thin film resistor (TFR) in an integrated circuit (IC) including IC elements, e.g., memory components. A first contact etch stop layer is formed over the IC elements. A TFR layer stack including a TFR e...  
WO/2020/207988A1
Three-dimensional capacitive structures (150) may be produced by forming a capacitive stack (153-155) conformally over pores (151) in a region (152a) of porous anodic oxide. The porous anodic oxide region is provided on a stack of electr...  
WO/2020/201547A1
The capacitor comprises: a first porous semiconductor with an average pore size ranging between 20 nm and 200 nm, preferably between 40 nm and 100 nm, and at least one second electric conductor, wherein the second electric conductor infi...  
WO/2020/205752A1
A microelectronic device (100) contains a high voltage component (104) having an upper plate (132) and a lower plate (130). The upper plate is isolated from the lower plate by a main dielectric (136) between the upper plate and low volta...  
WO/2020/203220A1
Provided is a logic integrated circuit wherein a read/write control line is connected to a first circuit and a second circuit, a switch cell array is connected to the first circuit, and a logic element is connected to the second circuit,...  
WO/2020/204415A1
A composite element according to an embodiment of the present invention comprises: a stacked body; a capacitor portion provided in the stacked body; an overvoltage protection portion formed apart from the capacitor portion in the stacked...  
WO/2020/195918A1
The present invention provides a non-linear resistance element provided with a first electrode made of a metal nitride, a first intermediate layer made of a metal, a non-linear resistance layer made of an amorphous chalcogenide thin film...  
WO/2020/190467A1
An apparatus including a dielectric layer; and a set of thin-film resistors arranged in a row extending in a first direction on the dielectric layer, wherein lengths of the set of thin-film resistors in a second direction substantially o...  
WO/2020/144223A3
Method for forming product structure having porous regions and lateral encapsulation A method for fabricating a structure, the structure comprising: - an insulating layer (201), - a first metal layer (203) above a first portion of the in...  
WO/2020/179199A1
In this non-volatile memory device (100), inside a storage area (60), a first lower layer metal wiring (20), a bottom plug (30), a variable resistance element (40), a top plug (32), and a first upper layer metal wiring (23) are formed in...  
WO/2020/166073A1
According to an embodiment, a nonvolatile semiconductor storage device is provided with: a plurality of first wiring layers extending in a first direction; a plurality of second wiring layers extending over the plurality of first wiring ...  
WO/2020/139457A9
An inductor or transformer with the inductor can include one or more windings split into strands along a radial path of the winding and provide for a more uniform current distribution across a width of the winding. The winding(s) can com...  
WO/2020/162459A1
The present invention provides a capacitor including: a base material including a pore structure part; a metal layer provided on one main surface of the base material; an extended layer provided on the metal layer; a lower electrode laye...  
WO/2020/154229A1
Some embodiments include an integrated assembly having first electrodes with top surfaces, and with sidewall surfaces extending downwardly from the top surfaces. The first electrodes are solid pillars. Insulative material is along the si...  
WO/2020/148516A1
Briefly, embodiments of claimed subject matter relate to devices and methods for formation of ferroelectric materials utilizing transition metals, transition metal oxides, post transition metals, and/or post transition metal oxides, whic...  
WO/2020/144568A1
RC architectures (1) are described which comprise a substrate (2) provided with a capacitor having a thin-film top electrode portion (7) at a surface of the substrate on one side (2a) thereof. The resistance provided in series with the 3...  
WO/2020/144223A2
Method for forming product structure having porous regions and lateral encapsulation A method for fabricating a structure, the structure comprising: - an insulating layer (201), - a first metal layer (203) above a first portion of the in...  
WO/2020/145253A1
A switching element that has reduced switching voltage and leakage current and that demonstrates high reliability and low power consumption is achieved as a result of comprising: a first insulating layer in which first wiring mainly cons...  
WO/2020/136974A1
This resistance-variable nonvolatile memory element (20) comprises: a first electrode (2); a second electrode (4); and a resistance-variable layer (3) disposed between the first electrode (2) and the second electrode (4) and having a res...  
WO/2020/137912A1
A secondary battery (100) according to the present invention comprises a first electrode (10) and a second electrode (20); and a film-like first resin sheet (31) and/or a film-like second resin sheet (32) that contains a solid electrolyt...  
WO/2020/139626A1
Methods and apparatus for a magnetized substrate carrier apparatus are described herein. In some embodiments, a substrate carrier apparatus includes: a carrier plate having a support surface to support a substrate, a mask assembly dispos...  
WO/2020/139457A1
An inductor or transformer with the inductor can include one or more windings split into strands along a radial path of the winding and provide for a more uniform current distribution across a width of the winding. The winding(s) can com...  
WO/2020/139955A1
The present invention includes a method for creating an annular capacitor adjacent to via or imbedded metal structure allowing for device to be made in close proximity to the via connecting to a ground plane. The annular capacitor in clo...  
WO/2019/133509A3
Embodiments of the present disclosure generally relate to a method for forming a metal-insulator-metal (MIM) capacitor for display applications. The method includes forming a metal electrode over a substrate, and exposing the metal elect...  
WO/2020/131324A1
A method of forming an array of capacitors comprises forming a plurality of horizontally- spaced groups that individually comprise a plurality of horizontally -spaced lower capacitor electrodes having a capacitor insulator thereover. Adj...  
WO/2020/124225A1
The present application relates to thin film transistors having a semiconducting channel comprising a network of carbon nanotubes that are electrically coupled to a source electrode and a drain electrode and electrically insulated from, ...  
WO/2020/121799A1
The purpose of the present invention is to provide a thermal battery which is capable of obtaining greater electromotive force than is the prior art. A thermal battery having an element equipped with a first electrode, a second electrode...  
WO/2020/074534A3
The invention relates to an integrated capacitor having a first electrode structure, a second electrode structure and a dielectric layer structure situated therebetween. The dielectric layer structure has a layer combination with a Si02-...  
WO/2020/104624A1
A nanowire structure enhanced for the deposition of a stack such as an electrode-insulator-electrode structure therein is proposed. The structure comprises a conductive layer (1308); conductive wires (1316) having first ends that contact...  
WO/2020/100722A1
The present invention provides a technique for improving the performance of a secondary battery. The secondary battery (100) of the present embodiment comprises: a first electrode (21); a second electrode (22); a first layer (11) that is...  
WO/2020/085607A1
A cross-point capacitor based weighting element according to an embodiment of the present invention, comprises: a unit horizontal stacked structure having horizontal conductive lines extending in a first direction, and horizontal insulat...  
WO/2020/074534A2
The invention relates to an integrated capacitor having a first electrode structure, a second electrode structure and a dielectric layer structure situated therebetween. The dielectric layer structure has a layer combination with a Si02-...  
WO/2020/068226A1
An apparatus is provided which comprises: a comparator circuitry (e.g., auto-zero comparator) to having a first input, a second input, a third input; and an output; a first device (e.g., a low-side switch) coupled to the first and second...  
WO/2020/065298A1
The invention relates to an energy storage device (21) comprising a substrate with a groove (3) having a first and a second face (9a, 9b). A capacitor material (5) in the groove (3), the capacitor material having an upper surface (25). T...  
WO/2020/035793A1
A compound of Formula (0): where Ar is one or more substituted or unsubstituted aromatic units, R is independently H, F, CN, a C1-C20 linear or branched aliphatic group or a C1-C20 linear or branched aliphatic acyl group, and n is an int...  
WO/2020/029177A1
A capacitor and a manufacturing method for the same. The capacitor comprises: a semiconductor substrate (101) comprising an opposing upper surface and lower surface; at least one first trench (108) disposed at the semiconductor substrate...  
WO/2019/243882A3
A semiconductor structure enhanced for high-voltage applications is disclosed. The structure comprises a protruding wall structure, formed by etching a substrate, that extends from a base surface of the substrate. Corners of the protrudi...  
WO/2020/033078A1
Aspects generally relate to a capacitor formed by a first conductive plate and a second conductive plate with an insulating material located between the first and second conductive plates. A third conductive plate is coupled to the secon...  
WO/2020/028142A1
An integrated circuit (IC) (100) includes a substrate (102) having functional circuitry (106) for realizing at least one circuit function configured together with at least one high voltage isolation component including a top metal featur...  
WO/2020/023743A1
An integrated circuit (IC) (100) includes a substrate having a semiconductor surface layer (102) with functional circuitry for realizing at least one circuit function, with an inter level dielectric (ILD) layer (112) on a metal layer (11...  
WO/2020/018847A1
FET IC structures that enable formation of high-Q inductors in a "flipped" SOI IC structure made using a back-side access process, such as a single layer transfer (SLT) process. Essentially, the interconnect layer superstructure of an IC...  
WO/2020/009765A1
Embodiments include a microelectronic device package structure having an inductor within a portion of a substrate, wherein a surface of the inductor is substantially coplanar with a surface of the substrate. One or more thermal interconn...  

Matches 1 - 50 out of 8,593