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Matches 1 - 50 out of 8,127

Document Document Title
WO/2018/100790A1
A neuron circuit comprising: an input terminal to which spike signals are input in chronological order; a first switch element with one end connected to the input terminal and the other end connected to an intermediate node, the first sw...  
WO/2018/097924A1
A device and method of utilizing spiral interconnects for voltage and power regulation are shown. Examples of spiral interconnects include air core inductors. An integrated circuit package attached to a motherboard using spiral interconn...  
WO/2018/095824A1
An integrated electronic component (10) suitable for broadband biasing comprises a monolithic substrate (1), a capacitor structure arranged in a trench (3) network which extends into the substrate, and a continuous track (8) of an electr...  
WO/2018/085016A2
A method of forming an array comprising pairs of vertically opposed capacitors comprises forming an upwardly-open conductive lining in individual capacitor openings in insulative-comprising material. An elevational mid- portion of indivi...  
WO/2018/085022A1
A method of forming an array comprising pairs of vertically opposed capacitors comprises forming a conductive lining in individual capacitor openings in insulative-comprising material. An elevational mid-portion of individual of the cond...  
WO/2018/066320A1
A switch element according to one embodiment of the present disclosure is provided with a first electrode, a second electrode that is arranged to face the first electrode, and a switch layer that is disposed between the first electrode a...  
WO/2018/063687A1
Embodiments are generally directed to non-planar on-package via capacitor. An embodiment of an embedded capacitor includes a first plate that is formed in a package via; a dielectric layer that is applied on the first plate; and a second...  
WO/2018/057227A1
An inductor is disclosed, including a first wire, a non-conductive material, and a shell. The non-conductive material may cover the first wire, with a portion of each end of the first wire uncovered. The shell may include a top portion a...  
WO/2018/057132A1
Apparatuses including compensation capacitors are described. An example apparatus includes: first, second and third capacitors arranged such that the second capacitor is sandwiched between the first and third capacitors, each of the firs...  
WO/2018/054828A1
A 3D-capacitor structure is based on a trench network which is etched from a top face (S100) of a substrate (100), and forms a regular array of separated pillars (10). The 3D-capacitor structure comprises a double capacitor layer stack w...  
WO/2018/057778A3
Integrated circuit layouts are disclosed that include metal layers with metal tracks having separate metal sections along the metal tracks. The separate metal sections along a single track may be electrically isolated from each other. Th...  
WO/2018/052651A1
A capacitor may include a first capacitor plate having a first length. The capacitor may also include an inorganic capacitor dielectric layer on sidewalls and a surface of the first capacitor plate and a second capacitor plate on the ino...  
WO/2018/048480A1
Group 4 transition metal-containing film forming compositions comprising Group 4 transition metal atrane precursors are disclosed. Also disclosed are methods of synthesizing and using the disclosed precursors to deposit Group 4 transitio...  
WO/2018/043425A1
A semiconductor device having a plurality of memory cells (MC1, MC2), the semiconductor device being such that each of the plurality of memory cells (MC1, MC2) respectively has: a memory transistor (10M) having an oxide semiconductor lay...  
WO/2018/038598A1
A monolithic on-chip fine tune spiral inductor device comprises a semiconductor substrate including a plurality of metal layers; a plurality of peripheral metal grounds being formed in one of the metal layers and disposed at peripheral o...  
WO/2018/034753A3
A passive device may include an inductor having interconnected trace segments. The passive device may also include parallel plate capacitors. Each of the plurality of parallel plate capacitors may have a dielectric layer between a pair o...  
WO/2018/034770A1
An integrated circuit (IC) device (300) may include a first substrate (310) having an inductor ground plane (320) in a conductive layer of the first substrate. The integrated circuit may also include a first inductor (340) in a passive d...  
WO/2018/025691A1
Provided is a rectifier element for preventing incorrect writing and incorrect operation, and for replacing a select transistor. A semiconductor device on which the rectifier element is mounted, which has excellent reliability, and which...  
WO/2018/025654A1
This secondary battery is provided with: a first electrode (11); a second electrode (17); a charging layer (14) which is arranged between the first electrode (11) and the second electrode (17), and contains a mixture of an insulating mat...  
WO/2018/022098A1
The present subject matter relates to display control in display devices. In an example implementation, a display control layer for a display device comprises a first set of channels filled with a first electrochromic material to control...  
WO/2018/022247A1
A stepped-width, co-spiral inductor structure includes a first exterior layer having a first exterior width. The stepped-width, co-spiral inductor structure also includes a first interior layer coupled to the first exterior layer. The fi...  
WO/2018/004851A1
Integrated circuit (IC) chip "on-die" inductor structures (systems and methods for their manufacture) may improve signaling from a data signal circuit to a surface contact of the chip. Such inductor structures may include a first data si...  
WO/2018/004563A1
An integrated circuit (IC) comprises one or more intra-metal finger to finger capacitors having a closed loop and one or more inter-metal plate to plate capacitors integrated with the one or more intra-metal finger to finger capacitors.  
WO/2018/004651A1
Techniques are disclosed for forming an integrated circuit including a capacitor having a multilayer dielectric stack. For example, the capacitor may be a metal-insulator-metal capacitor (MIMcap), where the stack of dielectric layers is ...  
WO/2018/003864A1
Provided are: a semiconductor device in which a non-volatile switch on which a rectifier is mounted and a non-volatile element on which a rectifier is not mounted are formed in the same wiring; and a method for producing a semiconductor ...  
WO/2017/221708A1
[Problem] To enable formation of a plurality of batteries having an arbitrarily defined shape from a sheet-shaped battery in which a charge layer is sandwiched between a positive pole layer and a negative pole layer, to be performed easi...  
WO/2017/218135A1
Capacitive interconnects and processes for fabricating the capacitive interconnects are provided. In some embodiments, the capacitive interconnect includes first metal layers, second metal layers; and dielectric layers including a dielec...  
WO/2017/217119A1
[Problem] To provide a circuit element, a storage device, an electronic instrument, a method for writing information to the circuit element, and a method for reading information from the circuit element. [Solution] A circuit element prov...  
WO/2017/217316A1
The present invention provides a technique of forming a device pattern at an accurate position on both surfaces of a sheet-shaped secondary battery or a sheet-shaped device. This method for manufacturing a sheet-shaped secondary battery ...  
WO/2017/204863A1
Some embodiments include a ferroelectric device comprising ferroelectric material adjacent an electrode. The device includes a semiconductor material-containing region along a surface of the ferroelectric material nearest the electrode. ...  
WO/2017/199618A1
[Problem] To provide a secondary battery manufacturing method with which an increase in discharge capacity can be achieved. [Solution] The secondary battery manufacturing method according to the present invention comprises stacking, in t...  
WO/2017/170149A1
To stabilize programming operation and to reduce leakage current. A variable resistance element according to the present invention is provided with: an interlayer insulating film; a first electrode that is formed within the interlayer in...  
WO/2017/155625A1
Disclosed herein are electronic components having three-dimensional capacitors disposed in a metallization stack, as well as related methods and devices. In some embodiments, for example, an electronic component may include: a metallizat...  
WO/2017/150617A1
Provided is a thin film in which the semiconductor characteristics of an In-Ga-Zn-O-based oxide are reversible, and a method of manufacturing the same. A semiconductor/insulator reversible-change thin film comprising an In-Ga-Zn-O-based ...  
WO/2017/144855A1
According to one embodiment of the present disclosure, a device comprises a latching circuitry, where the latching circuitry comprises at least one correlated electron switch, hereinafter termed CES, element. The latching circuitry furth...  
WO/2017/139410A1
Some features pertain to an integrated device that includes a die and a first redistribution portion coupled to the die. The first redistribution portion includes at least one dielectric layer and a capacitor. The capacitor includes a fi...  
WO/2017/137269A1
With a micro-electronic electrode assembly (1) having a first electrode (3) arranged on a substrate (2), wherein the first electrode (3) has a thin layer made of a first electrode material having a solid state lattice, wherein the first ...  
WO/2017/127205A1
A tunable bus-mediated coupling system is provided that includes a first input port coupled to a first end of a variable inductance coupling element through a first resonator and a second input port coupled to a second end of the variabl...  
WO/2017/126664A1
A microswitch configured from a first electrode, a second electrode, and a porous polymer metal complex conductor, wherein the microswitch is characterized in that the porous polymer metal complex conductor is expressed by formula (1) be...  
WO/2017/123332A1
An integrated radio frequency (RF) circuit structure may include a resistive substrate material and a switch. The switch may be arranged in a silicon on insulator (SOI) layer supported by the resistive substrate material. The integrated ...  
WO/2017/119938A1
A skewed, co-spiral inductor structure includes a first trace (410) arranged in a first spiral pattern that is supported by a substrate. The skewed, co-spiral inductor structure also includes a second trace (420) arranged in a second spi...  
WO/2017/112397A1
An exemplary MIM capacitor may include a first metal plate, a dielectric layer on the first metal plate, a second metal plate on the dielectric layer, a via layer on the second metal plate, and a third metal plate on the via layer where ...  
WO/2017/100237A1
The teachings of the present disclosure may be applied to the manufacture and design of capacitors. In some embodiments of these teachings, a capacitor may be formed on a heavily doped substrate. For example, a method for manufacturing a...  
WO/2017/095678A1
A method used in forming an electronic component comprising conductive material and ferroelectric material comprises forming a non-ferroelectric metal oxide-comprising insulator material over a substrate. A composite stack comprising at ...  
WO/2017/086399A1
According to the present invention, electrode layers 24, 26 are connected to a bismuth ferrite layer 22 by being arranged so as to sandwich the bismuth ferrite layer 22 from a direction that is perpendicular to the c-axis of a bismuth fe...  
WO/2017/085173A1
The invention relates to a nickel electrode, comprising an electrically conductive nickel sheet and a nickel layer applied thereto consisting of spherical, porous nickel particles adhering to each other, obtainable by a method comprising...  
WO/2017/066309A1
Methods of processing a substrate include: providing a substrate having a polymer dielectric layer, a metal pad formed within the polymer dielectric layer and a first metal layer formed atop the polymer dielectric layer; depositing a pol...  
WO/2017/059104A1
Example methods and mechanisms are described herein for implementing and adiabatically operating a topological quantum computing (TQC) phase gate that complements the existing Clifford operations, and thereby allows universal quantum com...  
WO/2017/057046A1
The present art relates to a semiconductor device capable of improving yield. A volatile logic circuit of the present invention has a storage node, and stores inputted information. A plurality of nonvolatile elements are connected to the...  
WO/2017/051527A1
The purpose of the present invention is to enable manufacture of a metal-precipitating resistance changing element in which variations in program voltage and high-resistance-state leak current are decreased while decreasing the program v...  

Matches 1 - 50 out of 8,127