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Matches 451 - 500 out of 559,990

Document Document Title
WO/2019/145309A1
The invention relates to a circuit arrangement (1) for generating cyclically successive current impulses (I1, ... In) on contacts (K1, K2), which are to be cleaned, of a target value monitor, which, for continual querying of a target val...  
WO/2019/147666A1
An amplifier circuit (400) includes an input port (202), an output port (204), and a reference potential port (214), an RF amplifier device (206) having an input terminal (208) electrically coupled to the input port (202), an output term...  
WO/2019/147167A1
The utility model relates to digital-to-analog converters and can be used in devices for converting a digital code into an analog voltage. The technical result of the invention is a reduction in the number of nominal resistance values us...  
WO/2019/147417A1
A delta-sigma modulator (DSM) includes: a first summation circuit coupled to an input signal for subtracting an error feedback signal from the input signal; a tunable signal transfer function coupled to the first summation circuit for se...  
WO/2019/146534A1
In order to provide a logic integrated circuit having a reduced chip area, the present invention provides a logic integrated circuit comprising a switch cell array that has: a plurality of first wirings extending in a first direction; a ...  
WO/2019/146550A1
Provided is a power amplification circuit which reduces the impact of intermodulation distortion while minimizing increase in circuit scale. The power amplification circuit is provided with: a first amplifier which amplifies a first sign...  
WO/2019/145026A1
A linearization device (380) is disclosed, which is configured to determine pre-distortion parameters associated with a plurality of non-linear amplifiers (331, 332, 333, 334). Each of the non-linear amplifiers is associated with one of ...  
WO/2019/145903A1
An amplifier (1) comprises an input terminal (IIN) adapted to receive an input voltage signal (v_i) comprising a first phase (to, ti) with a trend monotonically increasing from a substantially null value to a maximum voltage value (Vmax)...  
WO/2019/144419A1
A hybrid Analog-to-Digital Converter (ADC) has multiple stages. A first stage and a final stage each use a Successive-Approximation Register (SAR) ADC to generate the Most-Significant-Bits (MSBs) and the Least-Significant-Bits (LSBs) ove...  
WO/2019/145803A1
Provided is a semiconductor device with which drive capacity can be changed as appropriate. This semiconductor device (100A) comprises first to third circuits (102, 103, 101) and a first holding circuit (SH2) that comprises a first holdi...  
WO/2019/146177A1
According to the present invention, power consumption is suppressed in a time-to-digital converting circuit (TDC) used in a phase-locked loop. The time-to-digital converting circuit is provided with an analog-to-digital converting circui...  
WO/2019/145040A1
A monolithic integrated circuit (1) for controlling a high-side switching element (2) for a load (3) using a bootstrap capacitor is disclosed. The integrated circuit comprises a first supply voltage input (7) for receiving a first input ...  
WO/2019/148095A1
A static-neutralization system includes a plurality of alternating current (AC) static bars that is coupled to a common, high-voltage power supply. The power supply includes a transformer that steps up AC mains electricity to deliver hig...  
WO/2019/146549A1
Provided is a power amplification circuit that is capable of reducing the impact of intermodulation distortion while increasing power output. This power amplification circuit is provided with: a divider that divides an input signal so as...  
WO/2019/145753A1
The present invention concerns an electronic device (1000) comprising a digital circuit (6) to be compensated and a compensation device for compensating PVT variations of this digital circuit (6). This compensation device is arranged als...  
WO/2019/146281A1
This sensor device includes: a sensor unit which generates a detection signal having the same detection frequency as an input sinusoidal analog signal and corresponding to a physical quantity to be detected; a reference signal generating...  
WO/2019/147800A2
A capacitance measuring system detecting an occupant of a vehicle. A sensor/heater assembly is arranged in at least one of a seat or a steering wheel of a vehicle and includes a sensor and a heater arranged adjacent to the sensor. A meas...  
WO/2019/145017A1
An over-temperature protection circuit (11) is described. The circuit comprises an input (13) for sensing a voltage (VDS) across a transistor, a voltage-to-current converter (15) configured to generate a current (Isense_in) in dependence...  
WO/2019/146140A1
A communication system includes a data source to receive a block of bits, a memory to store a set of distribution matchers. Each distribution matcher is associated with a probability mass function (PMF) to match equally likely input bits...  
WO/2019/144787A1
An interleaving method and an interleaving device, being used to provide a specific solution for interleaving bit sequences to be interleaved of which the length is greater than the maximum interleaving dimension determined according to ...  
WO/2019/145626A1
The present invention relates to a presence detection device (40) including a sensor (60) linked to a microcontroller (50), said sensor including a first detection capacitor (62) arranged in a first detection area (Zd1) and a second dete...  
WO/2019/145258A1
A BAW resonator comprises a center area (CA), an underlap region (UL) surrounding the center area having a thickness smaller than the thickness dc of the center region and a frame region (FR), surrounding the underlap region having thick...  
WO/2019/146443A1
The present feature pertains to a DAC circuit, a solid-state imaging element and an electronic device that are designed to be realizable by a small-scale circuit configuration. The DAC circuit is provided with a ramp DAC for generating a...  
WO/2019/141073A1
The present invention provides a film bulk acoustic resonator, comprising a layered structure composed of a top electrode, a piezoelectric layer, and a bottom electrode; and a substrate. A reflective interface is provided between the bot...  
WO/2019/140508A1
Methods and devices for coding point clouds using direct coding mode to code coordinates of a point within a sub-volume associated with a current node instead of a pattern of occupancy for child nodes. Eligibility for use of direct codin...  
WO/2019/142804A1
A control circuit 200B controls a dual-wire panel 400D. The dual-wire panel 400D includes a first region RGN1 and a second region RGN2 which are adjacent to each other in a coordinate axis direction (X-direction). The resistance per unit...  
WO/2019/141355A1
A power amplifier arrangement comprises a power amplifier comprising at least one transistor having a first gate and a second gate. The first gate is configured to receive a radio frequency input signal superimposed with a first control ...  
WO/2019/140741A1
Provided in the present invention is an automatic gain control method applicable in a burst transimpedance amplifier. One transistor is connected in parallel at either end of a feedback resistor of a transimpedance amplifier. A gate-sour...  
WO/2019/140740A1
Provided in the invention is a circuit for multiplexing an MON pin of an optical receiver assembly for optical communication. Drain potential of PMOS transistors M0 and M1 in a current mirror is kept equal through utilization of a first ...  
WO/2019/142203A1
Disclosed is a resonant circuit and method for matched clock and data timing performance for improving timing closure of digital circuits on advanced semiconductor manufacturing processes. The matched resonance circuit comprises pulse ge...  
WO/2019/142546A1
This semiconductor integrated circuit is provided with: a first flip-flop (1a) provided with a first slave latch; a second flip-flop (2a) provided with a second slave latch; and a clock generation circuit (3) that supplies a common clock...  
WO/2019/142730A1
A driving circuit (Dr) drives a plurality of switches (SW1-SW3) to be driven, the switches to be driven being connected in parallel to each other. The switches to be driven have a first main terminal, a second main terminal, and a main c...  
WO/2019/140510A1
Methods and devices for encoding a point cloud. A current node associated with a sub-volume is split into further sub-volumes, each further sub-volume corresponding to a child node of the current node, and, at the encoder, an occupancy p...  
WO/2019/141654A2
The invention relates to an electric circuit for ensuring a safe run-up and coast-down of at least one regulated operating voltage (UVDDI), a reference voltage (UVBG) and a reset signal (NRST) for a consumer, comprising a voltage referen...  
WO/2019/141205A1
A surface acoustic wave (SAW) device (200), the SAW device (200) includes a piezoelectric layer (304) and a transducer (204,206) having a plurality of electrodes (214). The electrodes (214) are aligned with respective longitudinal axes p...  
WO/2019/143854A1
A packaged semiconductor chip includes a power amplifier die including a semiconductor substrate, and an input contact pad, an output contact pad, first and second direct-current (DC) contact pads, one or more transistors having an input...  
WO/2019/141579A1
The invention relates to a method for estimating a radiorefrequency frame received by a plurality of antennae delivering a plurality of corresponding reception signals. Such a method comprises the following steps: detection, or not, of a...  
WO/2019/141584A1
An oscillator circuit arrangement comprises a gain stage (10) and a feedback loop that includes a crystal device (XC). A clock signal monitor circuit(12) is connected to an output (102) of the gain stage and detects a frequency shift in ...  
WO/2019/141364A1
The present invention provides a device (100) for processing digital signals. The device (100) comprises a digital signal source (101) configured to output codewords (104) and (107), a converter circuit (102) configured to generate an ou...  
WO/2019/143588A1
An amplifier includes a differential positive input (602), a differential negative input (604), and a transistor (652). The transistor (652) is communicatively coupled to the differential positive input (602) and differential negative in...  
WO/2019/142483A1
[Problem] To improve the bonding strength in the bonding of a piezoelectric material substrate made from lithium tantalite or the like to a supporting substrate having a silicon oxide layer formed thereon. [Solution] An assembly is provi...  
WO/2019/141199A1
A sub-channel to carry an information bit, in input bits that are to be encoded, is selected from each of multiple subsets of sub-channels that are provided by a length N polar code. The subsets include sub-channels that are associated w...  
WO/2019/142526A1
An amplifier circuit according to the present disclosure is provided with: a first transistor which has a drain that is connected to a first node; a second transistor which has a drain that is connected to a second node; a current source...  
WO/2019/143302A1
According to embodiments of the present invention, a circuit is provided. The circuit includes a first set of transistors configured to receive one or more input signals provided to the circuit, and a second set of transistors electrical...  
WO/2019/142912A1
A symbol-determining device of an embodiment is provided with: a transmission-line-shortening unit for multiplying the tap gain of a linear digital filter for each symbol value in some of symbol sequences of an input signal and outputtin...  
WO/2019/142684A1
This invention pertains to a transmission method and a reception device with which it is possible to ensure excellent communication quality in data transmission using LDPC coding. In groupwise interleaving, an LDPC code having a code len...  
WO/2019/142685A1
This invention pertains to a transmission method and reception device with which it is possible to ensure excellent communication quality in data transmission using LDPC coding. In groupwise interleaving, an LDPC code having a code lengt...  
WO/2019/142681A1
The present art pertains to a transmission method and a receiving device that make it possible to ensure good communication quality when using an LDPC code to transmit data. In groupwise interleaving, an LDPC code having a code length N ...  
WO/2019/142686A1
The present invention relates to a transmission method and a reception device with which it is possible to ensure good communication quality when using LDPC coding to transmit data. In group-wise interleaving in the present invention, an...  
WO/2019/143457A1
An RF generator in a dual frequency RF generation system. The RF generator detects IMD components resulting from interaction of the two frequencies. The IMD is reduced by adjusting the phase of the RF signal output by the RF generator. I...  

Matches 451 - 500 out of 559,990