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Matches 101 - 150 out of 557,771

Document Document Title
WO/2019/102872A1
Provided is a resonance device which is capable of maintaining a vacuum in a vibration space, while suppressing increase in the product height. This resonance device is provided with: a resonator which comprises a lower electrode, an upp...  
WO/2019/102801A1
The present invention addresses the problem of allowing a user to easily know which light-reception unit is in what light-reception state. Provided is a multi-optical axis photoelectric sensor (10) which is provided with: a plurality of ...  
WO/2019/102830A1
In the present invention, an attenuation pole is formed in the vicinity of a desired frequency lower than the pass band of a band-pass filter, and an attenuation pole is formed in the vicinity of a desired frequency higher than the pass ...  
WO/2019/102785A1
The present invention realizes a digital noise filter with which it is possible to reduce jitter. A digital noise filter (11) for removing noise from an input signal, the input signal being an Off signal or an On signal, wherein the digi...  
WO/2019/102952A1
A piezoelectric device comprising: a piezoelectric body 10, at least one section of which is capable of bending vibration; an upper electrode 22 that is positioned on an upper surface of the piezoelectric body 10, and in which warping of...  
WO/2019/102937A1
A noise filter circuit (1) comprises: a pair (two) of common-mode choke coils (31, 32) that are connected in series to AC lines (11, 12) on the output side of a power conversion circuit (10) in which the input side (DC side) ground and t...  
WO/2019/100751A1
Disclosed in the present invention is a mass spectrometer amplifier capable of continuously adjusting high frequency micro-signals in multiples, comprising an one-stage amplifier, a two-stage amplifier, a first three-stage amplifier, a f...  
WO/2019/102373A1
According to some embodiments, a method performed by a wireless device for polar encoding payload bits comprises: identifying payload bits of a data channel that have known values; placing a first subset of the known payload bits at inpu...  
WO/2019/100284A1
A phase locking method, apparatus and device. The method comprises: circularly sampling power grid voltage information in a quarter cycle of a power grid voltage signal wave; setting an array with the length of L, L being jointly determi...  
WO/2019/102951A1
A piezoelectric device comprising: a piezoelectric monocrystalline body 10 with a uniform polarization condition, at least one section of which is capable of bending vibration; an upper electrode 22 that is positioned on an upper surface...  
WO/2019/038450A3
The invention relates to a high-frequency-impedance matching network, comprising an input port and an output port, wherein the input port is designed as an input for a signal of a high-frequency generator G, the output port as an output ...  
WO/2019/104024A1
In a six phase capacitively coupled chopper amplifier, two phases (Phase 1, Phase 4) provide a zeroing phase to zero the feedback capacitors and set the input common mode value. Two phases (Phase 2, Phase 5) provide a passive transfer of...  
WO/2019/101660A1
The present invention relates to a reconfigurable logic circuit comprising - a first, second and third switching circuit arranged for receiving a first input bit, a second input bit and a third input bit, respectively, and each arranged ...  
WO/2018/089121A3
A frequency divider system and method includes a split-divisor frequency divider module. The split-divisor frequency divider module receives a clock signal and generates an output signal based on a first divisor and a second divisor. The...  
WO/2019/098689A1
The present disclosure relates to a 5th generation (5G) or pre-5G communication system for supporting a higher data transfer rate beyond a 4th generation (4G) communication system, such as long term evolution (LTE). The present disclosur...  
WO/2019/097871A1
The present invention is provided with: a differential amplifier (11) for amplifying an inputted differential signal; and an offset adjustment circuit (13) which is connected to the differential amplifier (11), and uses an inputted offse...  
WO/2019/096771A1
A sensor arrangement to sense an external signal comprises a sensor (100) and a charge generator (200) to generate a compensation current (Ic) to compensate the sensor current. A charge generator (200) comprises a first transistor (210) ...  
WO/2019/098919A1
A method performed by a first communication device (101) is disclosed herein. The first communication device (101) operates in a communications network (100). The first communication device (101) selects (603) a first method to decode a ...  
WO/2019/097682A1
A power supply device (10), provided with: a battery (12); a capacitor (22) connected in parallel to a load (14); and a main switching unit (24) capable of switching between a state of connection and a state of disconnection between the ...  
WO/2019/098677A1
A physical broadcast channel (PBCH) is encoded on the basis of a polar code and transmitted in a wireless communication system. Half-frame information within the PBCH is mapped to bit position 247 among bit positions of the polar code, a...  
WO/2019/097870A1
The present invention is provided with: a differential amplifier (11) for amplifying an inputted differential signal; a bias voltage generating circuit (14) which uses, as a bias voltage, the voltage of a common mode component included i...  
WO/2019/096184A1
A method for decoding a staircase code, comprising: performing soft information updating on S initial encoding blocks in a staircase code, and updating the last S-T encoding blocks of the obtained first information blocks and T newly add...  
WO/2019/097774A1
The purpose of the present invention is to make the frequency characteristics of a bandpass filter approach desired frequency characteristics. A first LC parallel resonator (11) is electrically connected to a first terminal (P10) at a fi...  
WO/2019/099318A1
Systems, procedures, and instrumentalities are disclosed for transmissions with polar codes. A transmitting entity may determine a mother code length. The mother code length may be based on value(s), e.g., a maximum number of transmissio...  
WO/2019/098981A1
The present invention discloses an event-triggered self-determining successive approximation register logic circuit (1) for controlling differential capacitive digital-to-analog converters found in analog-to- digital converters. In other...  
WO/2019/096015A1
SAW devices (100) and methods of fabricating SAW devices (100) are disclosed. The disclosed SAW device (100) includes a piezoelectric layer (204). The SAW device (100) also includes at least one transducer (104,106) coupled to the piezoe...  
WO/2019/098145A1
An amplification circuit (1) comprises: a first terminal (11) and a second terminal (12); an amplifier (30) provided on a first path (21) connecting the first terminal (11) and the second terminal (12); a first switch circuit (41) provid...  
WO/2019/099142A1
Certain aspects of the present disclosure provide methods and apparatus for amplifying signals with an amplification circuit. The amplification circuit generally includes a first transistor, an input path coupled between an input node of...  
WO/2019/099930A1
Systems and methods according to one or more embodiments are provided for sensing a current at an output of a switching amplifier. In one example, a system includes a first transistor switch coupled to a load configured to conduct a curr...  
WO/2019/099901A1
Methods, systems, and devices that support an efficient sequence-based polar code description are described. In some cases, a wireless device (e.g., a user equipment (UE) or a base station) may transmit a codeword including a set of info...  
WO/2019/096837A1
A computer-implemented method of performing format-preserving encryption of a data object of variable size utilizing an inner encryption algorithm which is capable of taking a variable size input and of outputting, as its output, an encr...  
WO/2019/099604A1
An apparatus includes an amplifier, an input port, a first modulator circuit connected to the input port, and a correction circuit. The correction circuit is configured to determine a common mode voltage of the input port and receive a f...  
WO/2019/097769A1
This solid microparticle mass measurement device includes: a solid microparticle adherence region (109) which is disposed at a surface elastic wave propagation region (105) and to which solid microparticles are caused to adhere; and a so...  
WO/2019/095640A1
A piezoelectric resonator and a manufacturing method of a piezoelectric resonator. The piezoelectric resonator comprises: a base, a recess being formed at an upper surface of the base; a first piezoelectric layer covering the upper surfa...  
WO/2019/099043A1
A method includes receiving compressed data representing a page of a document that is associated with a plurality of cell lines. A given cell line of the plurality of cell lines includes a given cell, and the given cell is associated wit...  
WO/2019/095853A1
Methods, systems, and devices for wireless communications are described. In some systems, wireless devices may encode and decode transmissions using polar codes. A transmitting device may encode a payload based on a selected payload size...  
WO/2019/098779A1
The present invention relates to an audio system and a method for controlling the same. The purpose of the present invention is to provide optimal listening conditions according to the user volume settings and hardware characteristics of...  
WO/2019/096772A1
A phase-locked loop circuitry (200) having low variation transconductance design comprises a voltage controlled oscillator structure (308) to provide an output signal (Fosc) having an oscillation frequency. The voltage controlled oscilla...  
WO/2019/097513A1
An analog to digital converter comprises an input for receiving an analog input signal; a plurality of outputs for outputting parallel bits of a digital signal that represents said analog input signal; and a neural network layer providin...  
WO/2019/097609A1
The present invention is configured so as to be provided with a compensation circuit (9): the first end of which is connected to the second end of a first output circuit (7) and the second end of a second output circuit (8); the second e...  
WO/2019/096168A1
Certain aspects of the present disclosure generally relate to wireless communications and, more particularly, to methods and apparatus for segmenting uplink control information prior for encoding using a polar code prior to transmission....  
WO/2019/097532A2  
WO/2019/098239A1
Provided is a digital/analog converter which improves DAC performance while giving consideration to switch on-resistance. This digital/analog converter (100) is equipped with: a first partial circuit (10) having a first resistor row (13)...  
WO/2019/096661A1
The invention relates to a circuit assembly for monitoring a sinusoidal alternating voltage signal (l_k) having a comparator (8), to which a sinusoidal alternating voltage signal (l_k) to be monitored or a signal obtained therefrom may b...  
WO/2019/093165A1
An extremum calculation unit (11) detects a maximum sample and a minimum sample in a digital audio signal. A sample number detection unit (12) detects a sample interval between the maximum sample and the minimum sample. A difference calc...  
WO/2019/093312A1
A measurement unit (3) generates, at every period of a reference clock, a period measured value representing the period of the reference clock as a number of passage stages, which is the number of stages at which a circulating signal pas...  
WO/2019/094957A1
The various embodiments described herein include methods, devices, and systems for fabricating and operating superconducting circuits. In one aspect, an electric circuit includes: (1) a first superconducting component having a first term...  
WO/2019/091110A1
The present disclosure relates to a receiver and to a method implemented in the receiver for recovering a signal clock from a received data signal. Successive edge transitions between successive data samples of the received data signal a...  
WO/2019/094160A1
Large fan-in logical gate circuits (100) for use in reciprocal quantum logic, RQL, systems and related methods permit for improved efficiency and density of RQL logic. A majority 3-of-5 gate circuit, as described, can be extended to incl...  
WO/2019/092055A1
The present invention relates to a method for coding at least one texture of an object in the form of a code, each texture being formed by a plurality of points each having a colour described by colourimetric data, the method comprising ...  

Matches 101 - 150 out of 557,771