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Matches 251 - 300 out of 555,660

Document Document Title
WO/2019/000426A1
A power amplifier circuit for a time division duplex mode. The power amplifier circuit comprises a power amplifier bias circuit (1) and a time division duplex switching circuit (2); the power amplifier bias circuit (1) is used for genera...  
WO/2019/003228A1
An analog signal processing circuit comprising: a first promoter operably linked to a nucleic acid sequence encoding a first output molecule, wherein said promoter is responsive to a cooperative input signal comprising at least two coope...  
WO/2019/003047A1
Provided is a semiconductor device enabling high integration. Specifically provided is a semiconductor device which has a transistor, an interlayer film, and a first conductor, and in which: the transistor is provided with an oxide upon ...  
WO/2019/004425A1
Provided is a piezoelectric substrate which comprises lithium-containing metal compound crystals such as lithium tantalate (LT) crystals, the piezoelectric substrate containing potassium therein, and having a substantially homogeneous po...  
WO/2019/001482A1
A processor of an apparatus establishes a wireless communication link with at least one other apparatus via a transceiver of the apparatus. The processor wirelessly communicates with the other apparatus via the wireless communication lin...  
WO/2019/000992A1
Provided in the present invention is a segmented automatic gain circuit applicable in an optical communication transimpedance amplifier, comprising: a transimpedance amplifier, an output end thereof being connected to a negative electrod...  
WO/2019/006138A1
A gate control circuit (300 A) for a tri state output buffer operating in a first voltage domain includes a pull-up circuit (304 A) coupled between an upper rail (VCCB) and a first gate control signal (Vp), a pull-down circuit (306 A) co...  
WO/2019/003888A1
The present disclosure relates to an information processing device and method which allow an increase in circuit scale to be suppressed. Multiple pieces of information to be used for decoding are stored in mutually different regions of a...  
WO/2019/000196A1
The embodiments of the present application provide a tail-biting convolutional code encoding method, device and system, relating to the field of communications. Regardless of the length of an inputted information bit stream, the inventio...  
WO/2019/001926A1
The present invention relates to a pre-driver, comprising: a first field effect transistor (Mpu), with a source thereof being connected to a power supply input pin (VPR) of the pre-driver; a second field effect transistor (Mpd), with a d...  
WO/2019/001697A1
The present invention relates to a multi-antenna receiver (400B) within an uplink MIMO communication system (400), which comprises at least one RRU (400B-RRU) and at least one BBU (400B-BBU) communicating between themselves through a fro...  
WO/2019/003619A1
A filter (10), provided with: a serial arm circuit (11); a parallel arm circuit (21) connected to a node (x1) and ground; and a parallel arm circuit (22) connected to a node (x2) and ground. The parallel arm circuit (21) has a parallel a...  
WO/2019/005101A1
Methods and architectures for closed loop digital pre-distortion (DPD) in a multi-stream phased array communication system include sampling outputs, from transmit antennas or dedicated analog detectors, of a plurality of RF power amplifi...  
WO/2019/003723A1
The purpose of the present invention is to adjust the frequency of an attenuation pole while maintaining the pass band of a laminated balun. The laminated balun (100) according to the present invention is provided with a first terminal (...  
WO/2019/006135A1
An output buffer (100) is coupled to receive an input voltage that can span a wide voltage supply range. The output buffer (100) includes a first metal oxide silicon (MOS) transistor (MPs1) having a first conductivity type and a first th...  
WO/2019/001477A1
The present application discloses an encoding method, a device, a communication device and a communication system. The method comprises: encoding an input bit sequence using a low density parity check (LDPC) matrix, wherein the LDPC matr...  
WO/2019/002284A1
According to some embodiments, a method for use in a wireless transmitter of a wireless communication network comprises encoding information bits using a parity check matrix (PCM) and transmitting the encoded information bits to a wirele...  
WO/2019/001046A1
Disclosed in the present application are an encoding method and apparatus, a communication device and a communication system. The method comprises: using a low density parity check (LDPC) matrix to encode an input bit sequence; the LDPC ...  
WO/2019/001925A1
The present invention provides a high-side gate driver, comprising: first and second current mirrors (Ip1, In1), a first N-channel transistor (Mn1), first and second switch circuits (Mp1, Mn2), first and second first-type diodes (d1, d2)...  
WO/2019/004581A1
A method for performing encoding on the basis of a parity check matrix of a LDPC code, according to one embodiment of the present invention, comprises the steps of: generating, by a terminal, a parity check matrix, wherein the parity che...  
WO/2019/003588A1
A noise cancel circuit (110) includes: a first parallel/serial conversion circuit (21) for converting input 2N-bit parallel data into serial data; an inversion circuit (20) for inverting one of odd-numbered bits and even-numbered bits of...  
WO/2019/003375A1
The purpose of the present invention is to provide a wireless transmitting device, a wireless receiving device, a wireless transmitting method, and a wireless receiving method, whereby encryption and decryption are carried out with highe...  
WO/2019/004204A1
A terahertz element provided according to one aspect of the present disclosure comprises: a semiconductor substrate; a first conductive layer; a second conductive layer; and an active element. The first conductive layer and the second co...  
WO/2019/005875A1
A gear-shifting serializer-deserializer (SerDes) is provided that uses a first divisor value to form a divided clock while de-serializing a serial data stream prior to a lock detection and that uses a second divisor value to form the div...  
WO/2019/004858A1
´╗┐The invention relates to a method for compressing data D (nT) (65) that represent a time-dependent signal A(t) (45). The time-dependent signal A(t) (45) comprises a multiplicity of time-dependent signal elements Ai(t) (where i=1,..., ...  
WO/2019/006145A1
A level shifter (400) is coupled to receive first and second input control signals (S1, S2) and to provide an output control signal (S3T). The level shifter (400) includes a level-shifting circuit (402) that has a first and a second PMOS...  
WO/2019/000666A1
A transient voltage suppressor (100), comprising: a transient voltage suppressor body (110); and a compensating element (120), connected to the transient voltage suppressor body (110), for compensating for capacitive impedance generated ...  
WO/2019/000075A1
Ultra-Wideband (UWB) technology exploits modulated coded impulses over a wide frequency spectrum with very low power over a short distance for digital data transmission. Such UWB systems through their receivers may operate in the presenc...  
WO/2019/005807A1
Certain aspects of the present disclosure provide techniques for an improved encoder for reducing repetition in polar codewords. An apparatus for wireless communication is provided. The apparatus includes at least one processor. The at l...  
WO/2019/001159A1
An encoding method and apparatus, and a computer storage medium, wherein same are used to improve the LDPC encoding performance, and are thus suitable for 5G systems. The encoding method comprises: determining a base graph of a low densi...  
WO/2019/001090A1
Disclosed in the present application are an encoding method and apparatus, a communication device and a communication system. The method comprises: using a low density parity check (LDPC) matrix to encode an input bit sequence; the LDPC ...  
WO/2018/235050A1
Methods (100, 200, 300, 400) and apparatus (500, 900, 1000) for training a Neural Network to recover a codeword and for decoding a received signal using a Neural Network are disclosed. According to examples of the disclosed methods, a sy...  
WO/2018/234613A1
It is an objective to provide timing event detection. According to a first aspect, a device, comprises: a clocked conditional buffer configured to set an output of the clocked conditional buffer to a first state during a non-detection pe...  
WO/2018/234365A1
A motor vehicle operating device (10) is described, with an at least partially electrically conductive operating element (16) having an operating surface (20), and a printed circuit board (43) which is assigned to the operating unit (16)...  
WO/2018/235875A1
An elastic wave device (1) comprising: a functional electrode (21) provided upon a first main surface (10a) of an element substrate (10); lead-out wires (221b, 222b) electrically connected to the functional electrode (21) and being adjac...  
WO/2018/235997A1
According to the present invention, in order to reduce power consumption and a chip area by replacing, with a switched-capacitor, a D/A converter including a capacitor array provided according to the resolution of an A/D converter, the D...  
WO/2018/233788A1
An audio codec suitable for robust wireless transmission of high quality audio with low latency, still at a moderate bit rate. The encoding and decoding methods are based on ADPCM and in addition to the encoded output bits APM, additiona...  
WO/2018/233414A1
The present application discloses a polar code encoding method and device for optimizing a solution for determining a position of a check bit and enhancing the overall performance of a polar code. The method comprises: determining inform...  
WO/2018/236883A1
A parallel Marx generator topology capable of producing high power, high current output pulses is provided. The parallel Marx generator topology can include a plurality of Marx generators that operate in parallel to one another to jointl...  
WO/2018/236771A1
Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices (T1, T2) using only low voltage transistors (inside 410) are described. The apparatus (410) and method are adapted to control multiple high...  
WO/2018/235410A1
The present invention suppresses a reduction in current detection accuracy caused by a temperature difference between an output MOS transistor and a sense MOS transistor and relaxes an arrangement limitation on the sense MOS transistor. ...  
WO/2018/235689A1
Provided is an acoustic wave filter device which is capable of improving the attenuation characteristics in a specific frequency band in an attenuation band outside the passband. An acoustic wave filter device 1 according to the present ...  
WO/2018/235396A1
In the present invention, an interleaver 104 interleaves the first through Nth codewords, an OFDM modulation circuit 105 converts the interleaved first through Nth codewords into OFDM signals, and a transmission RF circuit 106 transmits ...  
WO/2018/236682A1
A semiconductor device includes a plurality of unit cell transistors on a common semiconductor structure, the unit cell transistors electrically connected in parallel, and each unit cell transistor including a respective gate finger. Res...  
WO/2018/236605A1
A bulk acoustic wave (BAW) filter (130) for passing through electric signals in a preset frequency range is provided. The BAW filter (130) includes: a diamond substrate (114); a passivation layer (111) formed on the diamond substrate (11...  
WO/2018/235339A1
Provided is a simpler and more highly accurate frequency adjustment method. Disclosed is a method for manufacturing a resonance device that is provided with a resonator having a vibrating section that vibrates in accordance with a voltag...  
WO/2018/234052A1
Embodiments of the invention provide an Extended Min-Sum (EMS) decoder for non-binary LDPC codes comprising at least one check node processing unit configured to receive at least three variable node messages from one or more variable nod...  
WO/2018/234746A1
An audio system receives an input signal and, if the input signal has a sparse representation in the frequency domain, comprising components at at least one frequency of interest, the input signal is filtered in at least one band pass fi...  
WO/2018/236541A1
A frequency selective limiter (FSL) is provided having a transmission line structure with a tapered width. The FSL includes a substrate having a magnetic material, a signal (or center) conductor disposed on the substrate and first and se...  
WO/2018/236087A1
The present invention relates to a power supply device. The power supply device, according to the present invention, comprises: an inverter for converting a direct current power into an alternating current power; an impedance matching ci...  

Matches 251 - 300 out of 555,660