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Matches 251 - 300 out of 550,216

Document Document Title
WO/2018/045770A1
A control circuit (100, 400, 903), a control method, and an electronic device (900). The control circuit (100, 400, 903) comprises: a first control sub-circuit (101,401), which is configured to receive a first power signal (VDD1) from a ...  
WO/2018/047213A1
We introduce a single-ended amplifying circuit with gain continuously adjustable between positive and negative values. It can be implemented with 4 standard transistors or with 2-conduction-mechanism devices. We achieved a 3-fold reducti...  
WO/2018/049164A1
Computing devices and techniques for providing link partner health reporting are described. In one embodiment, for example, an apparatus may include at least one memory, and logic, at least a portion of the logic comprised in hardware co...  
WO/2018/048962A1
An example apparatus includes a differential amplifier (202) to compare a first voltage (104) to a droop voltage (108). The first voltage (104) corresponds to a sum of inductor currents in a multi -phase voltage regulator. The droop volt...  
WO/2018/048506A1
An apparatus is provided which comprises a clock inverter having an input coupled to a clock node, the clock inverter having an output, wherein the clock inverter has an N-well which is coupled to a first power supply; and a plurality of...  
WO/2018/047791A1
Provided is an input device, comprising: an electrode sheet (60) in which the capacitance of a position changes, said position being a position with which an object has moved into proximity, from among a prescribed plurality of positions...  
WO/2018/045788A1
Bits in a received word that is based on a codeword of a polar code are decoded to generate decoded bits. A lower-order partial sum is updated based on the decoded bits, and a higher-order partial sum based on the lower-order partial sum...  
WO/2018/047124A1
A circuit structure and a method for supressing single event transients (SETs) or glitches in digital electronic circuits are provided. The circuit includes a first input which receives an output of a digital electronic circuit and a sec...  
WO/2018/047488A1
The present invention suppresses a reduction in a Q-value while ensuring a shield effect. An electronic component (1) according to an embodiment has a laminate of a plurality of dielectric layers (Lyr1 to Lyr14). The electronic component...  
WO/2018/047553A1
To provide a control device which can detect an abnormality with certainty by distinguishing between abnormalities including a short circuit of a battery and a broken connection in a load. An electronic control device which, by switching...  
WO/2018/048527A1
Providing efficient lossless compression for small data blocks in processor-based systems is provided. In one aspect, a method comprises receiving a plurality of input words. Each mask of a plurality of masks is applied to each unassigne...  
WO/2018/048572A1
Adaptive pulse generation circuits for clocking pulse latches with minimum hold time are provided. In one aspect, an adaptive pulse generation circuit employs a dynamic XOR-based logic gate configured to provide a pulse generation signal...  
WO/2018/047986A1
The present invention relates to an IR receiver and, more particularly, to an improved IR receiver structure which efficiently controls a voltage gain by means of an appropriately varying control signal, and thus can stably receive and u...  
WO/2018/046164A1
The invention relates to a method for controlling an operating and display device (3), wherein a functionality linked to the operating and display device (3) is controlled in accordance with a sensed force applied to a display surface (4...  
WO/2018/046216A1
The invention relates to an optocoupler (13) having a transmitter (21) and a receiver (22), which according to the invention are accommodated on a circuit carrier (20). On the circuit carrier there is also a light guide element (24) in t...  
WO/2018/048720A1
Circuits and methods for determining a majority vote from a plurality of inputs. An example circuit includes a voting input stage, a transfer stage, and an accumulating stage. The voting input stage includes at least three input switched...  
WO/2018/044799A1
Binary-weighted attenuator having compensation circuit. In some embodiments, a radio-frequency (RF) attenuator circuit can include a plurality of attenuation blocks arranged in series between an input node and an output node, with each o...  
WO/2018/045002A1
Described herein are variable gain amplifiers and multiplexers that embed programmable attenuators into switchable paths that allow signals in a high gain mode to bypass attenuation. This advantageously reduces or eliminates performance ...  
WO/2018/044432A1
Pulse generation circuitry includes edge generation circuitry and edge combination circuitry. The edge generation circuitry includes a first digital-to-time converter (DTC) configured to input a first phase signal that includes a first p...  
WO/2018/044542A1
A filter component (1) for the suppression of parasitic passbands is described which has a substrate (4), at least one parallel resonator (3) in each case designed as a volume wave resonator, a plurality of reflector layers (5, 6), where...  
WO/2018/042873A1
Provided is a driving circuit that turns on/off an insulated-gate type semiconductor element by controlling an output current to be supplied to the gate of the insulated-gate type semiconductor element in accordance with a control signal...  
WO/2018/043039A1
Provided is a switching circuit that is constituted by a driving power supply (1), a driving circuit (3), a first transistor (4), and a second transistor (5), wherein the first and second transistors (4) and (5) respectively have gate te...  
WO/2018/042699A1
This optical transmission/reception device is provided with an error correction decoding unit 36 for decoding reception sequences encoded using a low-density parity-check (LDPC) code. The error correction decoding unit 36 executes decodi...  
WO/2018/043141A1
This technology relates to an image sensor and an electronic device that enable suppression of power consumption. A reference signal output unit that outputs a reference signal the level of which changes comprises: a plurality of DACs ea...  
WO/2018/042233A1
In this invention we provide application level compression. Compression and decompression capabilities are provided to client side application code and server side application code as a separate library. Both client side application code...  
WO/2018/044717A1
A transistor circuit includes a transistor having a gate terminal and first and second conduction terminals, a first circuit configured to convert an AC input signal of the transistor circuit to a gate bias voltage and to apply the gate ...  
WO/2018/043496A1
Provided is an elastic wave device that can easily perform frequency adjustment of a plurality of band-pass-type filers configured on the same piezoelectric substrate. An elastic wave device 1 is provided with: a first band-pass-type fil...  
WO/2018/044793A1
Low-noise amplifier having programmable-phase gain stage. In some embodiments, a radio-frequency amplifier can include an input node, an output node, and a programmable-phase gain stage implemented between the input node and the output n...  
WO/2018/043606A1
A filter (10) has a serial arm resonator (s1) connected to a path connecting an input-output terminal (11m) and an input-output terminal (11n), and has a parallel arm resonator (p1) and a parallel arm resonator (p2) that are connected be...  
WO/2018/040824A1
A data encoding method, data decoding method, data encoding device, data codec device, and data storage medium. The encoding method comprises: receiving data to be encoded and from 4 QSGMII interfaces (S101); determining disparities of t...  
WO/2018/042231A1
A digital-to-analog converter circuit is provided. The digital-to-analog converter circuit includes one or more digital-to-analog converter cells. A first digital-to-analog converter cell includes a first transistor which is configured t...  
WO/2018/044798A1
Attenuators having phase shift and gain compensation circuits. In some embodiments, a radio-frequency (RF) attenuator circuit can include one or more attenuation blocks arranged in series between an input node and an output node, with ea...  
WO/2018/042994A1
[Problem] To provide more reliable quartz oscillation plate and quartz oscillation device which have enhanced impact resistance and in which deterioration of electric characteristics is suppressed. [Solution] An AT-cut quartz oscillation...  
WO/2018/043084A1
A piezoelectric oscillator (1) is provided with: a piezoelectric oscillation element (100), a substrate (300) having opposing first and second main surfaces (302, 304), and electroconductive holding members (340, 342) for holding the pie...  
WO/2018/042618A1
The invention is configured so as to comprise an image projector (1) that displays an elevator operating panel (10), an operation detector (2) that detects an operator operating the operating panel (10) displayed by the image projector (...  
WO/2018/040160A1
Provided are a mismatch compensation method and a mismatch compensation device for a radio frequency transmission line, wherein the mismatch compensation method for a radio frequency transmission line comprises: extracting a scattering p...  
WO/2018/040822A1
Provided are a polar code encoding method and apparatus. The method comprises: according to a target code length corresponding to an information bit sequence, determining a first mother code length corresponding to the information bit se...  
WO/2018/042288A1
The transmission delay time of a receiver for receiving a differential signal is reduced. A first amplifier circuit is provided in an input stage of the receiver, and a second amplifier circuit is provided in an output stage of the recei...  
WO/2018/044563A1
One example includes an isochronous receiver system. The system includes a single flux quantum (SFQ) receiver configured to receive a data signal from a transmission line and to convert the data signal to an SFQ signal. The system also i...  
WO/2018/044801A1
Embodiments of source separation for reverberant environment are disclosed. According to a method, first microphone signals for each individual one of at least one source are captured respectively by at least two microphones for a period...  
WO/2018/042247A1
A transformer-based balun circuit is disclosed herein. The balun can be implemented using a spiral transformer (204), where primary transformer windings (206) and secondary transformer windings (208) can be inductively coupled and can be...  
WO/2018/044562A2
One embodiment includes a superconducting gate memory circuit. The circuit includes a Josephson D-gate circuit configured to set a digital state as one of a first data state and a second data state in response to a write enable single fl...  
WO/2018/041867A1
The invention relates to a driver circuit (1) for at least two light-emitting optoelectronic components (2, 3, 4, 5), having a first voltage connection point (21), wherein the first voltage connection point (21) is connected to a first e...  
WO/2018/044472A1
A power amplifier circuit, including: an input node configured to receive a radio frequency (RF) signal; an output node configured to output an amplified RF signal; a main path switchably coupled between the input node and the output nod...  
WO/2018/040049A1
Disclosed are a signal transmission circuit and a communication device, wherein the signal transmission circuit comprises a first FPGA unit, a second FPGA unit, a first CPU unit and a second CPU unit. The first FPGA unit comprises a firs...  
WO/2018/043607A1
A filter (10) has a serial arm resonator (s1) connected to a path connecting an input-output terminal (11m) and an input-output terminal (11n), and has parallel arm resonators (p1, p2) that are connected between the same node (x1) on sai...  
WO/2018/044725A1
A transition glitch suppression circuit (400) can be used to remove unwanted glitches occurring within a time delay of the rising edge or falling edge of a signal (402). The transition glitch suppression circuit has a delay element (404)...  
WO/2018/041831A1
The invention relates to a power electronics circuit having at least one load connection (LA) and at least one current-critical semiconductor power component (N). The power electronics circuit has one or more IGBT power components, and a...  
WO/2018/044562A3
One embodiment includes a superconducting gate memory circuit. The circuit includes a Josephson D-gate circuit configured to set a digital state as one of a first data state and a second data state in response to a write enable single fl...  
WO/2018/045223A1
In described examples, an apparatus (200) includes: a capacitor (230) having a first terminal coupled to receive a current and having a second terminal coupled to a ground; a first comparator (240) coupled to a voltage at the first termi...  

Matches 251 - 300 out of 550,216