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Patent Searching and Data


Matches 351 - 400 out of 557,771

Document Document Title
WO/2019/072593A1
The invention relates to a circuit arrangement comprising a microcontroller (MC'), which has a first analog-digital converter (ADC1), the input of which is connected to the output of a first multiplexer (MUX1) having n inputs, and the ou...  
WO/2019/071371A1
An analog-to-digital signal conversion system (300) and method. The system (300) comprises a digital signal splitting unit (401), a first digital signal storage unit (411), a second digital signal storage unit (421), a first storage capa...  
WO/2019/075175A1
A computer-implemented method for content-agnostic referencing of a binary data file, the method comprising: determining a length of the binary data file, the length comprising the number of bits of the binary data file; for the determin...  
WO/2019/074727A1
An example digital-to-time converter (DTC) (102) includes: a delay chain circuit (301) having a plurality of delay cells (302) coupled in sequence, the delay chain circuit including a first input (Fref) to receive a first clock signal an...  
WO/2019/070725A1
Methods, systems, and computer program products of automatic de-essing are disclosed. An automatic de-esser can be used without manually setting parameters and can perform reliable sibilance detection and reduction regardless of absolute...  
WO/2019/069048A1
A method of reconfiguration and a reconfigurable circuit architecture comprising a configurable volatile storage circuit and Non-Volatile Memory circuit elements; wherein the Non-Volatile memory circuit elements store multiple bit states...  
WO/2019/070673A1
A radiofrequency (RF) filter includes an inductive element having multiple coil sections collectively forming an undivided coil of a cable of twisted magnetic wires. At least two adjacent coil sections have different turn pitches. The ca...  
WO/2019/071005A1
The various embodiments described herein include methods, devices, and systems for implementing logic gates. In one aspect, a circuit includes: (1) a superconducting component having a plurality of alternating narrow and wide portions; (...  
WO/2019/070321A1
The present disclosure provides systems and methods to dynamically extend loudspeaker capabilities. In particular, a system comprising a loudspeaker can receive an electronic audio signal. Responsive to a change in available headroom, on...  
WO/2019/070415A1
Methods, systems, and devices for multiple concurrent modulation schemes in a memory system are described. Techniques are provided herein to communicate data using a modulation scheme having at least three levels and using a modulation s...  
WO/2019/070029A1
The present disclosure pertains to A/D converter circuits (50, 50A) that convert analog information to numeric data, the circuits being provided with a pulse delay circuit (10), and output units (20, 30, 40). A sampling cycle is set such...  
WO/2019/069439A1
An acoustic signal processing device (1) is provided with: a difference detection circuit (321); a gain switching circuit (311); a difference gain value changing circuit (324); and a gain control circuit (323). The difference detection c...  
WO/2019/070345A1
A general-purpose lossless data compressor that uses a recurrent neural network probability estimator to generate probability estimates for symbols of a binarized format of an original content item to be losslessly compressed. The probab...  
WO/2019/070935A2
Approaches useful to operation of scalable processors with ever larger numbers of logic devices (e.g., qubits) advantageously take advantage of QFPs, for example to implement shift registers, multiplexers (i.e., MUXs), de-multiplexers (i...  
WO/2019/070694A1
A packaged transistor amplifier includes a package having an input lead and an output lead; a transistor stage having a plurality of unit cell transistors that are electrically coupled to the input lead in parallel, each of the unit cell...  
WO/2019/068465A1
The invention relates to a method for monitoring a sensor clock signal (STS) in a sensor unit (10), which is generated and output for a data transfer between the sensor unit (10) and a control unit with a predefined period duration, wher...  
WO/2019/069692A1
The present disclosure pertains to a signal processing device, a signal processing method, and a program capable of predicting failure in acoustic reproduction using a digital amplifier and preventing the failure on the basis of the pred...  
WO/2019/070196A1
Various embodiments may relate to a clocking circuit arrangement. The clocking circuit arrangement may include a clock source, as well as a global monitoring circuit arrangement including a monitoring tunable clock buffer, a reference cl...  
WO/2019/069051A1
Pulse Width Modulation This application relates to digital PWM modulation. A PWM modulator (400, 1100) has a PWM generator (402) configured to receive pulse width data (P Width ) and to output a PWM signal (S PWM ) comprising a plurality...  
WO/2019/068932A1
The present application relates to electronics and in particular to switch drive circuits and more particularly to galvanically isolated switch circuits with power transfer from the switch driver input side to the switch side. More speci...  
WO/2019/068769A1
An arrangement (10) is disclosed, comprising at least one switching element (50) including a terminal (53), a switching element terminal sourcing and/or sinking circuit (95) connected to the at least one switching element and arranged fo...  
WO/2019/070315A1
A calibration system is provided for an oven controlled MEMS oscillator. The calibration system includes control circuitry that to separately selects predetermined target set-point values and controls a heater inside the oven controlled ...  
WO/2019/071068A1
An integrated circuit package includes a first die (1230) that has a microelectromechanical system (MEMS) resonator coupled to a first coil (1240). A second die (1231) includes a second coil (1241) fabricated on a top surface of the seco...  
WO/2019/070328A1
The various implementations described herein include methods, devices, and systems for automatic audio equalization, in one aspect, a method is performed at a computing system that includes speaker(s), microphones, processors and memory....  
WO/2019/069056A1
The present techniques disclose a logic gate for an adaptive voltage scaling monitor, the logic gate comprising an inverting output and further comprising an imbalance between the drive strength of an NMOS component and a PMOS component ...  
WO/2019/068740A1
The present invention relates to a radiofrequency oscillator (10) comprising an optical resonator (18) that is a ring waveguide allowing a first wave to propagate in a first direction and a second wave to propagate in a second direction,...  
WO/2019/071066A1
An oscillator circuit (501) has tank circuit terminals for coupling to a tank circuit. A microelectromechanical system (MEMS) resonator (100) serves as a tank circuit. The MEMS resonator (100) is coupled to the oscillator circuit (501) u...  
WO/2019/070768A1
A digital phase shifter is described where each bit of the phase shifter has a circuit block including one PIN diode in parallel with one transmission line. The phase shifter requires only one PIN diode and one transmission line per bit ...  
WO/2019/069711A1
This disclosure relates to an information processing device and method that enable partial control of the resolution of a data set which can be made into a tree structure. Octree pattern data, which is data in an Octree pattern, is encod...  
WO/2019/070144A1
A device for generating a Fermi-Pasta-Ulam (FPU) spectrum comprises a resonator for creating an electromagnetic FPU spectrum (an FPU resonator), said resonator comprising a two-arm generator for generating oscillations, each arm of which...  
WO/2019/069261A1
Systems and methods are described herein that allow information carrying bits of a transmission block to be placed at higher-reliability positions prior to transmission. An exemplary method includes generating a set of payload bits to be...  
WO/2019/068555A1
The invention relates to an operating element (1) having a support (20) and an actuation part (10) which is movably mounted in the direction of the support (20) under the effect of an actuation force and which comprises a touch-sensitive...  
WO/2019/069647A1
In the present invention, among body diodes (DH, DL) of upper and lower arm switches (SWH, SWL), the diode to which reflux current flows during dead-time is defined as the target diode, the switch having this target diode among the upper...  
WO/2019/068656A1
Semiconductor assemblies and apparatus are described. In one example, a semiconductor assembly comprises a first power terminal; a second power terminal; a state change trigger terminal; and a semiconductor device comprising a first term...  
WO/2019/069375A1
The present invention is a switching element driving circuit (8) provided with: a determination power supply unit (3) that turns on a connected switching element (2) the drive type of which is unknown, by applying voltage of a set voltag...  
WO/2019/070352A1
A radio frequency integrated circuit (RFIC) is described. The RFIC includes a switch field effect transistor (FET), including a source region, a drain region, a body region, and a gate. The RFIC also includes a body bypass resistor (Rb) ...  
WO/2019/068540A1
According to an embodiment, a device comprises: a piezoelectric element configured to convert an electrical voltage into a mechanical strain; and a conductive base plate onto which the piezoelectric element is fastened, wherein the condu...  
WO/2019/068944A1
The present invention belongs to the technical field of simulators for teaching or training, more specifically those specially designed for teaching the driving of vehicles or other means of transport, and concerns, in particular, a comp...  
WO/2019/069115A1
Apparatus and methods for a multiclass, broadband, no-load-modulation power amplifier are described. The power amplifier (500) may include a main amplifier (532) operating in a first amplification class and a plurality of peaking amplifi...  
WO/2019/070320A1
A method and system for data conversion includes an analog noise generator to generate a random, non-deterministic, analog noise signal. An adder adds the analog noise signal to an analog RF signal to produce a dithered analog signal. A ...  
WO/2019/068460A1
The invention relates to a method for correcting at least one transmission parameter for data transmission between a sensor unit (10) and a control unit, wherein a sensor timing signal (STS) is generated by a sensor oscillator (14) with ...  
WO/2019/063113A1
The present invention generally relates to superconducting devices, more specifically, to integrating Josephson amplifiers or josephson mixers into printed circuit boards. A printed circuit board includes one or more board layers. A firs...  
WO/2019/062224A1
A phase-locked loop locking detection method based on an MCU, and an MCU. The MCU comprises an analog to digital converter, a memory unit, and a data processing unit. The analog to digital converter is connected to the memory unit, and t...  
WO/2019/067363A1
Methods and apparatuses of a two-phase flip-flop with symmetrical rise and fall times are disclosed herein. An example apparatus may include a clock generator circuit including a two-phase flip-flop circuit configured to provide an outpu...  
WO/2019/066842A1
Methods, systems, and circuitries are provided to generate clock signals of different qualities in a device. A method includes determining whether the device is operating in a mid power mode or a high power mode. In response to determini...  
WO/2019/063308A1
The aim of the invention is to provide an improved cascode half-bridge comprising two cascodes. Therefore, a cascode half-bridge comprising a first cascode (K1), which has a first normally-on switching element (J1) in series with a norma...  
WO/2019/061875A1
A processing method for the abnormality of a clock input signal of a level converter, the processing method comprising: counting pulses of a first clock input signal to obtain a first serial number, and counting pulses of a second clock ...  
WO/2019/063117A1
Techniques facilitating reduction and/or mitigation of crosstalk in quantum bit gates of a quantum computing circuit are provided. A system can comprise a memory that stores computer executable components and a processor that executes th...  
WO/2019/065027A1
This hybrid filter device (1) is configured of: an acoustic wave device (AD) which comprises an acoustic wave resonator; and a passive device (PD) which comprises an inductor element, or an inductor element and a capacitor element. At le...  
WO/2019/063615A1
Methods, systems, and computer program products that infer and correct automatic gain compensation (AGC) values over time are described. A device emits a series of inaudible reference audio signals during recording. The reference audio s...  

Matches 351 - 400 out of 557,771