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WO/2012/058010 |
A lock signal indicating that a target signal is in phase with a reference signal includes detecting the reference signal at the rising and falling edges of the target signal. The target signal is detected on the rising and falling edges...
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WO/2012/047692 |
A differential input envelope detector receives an unamplified Near Field Communication (NFC) input signal from an NFC antenna and downconverts an NFC intelligence signal to baseband. In one example, the NFC input signal includes the NFC...
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WO/2012/045330 |
The present invention relates to a radio frequency mixer circuit comprising a first terminal (102), a local oscillator terminal (103) and a second terminal (104); a wave propagation medium (105) having a first (105a) and second end (105b...
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WO/2012/048036 |
A transceiver for multi-standard operation (usable, for example, to communicate signals both of a first wireless communication standard and of a second wireless communication standard) has a mixer that receives a local oscillator signal ...
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WO/2012/041915 |
A sampler circuit comprises a plurality of series-connected sampler cells and a detector circuit. Each successive stage comprises twice the number of sampler cells, in parallel, as the previous stage, and is clocked at half the sampling ...
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WO/2012/041916 |
A symmetrical, balanced, down-conversion mixer is achieved by the coordinated layout of a balanced Local Oscillator(LO) divider circuit and a balanced Radio Frequency (RF) mixer circuit, such that the LO divider is in the center and the ...
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WO/2012/044147 |
A quadrature mixer circuit with double balanced mixers. The quadrature mixer includes a first (130) and a second (140) double balanced mixer. The in-phase 1 branch (110) mixes 1, 1b components with the first complementary local oscillato...
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WO/2012/038338 |
A complex intermediate frequency mixer (IFM) for frequency translating a received complex intermediate frequency, IF, signal, wherein the received complex IF signal comprises at least two frequency bands located at upper-side and lower-s...
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WO/2012/037980 |
A six-port circuit (100) with two input ports and four output ports, comprising a balun (110) for converting signals at one input port into first (112) and second (113) balanced signals, and a filter (105), with first and second input po...
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WO/2012/038336 |
The invention relates to a complex intermediate frequency (CIF) mixer stage, methods of operation thereof, and methods of calibration thereof. The CIF mixer stage comprises numerous individual mixers driven by IF clock signals to down-co...
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WO/2012/036501 |
The present invention relates to a harmonic removing mixer device for removing harmonic components and an operation method thereof. Here, a harmonic removing mixer comprises: a local oscillator which generates a local oscillation (LO) si...
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WO/2012/032936 |
A signal processing circuit (150) comprises: a first multiplying means (100) that multiplies a first signal (IN), which includes a first frequency component, by a second signal (LO0) having a second frequency, thereby outputting a third ...
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WO/2012/030369 |
An adjustable impedance network has been coupled to isolation port (which has traditionally been terminated) to substantially increase the tuning range and expand bandwidth of a quadrature mixer within very high frequency ranges. A quadr...
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WO/2012/025409 |
The invention relates to a demodulator for an energy self-sufficient miniaturized microsystem, effectively consuming less energy in comparison to conventional solutions for demodulating an amplitude-modulated HF signal. To this end, an M...
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WO/2012/025140 |
A method (10) of measuring the phase of a clock signal, the method comprising: a) receiving a clock signal comprising clock cycles having a clock frequency and a clock period, TClock (12); b) providing a reference clock signal comprising...
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WO/2012/015509 |
A Gaussian Frequency Shift Key (GFSK) receiver includes a receiver front end to receive a GFSK-modulated signal and convert the received GFSK-modulated signal to a baseband frequency modulated signal, a channel filter to reduce channel i...
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WO/2012/014060 |
A system including a first frequency divider, a plurality of second frequency dividers, and a control module. The first frequency divider includes a first plurality of components and is configured to divide an input frequency of an input...
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WO/2012/014307 |
The disclosed signal generating circuit has: four-phase-signal generating circuits (20_0, 20_1) that generate four-phase signals having a first frequency; an eight-phase-signal generating circuit (20_2) that divides the four-phase signal...
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WO/2012/006899 |
A Low Noise block (LNB) down conversion chip circuit is disclosed. The solution performs a down conversion on a radio frequency signal utilizing a quadrature local oscillation signal and a quadrature mixer, and then performs a 90 degrees...
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WO/2012/002023 |
Disclosed is a frequency converter which is used in a receiver. The frequency converter comprises: an LO signal generator (11) which generates and outputs an LO signal; and a mixer (10) which outputs a frequency-converted signal obtained...
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WO/2012/002026 |
This invention is applied to a frequency converter for use in a receiver. The frequency converter comprises: an LO signal generator (11) that generates and outputs an LO signal; and a mixer (10) that multiplies a received signal, which h...
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WO/2011/157665 |
A conversion circuit (20) for converting a complex analog input signal having an in-phase, I, component and a quadrature-phase, Q, component resulting from frequency down conversion of a radio-frequency, RF, signal (XRF) to a frequency b...
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WO/2011/156607 |
Disclosed are circuits, techniques and methods for removing one or more harmonics from a waveform that has been mixed with a local oscillator. In one particular example, such a waveform may also be mixed with a second local oscillator at...
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WO/2011/141572 |
In radiofrequency technology, so-called subharmonic mixers are known for mixing a useful signal with a radiofrequency signal, with a local oscillator being used for said mixers, the local oscillator generating a local oscillator signal h...
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WO/2011/138697 |
Digital IQ imbalance compensation is utilized for a dual-carrier double conversion receiver. First, the effect of IQ imbalance on OFDM-based digital baseband is analyzed, showing that, in the presence of IQ imbalance, the baseband signal...
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WO/2011/136415 |
The present invention relates to a low-power, highly integrated ASK demodulator. The ASK demodulator according to one embodiment of the present invention comprises: a half wave rectifier for half-wave rectifying a received signal; an env...
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WO/2011/128881 |
A method and system for performing complex sampling of signals by using two or more sampling channels and for calculating time delays between these channels. According to certain embodiments of the presently disclosed subject matter, the...
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WO/2011/128881 |
A method and system for performing complex sampling of signals by using two or more sampling channels and for calculating time delays between these channels. According to certain embodiments of the presently disclosed subject matter, the...
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WO/2011/124533 |
A mixer with a calibration circuit. The mixer has a signal input port for a signal to be up- converted or down-converted; a local oscillator input port; and an output port. The mixer is for use in a transmitter or receiver in which the s...
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WO/2011/121663 |
The disclosed receiver device (1) is equipped with a rectifying unit (10) which is provided with rectifying elements (Q9 and Q10) for rectifying a received signal that has been input; bias supply units (Q1 to Q8, C1 to C4, 14, and 15) fo...
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WO/2011/116822 |
A phase detector (100, 400, 800) comprising a balun (150) and input ports (116) at each of the balun's balanced ports. The phase detector (100, 400, 800) has four devices (105, 115, 110, 155) for measuring a signal's amplitude: - a first...
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WO/2011/114393 |
An analog complex filter (101) synthesizes an in-phase signal (I0) and a quadrature signal (Q0) to output analog signals (I1, Q1). Analog/digital converters (102i, 102q) convert the analog signals (I1, Q1) to digital signals (I2, Q2). A ...
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WO/2011/109913 |
The invention relates to an apparatus (300; 400; 500; 600) for demodulating an input signal (306; 402; 520), comprising a frequency detector (302; 403; 502.1,..., 502. N; 603) for tracking a frequency (f2; fd1,..., fdN) of the input sign...
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WO/2011/106633 |
A wireless communications device, e.g., a mobile node supporting direct peer to peer communications, performs a self-calibration of one or more of: receiver IQ imbalance, transmitter IQ imbalance, receiver DC offset, and transmitter DC o...
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WO/2011/101289 |
A clock generator circuit generates a wanted RF clock signal by using an up-converter, a spurious tone cancellation circuit, a controller, and at least two clock driver/dividers. The spurious tone cancellation circuit includes a tone det...
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WO/2011/101305 |
In a method of frequency down-converting an input signal to an output signal, a first local oscillator signal is generated as a square wave having a duty cycle of 1/3 or 2/3, and the input signal is mixed with the first oscillator signal...
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WO/2011/103108 |
A spectral transform system includes a first path having a signal input, a signal output, and an adjustable first path signal scaling block. A second path is connected to the forward path between the signal input and the signal output. T...
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WO/2011/082481 |
Methods and systems for processing signals wherein a plurality of signals are received at the inputs of a plurality of transconductance circuits which convert the signals into their corresponding current signals. The current signals are ...
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WO/2011/084527 |
Techniques for decimating a first periodic signal to generate a second periodic signal. In an exemplary embodiment, the first periodic signal is divided by a configurable integer ratio divider, and the output of the divider is delayed by...
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WO/2011/084527 |
Techniques for decimating a first periodic signal to generate a second periodic signal. In an exemplary embodiment, the first periodic signal is divided by a configurable integer ratio divider, and the output of the divider is delayed by...
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WO/2011/081582 |
The present invention relates to an automatic gain control method and block 30 for controlling a signal level of a signal at a predetermined location in a signal path 17 of a receiver chain. The automatic gain controller 30 is comprising...
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WO/2011/081616 |
An apparatus for decoding digital data includes a processor to create a priori information for insertion to a maximum a posteriori (MAP) decoder. The processor detects locations of symbols in the input data stream and reads ROM data corr...
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WO/2011/081457 |
A magnetic field communication device of an online electric vehicle using electromagnetic induction of the present invention comprises: an electromagnetic induction device which is provided in the online electric vehicle, and performs el...
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WO/2011/070013 |
A mixer arrangement (1) for generating an analog output signal of the mixer arrangement (1) by mixing an analog input signal of the mixer arrangement (1) with a discrete-time mixing signal. The mixer arrangement comprises a plurality of ...
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WO/2011/069209 |
This invention concerns a sub-harmonic homodyne mixer suitable for operation at the millimetre waveband (MMW); for instance the 60 GHz RF radio band. The mixer comprises: A first pair of transistors connected together with common source ...
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WO/2011/069229 |
A virtual Weaver architecture filter is implemented using a sampling mixer that successively processes samples of the input signal in round-robin fashion and provides a sum of the samples as multiplied by coefficients emulating quadratur...
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WO/2011/071546 |
A multiphase clock generates pulses at a rate much higher than the clock frequency.
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WO/2011/070013 |
A mixer arrangement (1) for generating an analog output signal of the mixer arrangement (1) by mixing an analog input signal of the mixer arrangement (1) with a discrete-time mixing signal. The mixer arrangement comprises a plurality of ...
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WO/2011/062278 |
Disclosed is an electronic circuit, which is provided with a first hybrid circuit (10), and a second hybrid circuit (20). A first diode (D1) and a second diode (D2) are respectively connected to the first distribution terminal (T1) and t...
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WO/2011/061703 |
Method for distributing data signals within a building comprising the steps of : - receiving data signals, each transmitted on a carrier; frequency- converting the received data signals using a first plurality of oscillators with a first...
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