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Matches 1 - 50 out of 35,565

Document Document Title
WO/2018/013022A1
An amplifier circuit (200) for compensating an output signal (231) provided at an output (206) of the amplifier circuit (200) comprises a cascade of sub-amplifiers (2021-n). Each sub-amplifier of the cascade contributes to a respective p...  
WO/2018/013206A1
A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a "common source" configured input FET and ...  
WO/2018/006423A1
Provided is a digital pre-distortion processing device. The device comprises an analogue-to-digital conversion unit and n digital pre-distortion elements. The analogue-to-digital conversion unit is connected to the n digital pre-distorti...  
WO/2018/007752A1
The invention relates to a system for monitoring the peak power of a telecommunication signal to be transmitted for an RF power amplification (1) of said telecommunication signal to be transmitted, comprising a digital processing device ...  
WO/2018/006482A1
Disclosed are a 4.0-5.0 GHz 8W GaN monolithic power amplifier and a design method thereof. The amplifier comprises an input matching network, an interstage matching network, an output matching network, and a set of pHEMT transistors. The...  
WO/2018/007303A1
Linearizing Power Amplifiers' Outputs in Multi-Antenna System There is provided power efficient and simple structure for linearizing power amplifiers' outputs in multi-antenna beamforming systems. Beamforming factors are obtained for con...  
WO/2018/009314A1
A microwave amplifier having a field effect transistor formed on an upper surface of a substrate. A de-Q'ing section connected to the field effect transistor includes: a de-Q'ing resistive via that passes through the substrate; and a de-...  
WO/2018/006483A1
Disclosed are a 2.7-3.5 GHz 2W GaN monolithic power amplifier and a design method thereof. The amplifier comprises an input matching network, an interstage matching network, an output matching network, and a pHEMT transistor. The input m...  
WO/2018/004744A1
A method includes determining (701) one or more characteristics of a system (500) that uses a power amplifier (502). The method also includes determining (703), based on the one or more determined characteristics, a switching speed and a...  
WO/2018/004610A1
A method may be provided for powering up or down a playback path (9) comprising a digital-to-analog converter (14) for generating a non- ground-centered analog intermediate voltage (VIN) centered at a common-mode voltage and coupled to a...  
WO/2018/001763A1
It is provided a method for providing feedback to pre-distorters in branches of a MISO system such that the pre-distortion cancels distortions caused by the signal path and the combiner combining the signals from the branches into which ...  
WO/2018/003111A1
Disclosed is an amplifier wherein a parallel inductor is configured from: first metal wires (8a, 8b) that connect a drain terminal (2) and first metal patterns (7a, 7b) to each other; and second metal wires (10a, 10b) that connect the fi...  
WO/2018/004074A1
A constant transconductance current source according to the present embodiment comprises: a modified cascode circuit of a first-conductive MOS transistor; and a current mirror circuit of a second-conductive MOS transistor, connected to t...  
WO/2018/005582A1
Circuits and operating methods thereof for correcting phase errors introduced by amplifiers employing gallium nitride (GaN) transistors are described. The phase errors are caused by trapping effects exhibited by the GaN transistors. The ...  
WO/2018/002843A1
The invention relates to a method and circuit for compensating for the offset voltage of electronic circuits. The circuit comprises a dynamic comparator, a phase detector for measuring the phase change at the outputs of the comparator, a...  
WO/2018/004402A1
An amplifier arrangement (100) comprises a power splitter (110) configured to receive the input signal and produce split input signals (101, 102,...,10N, 113). The amplifier arrangement (100, 200) further comprises a first amplifier bran...  
WO/2018/004480A1
In the present invention, an analog input signal (X(n)) is processed by a Peak to Average Ratio Reduction (PARR) block to diminish the difference between peak amplitudes and average amplitudes of the analog input signal (X(n)). After, a ...  
WO/2018/001376A1
Provided is a harmonic suppression method, a corresponding low-noise amplifier (20, 30, 40), and a communication terminal. In the harmonic suppression method, an isolation unit (23, 33, 43) is arranged between a harmonic suppression unit...  
WO/2018/001453A1
A variable gain amplifier (1) is configured to amplify an input signal (Ivga_ in) with a variable gain, resulting in a linear-in-db output signal (Ivga_out). The variable gain amplifier (1) comprises a linear-in-db control current genera...  
WO/2017/222568A1
In accordance with embodiments of the present disclosure, a multi-mode switching power converter may include a power inductor, a first switch coupled between a first terminal of the power inductor and a first supply terminal having a fir...  
WO/2017/221054A1
Embodiments of a transmitter having an architecture that reduces power consumption and complexity are disclosed. In some embodiments, a transmitter comprises a modulator comprising an actuator, modulation circuitry, and an adaptor. The a...  
WO/2017/216894A1
A conventional transmitter has a problem of increase of quantization noise at a DAC when a transmission signal is wideband. A transmitter according to the present invention is provided with: a digital circuit that generates a digital tra...  
WO/2017/218327A1
Circuits (100B) for protecting devices (108), such as gallium nitride (GaN) devices, and operating methods thereof are described. The circuits (100B) monitor a magnitude of the current (102) in a device (108) and reduce the magnitude of ...  
WO/2017/218203A1
Certain aspects of the present disclosure generally relate to wireless communications. In some aspects, a device may determine a peak to average ratio (PAR) value for a portion of a wireless transmission. In some aspects, the device may ...  
WO/2017/211970A1
Circuitry, method and computer program for reducing distortions in a plurality of amplified signals to be radiated by a multiple antenna system. The circuitry comprising: a plurality of inputs for receiving digital signals for a pluralit...  
WO/2017/211134A1
Disclosed in the present invention is a two-stage operational amplifier, comprising an offset voltage generation unit, a first stage operational amplifier unit, and a second operational amplifier unit. The first operational amplifier uni...  
WO/2017/212868A1
Provided is a drive waveform amplification circuit for an inkjet head. The drive waveform amplification circuit can more appropriately maintain an outputted drive waveform without a power supply unit being enlarged. Also provided are an ...  
WO/2017/212062A2
There is provided an RF amplifier arrangement comprising: an input operable to receive an RF input signal; an output operable to output an amplified RF signal; at least one amplifier bank located between the input and output, the or each...  
WO/2017/212676A1
A digital amplifier (100) is provided with: a pulse width adjustment circuit (1) that adjusts the pulse width of a digital signal; a switching circuit (2) that amplifies an output signal of the pulse width adjustment circuit; and a feedb...  
WO/2017/209045A1
The objective of the present invention is to ameliorate ringing of signals that have passed through a low pass filter in a LINC type linear amplifier. This linear amplifying device includes: a linear amplifier including a low pass filter...  
WO/2017/209377A1
Disclosed are an inductor layout having improved isolation through the blocking of a magnetic field coupling between inductors, and an integrated circuit device using the same. A second inductor coil is arranged so as to be spaced from a...  
WO/2017/208307A1
The present invention is provided with: a first protection transistor (Q1), the emitter of which is connected to a first node (1); a first diode (D1) connected between the collector of the first protection transistor (Q1) and an output t...  
WO/2017/204390A1
A sample validity determination method and apparatus for a digital predistortion apparatus are disclosed. The main purpose of the present embodiment is to provide a sample validity determination method and apparatus for a digital predist...  
WO/2017/199366A1
A Doherty amplifier in which a carrier amplifier (6) and a peak amplifier (8) are connected in parallel, wherein when the peak amplifier (8) stops operating, a compensation circuit (9) is connected between the peak amplifier (8) and the ...  
WO/2017/197954A1
Provided are a low-noise power amplifier (20) used for satellite navigation and time service, and a method for use. A matching resistor (22), a single-pole, double-throw radio-frequency switch (23), a radio-frequency amplifier (25), and ...  
WO/2017/197123A1
Methods, systems and programs for denoising a signal using discrete wavelet transformation are provided. For example, a method for denoising a signal may include determining a number of resolution levels to denoise, determining variable ...  
WO/2017/194141A1
The disclosure relates to a tunable filter, comprising: a filter input; a filter output; at least one feedback loop coupled between the filter output and the filter input, wherein the at least one feedback loop comprises at least one tun...  
WO/2017/197078A1
A wide dynamic range trans-impedance amplifier (200) includes a first trans-impedance amplifier (206) configured to receive a first input current and produce a first voltage, and a second trans-impedance amplifier (222) configured to rec...  
WO/2017/196508A1
An apparatus (202) for wireless communication comprises a low noise amplifier, LNA (218), an attenuator (212), and a processing system (204). The attenuator (212) receives a signal from the LNA (218), generates a first attenuated signal ...  
WO/2017/194143A1
The disclosure relates to a circuit, comprising: a circuit input; a circuit output; at least one passive feedback loop coupled between the circuit output and the circuit input; an active element, in particular a DC coupled operational am...  
WO/2017/192075A1
An amplifier arrangement (200) for amplifying input signals and a method for operating the amplifier arrangement are disclosed. The amplifier arrangement (200) comprises a main amplifier circuit (210) having an input and an output; a fir...  
WO/2017/192700A1
An instrumentation amplifier (300) configured for providing high common mode rejection and low distortion includes an input differential pair (303, 304) configured to receive a differential input voltage and differential feedback voltage...  
WO/2017/190764A1
An amplifier (30) for a receiver circuit (15) is disclosed. The amplifier has an input node (Vin) and an output node (Vout). It comprises a tunable tank circuit (100) connected to the output node (Vout), a feedback circuit path (200) con...  
WO/2017/185563A1
A distortion detection circuit (10) comprises a first logic operation and triggering module (100), a second logic operation and triggering module (200), and a logic operation module (300). The first logic operation and triggering module ...  
WO/2017/185750A1
Embodiments of the present invention provide an analog predistortion system, a transceiver, and a communications device. The analog predistortion system comprises an analog predistorter (APD), a power amplifier (PA), and a predistortion ...  
WO/2017/190133A1
A switching system is connected to the power amplifier of an RF system. The switching system can switch the DC supply voltage to the power amplifier while handling the high DC current and the nanosecond switching speed requirements that ...  
WO/2017/184458A1
In accordance with embodiments of the present disclosure a control circuit may include at least one input for monitoring a respective signal for each of a plurality of amplifiers, an output for outputting at least one control signal for ...  
WO/2017/184457A1
An audio amplifier circuit for providing an output signal to an audio transducer may include a power amplifier and a control circuit. The power amplifier may include an audio input for receiving an audio input signal, an audio output for...  
WO/2017/182884A1
Provided are a circuit system and method for a gallium nitride (GaN) device. The circuit system comprises: a negative bias voltage circuit, configured to provide a gate negative bias voltage of the GaN device; a drain switch circuit, con...  
WO/2017/180028A1
A modular power amplifier system (100) and an electronic device comprising the modular power amplifier system are disclosed. The modular power amplifier system (100) comprises a plurality of amplifier modules (111, 121, 131, 132, 1i1). T...  

Matches 1 - 50 out of 35,565