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WO/2022/138373A1 |
A high frequency circuit (1) is provided with: a first high frequency circuit (11); a second high frequency circuit (12); and a switch circuit (51) having a first terminal (511) connected to an antenna connection terminal (100), a second...
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WO/2022/135463A1 |
Disclosed is a radio frequency power amplifier that reduces load change sensitivity, which comprises a feedback circuit (10) and a plurality of levels of amplification circuits, the feedback circuit (10) and all or a portion of amplifica...
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WO/2022/137642A1 |
An auto-tuning controller for improving a performance of a power amplifier system is provided. The controller includes an interface including input terminals and output terminals, the interface being configured to acquire input signal co...
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WO/2022/137593A1 |
A signal processing device (100) according to an embodiment of the present invention is provided with: a distortion compensating means (101) for subjecting an input signal to distortion compensation processing to compensate for non-linea...
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WO/2022/140725A1 |
An apparatus is disclosed for waveform-tailored average power tracking. In an example aspect, the apparatus includes an amplifier, a power converter, and an average power tracking module. The amplifier is configured to amplify radio-freq...
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WO/2022/138284A1 |
This amplifier circuit (1) comprises: an amplifier (20) including a drain ground circuit or a collector ground circuit with variable mutual conductance; a power distributor (30) connected to the output side of the amplifier (20); and a s...
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WO/2022/139911A1 |
Various aspects provide a transceiver and a communication device including the transceiver. In an example, the transceiver includes an amplifier circuit including an amplifier stage with an adjustable degeneration component, the amplifie...
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WO/2022/130548A1 |
The present invention provides a power amplifier circuit that comprises: a first transistor 1 the source electrode of which is grounded; n second transistors 2 (n is a natural number greater than or equal to 1) connected in series betwee...
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WO/2022/131796A1 |
The present disclosure relates to a 5th generation (5G) or pre-5G communication system for supporting a data transmission rate higher than that of a 4th generation (4G) communication system such as long term evolution (LTE). In the wirel...
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WO/2022/131753A1 |
The present disclosure relates to a 5th generation (5G) or pre-5G communication system for supporting a data transmission rate higher than that of a 4th generation (4G) communication system such as long term evolution (LTE). According to...
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WO/2022/133298A1 |
An example device includes a memory configured to store representations of sensed signals. The example device includes processing circuitry coupled to the memory, the processing circuitry being configured to read or write the representat...
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WO/2022/132460A1 |
A fast-switching power management circuit operable to prolong battery life is provided. The power management circuit includes a voltage circuit that can generate an output voltage for amplifying an analog signal in a number of time inter...
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WO/2022/132240A1 |
An image sensor and pixel circuit therefor includes a photoelectric conversion device; an amplifier including a first input terminal connected to the photoelectric conversion device, and an output terminal; a capacitor disposed between t...
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WO/2022/133352A1 |
A broadband low noise amplifier (LNA) structure (10) includes a main LNA (12), an offset LNA (14), an input splitter (16), and an output combiner (18). The input splitter (16) is configured to split a radio frequency (RF) input signal in...
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WO/2022/128289A1 |
In one embodiment a differential amplifier arrangement comprises a first input (10) configured to receive a first input signal (VIP), a second input (11) configured to receive a second input signal (VIN), a first output (20) configured t...
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WO/2022/132536A1 |
Apparatuses and methods for saving power at an input buffer are described. An example apparatus includes an input buffer comprising an amplifier coupled to a pair of serially coupled inverters, and a de-emphasis circuit coupled to the in...
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WO/2022/130566A1 |
According to the present invention, a unit amplifier (AMP) has first and second transistors (Qi, Qo) cascade-connected and a first variable resistance circuit (Rm), the first transistor (Qi) has a base terminal or a gate terminal connect...
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WO/2022/132295A1 |
A signal processing apparatus and related transceiver circuit are disclosed. The signal processing apparatus includes a power amplifier circuit and a transceiver circuit. The transceiver circuit is configured to generate multiple composi...
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WO/2022/132393A1 |
An amplifier circuit (400) for a millimeter wave (mmW) communication system includes an amplifier (410) coupled to a matching network (450), and a variable gain control circuit in the matching network (450), the variable gain control cir...
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WO/2022/132304A1 |
An RF summer circuit (20) comprises first and second ports (P1, P2) coupled by first and second resistances (R1, R2), respectively, to a junction (22). The RF summer circuit further comprises a series combination of a third resistance (R...
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WO/2022/131748A1 |
The present disclosure relates to a 5th generation (5G) or pre-5G communication system for supporting higher data transmission rates than 4th generation (4G) communication systems such as long-term evolution (LTE). In a wireless communic...
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WO/2022/122115A1 |
The present disclosure relates to an amplifier arrangement (1, 100, 200) comprising a first amplifier device (2, 102, 202) and a second amplifier device (3, 103, 203) where each amplifier device (2, 3; 102, 103; 202, 203) is connected to...
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WO/2022/125288A1 |
A method for matching a pair of composite circuit elements (CEs) included in a circuit includes fabricating N CEs (e.g., resistors, transistors, current sources, capacitors) designed to match and switches configurable, according to M dif...
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WO/2022/121526A1 |
The present disclosure relates to the technical field of electronic circuits, and provides an operational amplifier, comprising: a load input pair; a differential input pair connected to the load input pair, a non-inverting input termina...
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WO/2022/122909A1 |
Devices and/or computer-implemented methods to facilitate a Josephson traveling wave parametric amplifier (JTWPA) device with sideband suppression are provided. According to an embodiment, a device can comprise a plurality of unit cells ...
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WO/2021/133399A9 |
A device for wireless communications can include a phase selector, a coarse delay line, and a digitally controlled edge interpolator (DCEI). The phase selector receives an input signal and is coupled to the coarse delay line. The coarse ...
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WO/2022/123254A1 |
Examples provide a multilevel switched-mode ultrasound transmitter comprising a first push-pull transistor arrangement comprising first and second drive transistors, third and fourth additional switched transistors, each arranged as a bi...
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WO/2022/124230A1 |
An integrated circuit (70) comprises: a first substrate (71) at least partly composed of a first semiconductor material, and having, in plan view, a central region (71a) and a peripheral region (71b) surrounding the central region (71a);...
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WO/2022/121540A1 |
Disclosed in the present application are an audio processing circuit and a playback apparatus. The audio processing circuit comprises: a target power supply module, a control module, a first voltage conversion module, a second voltage co...
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WO/2022/125163A1 |
A method for use in an analog circuit having a plurality of differential pairs of elements, wherein for each pair of the plurality of differential pairs of elements, the elements of the pair are designed to match but may have mismatch th...
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WO/2022/118560A1 |
In the present invention, each of a plurality of stages of amplifier circuits includes a bipolar transistor and a base electrode. The bipolar transistor included in each of the plurality of stages of amplifier circuits includes: a collec...
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WO/2022/116741A1 |
An inter-stage matching circuit and a push-pull power amplifier circuit. The push-pull power amplifier circuit comprises a pre-stage push-pull amplifier circuit (40) and a post-stage push-pull amplifier circuit (50). The inter-stage matc...
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WO/2022/119667A1 |
An offset compensated differential amplifier employing a multi-tanh circuit comprising differential pairs coupled in parallel to compensate for an offset voltage of the output voltage in the offset compensation calibration mode is disclo...
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WO/2022/119875A1 |
A system (200) includes a first differential amplifier (102) and a first transformer (X1) with a primary coil (L1) coupled to an output of the first differential amplifier (102) and with a secondary coil (L2) coupled to a load (RL). The ...
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WO/2022/118445A1 |
In the present invention, a passing phase of a path passing through a first input phase delay circuit (2), a carrier amplifier (4), and a second output phase delay circuit (7) and a passing phase of a path passing through a second input ...
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WO/2022/118645A1 |
Provided is an integrated circuit (70) comprising: a first base material (71), at least a portion of which is composed of a first semiconductor material, and on which is formed an electric circuit (for example, a control circuit (80) or ...
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WO/2022/118646A1 |
An integrated circuit (70) comprises: a first substrate (71) at least partially composed of a first semiconductor material and having an electric circuit (for example, a control circuit (80) or a switch circuit (51, 52)); a second substr...
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WO/2022/119626A1 |
A power management integrated circuit (PMIC) is disclosed. The PMIC is configured to generate multiple voltages during a voltage generation period(s). In embodiments disclosed herein, the voltage generation period(s) is divided into mult...
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WO/2022/116729A1 |
Disclosed in the present invention are a bandwidth adjustment circuit and a bandwidth adjustment method for an operational amplifier, the circuit comprising: a bias-current generation unit, which is connected to a bias-current input end ...
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WO/2022/117548A1 |
An audio processing device (1) for processing audio data comprises an audio input (10) configured to receive an audio signal, in particular an analog audio signal, and a differential amplifier (11). The differential amplifier (11) compri...
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WO/2022/115823A1 |
Apparatus and methods for frequency compensation of amplifiers are provided herein. In certain embodiments, an amplifier includes an input transistor (which can be part of a differential input pair) electrically connected to a first node...
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WO/2022/113476A1 |
The present invention achieves size reduction. This power amplification circuit (1) comprises a branching filter (14), a first amplifier (11), a second amplifier (12) and a third amplifier (13). The branching filter (14) branches an inpu...
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WO/2022/110620A1 |
A Doherty radio-frequency power amplifier module based on a new DreaMOS process, and an output matching network therefor. The output matching network comprises a main parasitic capacitor, an auxiliary parasitic capacitor and an inductor ...
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WO/2022/107375A1 |
A switching module comprising: a GaN-FET mounted on a substrate; a driver circuit connected to a gate electrode of the GaN-FET via a gate resistor; and a driver power supply for supplying a drive voltage to the driver circuit. The driver...
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WO/2022/108255A1 |
An electronic device may comprise: a first antenna; a second antenna; a first power amplifier electrically connected to the first antenna; a second power amplifier electrically connected to the second antenna; a first attenuator electric...
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WO/2022/105643A1 |
A sensor signal processing circuit, comprising an inverting amplifier and a transconductance amplifier, which are connected to an output end of a sensor circuit. By using a combined action of a time constant amplified by the inverting am...
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WO/2022/108463A1 |
Circuits and methods for using in parallel amplification and signal combining are described herein. A circuit uses a digitally controlled multistage cascade combiner, a digital phase and drive signal amplifier controller and a digital co...
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WO/2022/106805A1 |
Drive circuitry for driving a capacitive load, the circuitry comprising: an inductor; a first reservoir capacitor; a switch network; and control circuitry configured to control operation of the switch network to selectively couple the in...
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WO/2022/103493A1 |
A progressive envelope tracking (ET) with delay compensation includes an ET integrated circuit (IC) (ETIC) that is a progressive ETIC that switches between different driver amplifiers having different associated offset voltages based on ...
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WO/2022/103484A1 |
An envelope tracking (ET) integrated circuit (ETIC) operable across wide modulation bandwidth is disclosed. The ETIC includes at least two auxiliary voltage outputs coupled to a high-bandwidth power amplifier circuit that has a lower equ...
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