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WO/2019/202686A1 |
A first resistor (11) to a fourth resistor (14) are connected in series in a ring shape to a first capacitor (21) to a fourth capacitor (24). A first output terminal (41) to a fourth output terminal (44) are connected to the series conne...
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WO/2019/202685A1 |
A first input terminal (11) is connected at the connection point of a drain terminal of a first transistor (1) and a gate terminal of a fourth transistor (4). A second input terminal (12) is connected at the connection point of a drain t...
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WO/2019/186913A1 |
A first switch (4) is connected in parallel to a circuit element (3). A second switch (5) is connected in series to the parallel circuit composed of the circuit element (3) and the first switch (4). The first switch (4) and the second sw...
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WO/2019/125326A3 |
The invention is related to a multi-port circuit creating simple structure realizations of circuits and circuit components which are theoretically defined, however do not have any realization or are implemented with complicated and costl...
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WO/2019/171539A1 |
One inductor (1a) and another inductor (1b) are magnetically coupled to each other. A variable current source (2) controls a current flowing through the one inductor (1a). By controlling the current flowing through the one inductor (1a),...
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WO/2019/168721A1 |
A superconducting circuit may include a transmission line having at least one transmission line inductance, a superconducting resonator, and a coupling capacitance that communicatively couples the superconducting resonator to the transmi...
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WO/2019/157479A1 |
An antenna impedance tuner can include first and second nodes, a bypass path, first and second series capacitance paths, and an inductance path, with each path being implemented between the first and second nodes and including a switch c...
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WO/2019/125326A2 |
The invention is related to a multi-port circuit creating simple structure realizations of circuits and circuit components which are theoretically defined, however do not have any realization or are implemented with complicated and costl...
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WO/2019/116299A1 |
The invention relates to a tunable, silicon-based negative-resistance circuit (10, 30) and to an active filter (50) for E-band frequencies (60 to 90 GHz). A base of a transistor (11) is connected to an on-chip inductive transmission line...
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WO/2019/110128A1 |
A combined mixer and filter circuitry is disclosed. The combined mixer and filter circuitry comprises a mixer comprising a first input, a second input and an output. The combined mixer and filter circuitry further comprises a filter comp...
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WO/2019/105595A1 |
A cascading selective microwave switch (cascade) includes a set of Josephson devices, each Josephson device in the set having a corresponding operating bandwidth of microwave frequencies, wherein different operating bandwidths have diffe...
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WO/2019/092605A1 |
A second-order all-pass network has at least three Second Generation Current Conveyors (CCIIs). A network input is connected or connectable to a Y port of a first CCII, a Z port of the first CCII is connected to a Y port of a second CCII...
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WO/2019/091300A1 |
A control circuit is disclosed for controlling operation of a radio frequency (RF) transistor. The control circuit has a first sub-circuit that accepts a reference voltage and a reference current. The control circuit has a second sub-cir...
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WO/2019/084674A1 |
A configuration of switches added to a line control circuit allows for switching back and forth between a configuration featuring a series-connected thyristor switch and reactor and a configuration featuring a parallel-connected thyristo...
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WO/2019/074714A1 |
In certain aspects, a circuit comprises a low noise amplifier (LNA) configured to receive a radio frequency (RF) signal, a first mixer coupled to the low noise amplifier (LNA), and a first trans-impedance filter coupled to the first mixe...
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WO/2019/070768A1 |
A digital phase shifter is described where each bit of the phase shifter has a circuit block including one PIN diode in parallel with one transmission line. The phase shifter requires only one PIN diode and one transmission line per bit ...
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WO/2019/060101A1 |
Certain aspects of the present disclosure relate to multi-band filter architectures and methods for filtering signals using the multi-band filter architectures. One example multi-band filter generally includes a transconductance-capacita...
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WO/2018/236613A1 |
A short-channel metal oxide semiconductor varactor may include a source region of a first polarity having a source via contact. The varactor may further include a drain region of the first polarity having a drain via contact. The varacto...
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WO/2018/227409A1 |
A metal-oxide semiconductor (MOS) field effect transistor-based filter circuit and a chip, the filter circuit comprising: a first MOS field effect transistor (M1) and an electrostatic discharge unit; during normal operation, a filter cap...
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WO/2018/222621A1 |
A differential input receiver comprises an input circuit (402) having first (410) and second (418) input nodes configured to receive a differential input signal; a first output circuit (419) having a first capacitor (420) coupled between...
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WO/2018/215973A1 |
A method and apparatus for modifying or controlling a resonator connected to a signal loop having an input (18828), an output (18822), and a closed loop frequency response. The signal loop has a primary resonator (18810) having a primary...
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WO/2018/204417A1 |
A double-balanced radio-frequency (RF) mixing digital-to-analog converter (DAC) apparatus includes a load network, a first set of resistive DAC driver circuits and a first mixing core. The first mixing core can receive first RF input sig...
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WO/2018/187263A1 |
A delay circuit (100) includes precharge and discharge transistors (Ml, M2) configured to receive an input signal. The delay circuit (100) also includes a resistor (Rl) coupled to the precharge transistor (Ml) having a negative temperatu...
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WO/2018/180111A1 |
According to the present invention, a noise removal circuit (100) has a function of an attenuator which attenuates, at a prescribed ratio, a signal of a voltage difference between a first input signal terminal (1) and a second input sign...
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WO/2018/183863A1 |
A circuit for attenuating a signal has an input configured to receive an input signal, an output configured to transmit an output signal, a first attenuation path (having a first active circuit device) between the input and the output, a...
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WO/2018/168379A1 |
This fluid control device (10) includes: a piezoelectric pump (11) which has a piezoelectric element (12) and has an output for discharge pressure that changes according to the drive frequency of the piezoelectric element (12); a self-os...
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WO/2018/159972A1 |
This phase shifter comprises: a fixed line having one end connected to an input terminal, to which a wireless signal is input, and the other end connected to one of a plurality of output terminals, to which the wireless signal is output,...
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WO/2018/158902A1 |
Provided is a polyphase filter comprising: a first transistor (2a) for amplifying a first I signal V IP to be inputted from a first input terminal (1a); a second transistor (2b) for amplifying a first Q signal V QP to be inputted from a ...
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WO/2018/159973A1 |
A phase shifter comprises: a fixed line having one end connected to an input terminal through which a radio signal is inputted and the other end connected to one of a plurality of output terminals through which the radio signal is output...
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WO/2018/148615A1 |
The present disclosure provides a super-regenerative transceiver with a feedback element having a controllable gain. The super-regenerative transceiver utilizes the controllable gain to improve RF signal data sensitivity and improve RF s...
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WO/2018/140115A1 |
A phase shifter cell (100) and multiple coupled phase shifter cells that mitigate signal glitches arising from phase state changes by a combination of design architecture and control signal timing (A, B, C, D). Specifically, one or more ...
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WO/2018/135831A1 |
Provided are a phase shift module and a communication device comprising same. The phase shift module, according to one embodiment of the present invention, comprises: a plurality of phase shifters which are arranged in parallel and respe...
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WO/2018/116825A1 |
The present technology relates to a single-phase differential conversion circuit, a signal processing method therefor, and a reception device capable of improving linearity of input/output characteristics. The single-phase differential c...
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WO/2018/091335A1 |
An apparatus (100; 400) for varying amplitude and phase of signals along at least one signal path (I) is disclosed. The apparatus comprises: an input (101) for receiving an input signal; an output (102) for providing an output signal; a ...
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WO/2018/061016A1 |
An electronic emulation component for actively emulating a passive electronic component such as a capacitor or inductor having a desired value, comprises a pair of terminals for connection to an external circuit and across which the desi...
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WO/2018/050221A1 |
A filter circuit (70), comprising a filter (72) and a current mode programmable gain amplifier (74), is provided. The filter circuit (70) is configured to filter an input signal (VF_IN+, VF_IN-, ), resulting in an output signal. The filt...
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WO/2018/040160A1 |
Provided are a mismatch compensation method and a mismatch compensation device for a radio frequency transmission line, wherein the mismatch compensation method for a radio frequency transmission line comprises: extracting a scattering p...
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WO/2018/042247A1 |
A transformer-based balun circuit is disclosed herein. The balun can be implemented using a spiral transformer (204), where primary transformer windings (206) and secondary transformer windings (208) can be inductively coupled and can be...
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WO/2018/034779A1 |
Certain aspects of the present disclosure provide methods and apparatus for calibrating a tunable active filter. One example apparatus is a filter circuit that generally includes a tunable active filter comprising at least one amplifier ...
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WO/2018/035178A1 |
An attenuation cell is provided for use in a switched attenuator. The attenuation cell includes an attenuation path that has an input, a first switch, a resistive network, a second switch, and an output. The resistive network provides a ...
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WO/2018/033746A1 |
A circuit comprising: a passive reactive component (L1); and an active circuit (320), the active circuit arranged to increase the AC voltage difference across the reactive component by changing the current at an input (A) to the reactive...
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WO/2018/031194A1 |
A circuit includes an active balun having an RF signal input and having differential signal outputs, the active balun including a first pair of transistors coupled to the RF signal input, the first pair of transistors including a first t...
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WO/2018/013207A1 |
The de-Qing loss and phase imbalance caused by the inherent capacitance of a switched resistance, such as a MOSFET with a resistor, can be reduced by using a shunting switch across the resistor that is in series with the resistor's switc...
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WO/2018/005795A1 |
A dynamic matching system for plasma generation that maintains a near-constant driving point impedance across an entire plasma operating range is provided. The matching system includes a Resistance Compression Network (RCN), impedance tr...
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WO/2017/216896A1 |
The present invention is provided with: a filter unit that amplifies signals in a predetermined frequency band, said signals being among input signals; an abnormality detection unit that detects an overvoltage of the signals amplified by...
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WO/2017/194141A1 |
The disclosure relates to a tunable filter, comprising: a filter input; a filter output; at least one feedback loop coupled between the filter output and the filter input, wherein the at least one feedback loop comprises at least one tun...
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WO/2017/196016A1 |
[Technical field/Problems to be solved] The present invention relates to a device for sensing an inputted sound and converting the same into corresponding light. [Means for solving problems] The present invention comprises: a wideband fi...
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WO/2017/136052A3 |
A phase interpolator is provided with a plurality of slices. Each slice includes a first switch for mixing a first clock signal into an interpolated output signal and a second switch for mixing a second clock signal into the interpolated...
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WO/2017/179301A1 |
A transistor (M1) having a gate which is capacitively coupled to a wiring line (L1) is connected between wiring lines (L1, L2) connected respectively to output nodes (OT1, OT2) which output a reference voltage (VREF_OUT). A replica circu...
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WO/2017/180651A1 |
To compensate the negative effect of a parasitic impedance element in a two-stage arrangement of a first and a second electric component a compensation element is inserted between first and second stage to supplement the parasitic impeda...
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