Document 
Document Title 
WO2002097986A3 
A hardwareconfigurable digital filter (100) is adaptable for providing multiple filtering modes. In one embodiment, the digital filter includes a registerbased array (112) of logic circuitry, computational circuitry (114) and mode sele...

WO/2003/028327A2 
A circular filtering system which prevents the problem of intersymbol interference. The circular filtering system utilizes a buffer memory to store samples of a given symbol and provide only these samples to a linear filter such that th...

WO/2003/028213A1 
A method of searching for a bestmatch decimation vector of decimation factors for nonuniform filter bank, the best match vector allowing perfect or nearperfect reconstruction of an input signal of the nonuniform filter bank, the meth...

WO/2003/023960A1 
A method for designing a digital filter for outputting a signal that is the sum of the products of multiplication of the signals at the taps of delay units (11−16) by the filter factors given by factor units (21−25), several times of...

WO2002069491A8 
A method for measuring system clock signal frequency variations is disclosed, whereby the number of search operations can be limited to 2log n, where n is the number of elements (signal values) within the sliding window used. A binary tr...

WO/2003/023959A1 
In a filtering system, a first input receives a signal contaminated with noise. A second input receives a noise reference signal. Each notch filter in a set of M notch filters is responsive to a corresponding tuning coefficient so as to ...

WO/2003/023961A1 
A filter circuit is composed of FIR filters, and the filter factor is of a symmetrical type, thereby realizing a linear phase characteristic and preventing phase distortion even if a desired frequency band is emphasized. The first filter...

WO/2003/021813A1 
A radio apparatus is provided with analog RF circuits (1−4) by corresponding to antennas (A1−A4), and the circuits’ outputs are converted into digital signals by A&sol D convertors (5−8). The preceeding stage of adaptive processi...

WO/2003/019786A2 
A digital down converter (100) is provided. The digital down converter (100) includes an input adapted (102) to receive an input signal (101), a mixer circuit (104) coupled to the input to down converter the input signal, and a decimatio...

WO2002067422A3 
An N dimensional signal processor using D scale nonuniform sampling is disclosed. The processor includes a multiresolution sampler (A) for outputting a stream of nonuniformly spaced samples resulting in an overall average sampling rat...

WO2002051003A3 
A method and device are described for generating two output signals (I; Q) each substantially identical to a squarewave input signal (A) from a local oscillator (2), wherein the first output signal (I) may have a certain time shift with...

WO2002056468A3 
The present invention is directed to efficient and accurate filtering and interpolation techniques. Methods of the present invention reduce the number of required operations and reduce computational errors in the filtering and interpolat...

WO/2003/017484A1 
A digital signal filter (10) is described for filtering a digital signal made up of a stream of digital words which decomposes each word into a plurality of a tuples, each tuple comprising a plurality of co Each tuple is associated with ...

WO/2003/015275A1 
An adaptive signal processing system for improving a quality of signal. The system includes an analysis filterbank for transforming a primary information signal in time domain into oversampled subband primary signals in frequency domain...

WO/2003/014961A2 
An apparatus and method for filtering data that include retrieving a plurality of data samples from memory; computing a locus of the samples; computing a distance between an input value and the locus; comparing the distance between the i...

WO/2003/015269A2 
The invention relates to a method for generating a temporally discrete amplitude value sequence s[n], characterised in that a continuous signal r(t) is filtered and subsequently sampled using a period T. According to the method:  the co...

WO/2003/015292A2 
A filter is created by sampling noise during an inter−frame gap (110) of a received signal, sampling a data frame preamble (115) from within a data frame (105) of the received signal, and computing filter coefficients based on the nois...

WO2002060056A3 
The present invention comprises a method of obtaining coefficients for a transmit filter such that the power spectral density of the output for the different frequencies comes close to but does not exceed a maximum power spectral density...

WO/2003/015270A2 
The invention concerns a method for determining filtering coefficients of a modulated filter bank, based on a prototype filter of length L designed to produce a modulated system with M subbands, comprising the following steps: (a) deter...

WO/2003/009472A1 
A fast median filter and method is disclosed. The median filter used by a processor (26) includes a predetermined number of median cells (1014), each of the median cells is connected to the same input and the same output through a switc...

WO/2003/009473A1 
A FIR in a Gigabit transceiver represents data words in three bits: SIGN representing word sign, SHIFT representing requirement for a shift operation, and ZERO indicating whether the word is zero. An AND gate ANDs a multiplier and the ZE...

WO/2003/009596A1 
An arrangement for the reduction of noise transmitted in the return direction from a local cable TV network (10) comprises an input (14), an output (16), means (21) for evaluating signals incoming at the input (14), and blocking means (1...

WO/2003/009471A1 
There is disclosed software defined forward link finite impulse response (FIR) filter for performing filtering on the forward link of a code division multiple access (CDMA) system, the FIR filter has a number of taps and being characteri...

WO2002071617A9 
A selftuning filter is disclosed. The selftuning filter includes a digital clocking signal and an input coupled to the digital clocking signal, whereby the input reads a value incident on the input when the digital clocking signal chan...

WO2001026224A9 
A spread spectrum modulated signal generator is disclosed that reduces the storage requirement for storing values representing filter responses of input signal samples in a digital filter by taking advantage of timereversal symmetry of ...

WO2002054350A3 
A multiplierless pyramid filter is described comprising a sequence of scalable cascaded units, each of said units comprising a delay unit and three the adders, said delay unit the adders being coupled to produce a higher order pyramidall...

WO2002041490A3 
A system for digital filtering includes a set of logic gates, a state storage, and a multiplexer. The state storage includes two or more storage banks and may also include combinatorial logic and/or at least one lookup table. In one appl...

WO2002078183A8 
A filter (201) accepts a diffusion code sequence or the like as an input sequence at the chip late 1/D. The diffusion code sequences accepted are successively delayed by a delay circuit (202) connected in series, and delivered. Delay tim...

WO/2003/005356A2 
The waveform equalizer (6) for obtaining a corrected signal S' by performing a waveform equalization to a read signal S read out from an information carrier (1). The waveform equalizer (6) has a first filter (61) able to perform a filter...

WO/2003/001669A1 
A decimator is provided that selectively varies the output sampling rate of an integer decimating device, such that the average output sampling rate corresponds to a desired output sampling rate. The output sampling rate varies such that...

WO/2002/101925A1 
A data interpolating device comprises plural stages of delay circuits (1−1, 2−1, 3−1) for delaying discrete data sequentially inputted and multiplication&sol addition circuits (4−1 to 16−1) that performs weighted addition of da...

WO/2002/101933A1 
A compressing device comprises plural stages of delay circuits (1−1 to 4−1) and multiplying&sol adding circuits (5−1 to 10−1) that performs weighted addition of output data from the delay circuits (1−1 to 4−1) according to th...

WO/2002/097986A2 
A hardwareconfigurable digital filter (100) is adaptable for providing multiple filtering modes. In one embodiment, the digital filter includes a registerbased array (112) of logic circuitry, computational circuitry (114) and mode sele...

WO/2002/093181A1 
A waveform detector having a signal processing function for producing an output waveform by detecting, by characterizing, a transient state variation having no periodic repetition or by subjecting an input waveform to 1/f fluctuation con...

WO/2002/091588A1 
A subband adaptive differential pulse code modulation/encoding apparatus includes means (102, 103, 104, 105) having a predetermined asymmetric impulse response for receiving an audio signal and banddividing the received audio signal in...

WO/2002/091222A1 
A method, apparatus, and computer program product for combining a subband decomposition and a linear signal processing filter (LSPF). Operations performed include merging the LSPF, via superposition, with each synthesis filter of the fir...

WO/2002/091219A1 
A method, apparatus, and a computer program product for generating a set of jointly optimized linear signal processing filters and subband filters for processing digital data on a computer system are presented. In general, the invention ...

WO/2002/089334A1 
A filter system (10) and method are provided that is particular applicable to the resampling of a signal, such as a digital audio signal. The filtering method in accordance with the invention may use as a nearest neighbor strategy to red...

WO/2002/089116A1 
An inverse filtering method, comprising: generating a first filtered signal based on an input signal; and combining the first filtered signal with the input signal for obtaining a residual signal. The generating comprises: generating a s...

WO/2002/089061A2 
Embodiments of a twodimensional pyramid filter architecture are described.

WO/2002/086755A1 
The present invention is directed to a method of providing signal processing operations, including convolution/filtering, where each parallel stream is processing signals at a lower rate than the signal data rate itself while resulting i...

WO/2002/084234A1 
The apparatus is an asynchronous data logger (ADL) comprises a sensor (1) and, in a preferred embodiment, three sampling channels. Each channel comprises an analogue to digital (A/D) converter (3), a sampling clock (4), a memory (5) and ...

WO2002060261A3 
An electronic filter operates as a correlator that provides a discrete approximation of an analog signal (Figure 1, 10, 11, 12, 13). The analog to digital conversion is integrated directly approximation calculation. An array of sample an...

WO/2002/082106A1 
The invention concerns a device and a method for analysing a digital audio signal (C) for use for identifying musical notes present in a sound, audio or musical signal. The invention is characterised in that the method consists in: creat...

WO/2002/080362A1 
The present invention proposes a new method and apparatus for the improvement of digital filterbanks, by a complex extension of cosine modulated digital filterbanks. The invention employs complexexponential modulation of a lowpass prot...

WO/2002/080363A1 
Embodiments of a twodimensional pyramid filter architecture are described.

WO/2002/080098A2 
Embodiments of a pyramid are described.

WO/2002/078182A2 
This invention relates to an integrated circuit comprising a twodimensional pyramid filter architecture of order 2N1, where N is a positive integer greater than two. With this architecture reduction of computational complexity or proce...

WO/2002/078183A1 
A filter (201) accepts a diffusion code sequence or the like as an input sequence at the chip late 1/D. The diffusion code sequences accepted are successively delayed by a delay circuit (202) connected in series, and delivered. Delay tim...

WO/2002/076055A1 
An interface circuit (103) is integrated in an LSI. A comparator circuit (105) having a hysteresis characteristic compares the signal (111) outputted from a driver circuit (101) through a signal transmission line (102) with a signal (112...
