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Patent Searching and Data


Matches 701 - 750 out of 4,883

Document Document Title
JPH1117525A
To provide a frequency divider and the clock generating circuit that is operated over a broad range and immune to the fluctuation in a power supply voltage. The frequency divider is provided with a 1st differential amplifier 1, a 1st swi...  
JPH118549A
To provide a counter circuit with which a correct counter value can be read out, without stopping a counter and high-speed processing is enabled. Each time a counter clock CLK is inputted, the counter value of counter is updated. Each fl...  
JPH118551A
To securely detect a latch miss of a logic circuit due to an increase in operating frequency by providing a frequency-dividing circuit which stops frequency-dividing operation, when the operation becomes unstable and discriminating wheth...  
JPH118548A
To shorten as test time and to make a test circuit simple by providing a higher-order bit counter, which uses the output of a selecting means as a count signal and a low-order bit counter which has more bits than the higher- order bit co...  
JP2843526B2
PURPOSE: To improve the propagation speed of a carry signal by a synchronizing counter constituted of the multi-stage organization of unit counters. CONSTITUTION: Each unit counter 80 is provided with a multiplexer 60 for selectively tra...  
JPH114160A
To frequency-divide an input clock by n/m ((n) and (m) are set to be arbitrary natural numbers and it is set to be n
JPH114161A
To omit a backup battery and to miniaturize a device by using a memory element. A DC power circuit 2 connects an encoder 7 to an input port 4 of an MPU 3 via an encoder line 12 and changes an AC power supply 1 into a DC power supply. The...  
JP2588270Y2  
JP2843461B2
PURPOSE: To surely eliminate a low-order rank level when a card is successively used by performing a write operation by the case of a high-order rank level every time all the cases of the low-order rank level are activated and eliminatin...  
JP2588271Y2  
JP2842004B2  
JP2840905B2  
JPH10336034A
To execute fast analog arithmetic through the use of an analog voltage value by providing a pulse extracting means and an electric discharging means, etc., for discharging the current of an electric storing means while being fed back wit...  
JP2838596B2  
JP2838878B2  
JP2829965B2  
JP2830713B2  
JP2824908B2  
JP2584320Y2  
JP2818412B2  
JPH10290156A
To easily and efficiently test a multi-stage counter. A carry output CO of a pre-stage counter is given to an enable input EN of a next stage counter via an OR gate. A DFF 3 is set in response to a test input A to set each counter forcib...  
JPH10282241A
To measure a counting rate by removing noise to prevent erroneous counting due to noise. A counting rate is measured by normal measuring means with a feedback type counting rate meter comprising an up/down counter 1, a pulse generator 2 ...  
JPH10282270A
To prevent a decrease in accuracy due to shift of a rate that is caused by the shift of oscillation capacity of oscillation frequency in correspondence with a change in stray capacitance excluding oscillating means when a clock block is ...  
JP2581051Y2  
JPH10247850A
To reduce a circuit configuration area with the addition of a flip-flop by adopting the configuration that one flip-flop is not added to a frequency divider of a modulator prescaler, in order to provide a frequency division number of 1/(...  
JPH10242843A
To exclude a selection process from a critical path and to reduce the power consumption and to make the operation fast by feeding the output of the final or 2nd flip-flop circuit back to the input. A logic circuit 114 sends a selector si...  
JP2793226B2  
JP2793524B2
To provide a time measuring system which has accuracy in measurement within the cycle of a system clock, and its measuring method. This system is constituted, being equipped with a high-speed counter 1, an adder 2, and a controller 3, an...  
JPH10233679A
To test an optional toggle flip-flop by frequency-dividing and outputting inputted clock signals or outputting them without frequency-dividing them based on control signals inputted from the outside. A first circuit 10 generates and outp...  
JP2791906B2  
JPH10214131A
To provide a method for reducing the power consumption of a digital circuit while maintaining an operation with a high frequency. This is a clock mechanism which uses an outside clock signal with a frequency F, and generates an inside ma...  
JPH10209952A
To reduce the consumption of a power battery and to extend the communication time by measuring the temperature for execution of the reception processing and correcting the count value for setting an intermittent receiving cycle based on ...  
JP2778527B2
PURPOSE: To prevent the input of an addend from getting lost by taking priority over latch and clear and delaying count enable(CE) for one bit when the differentiated output of count/latch enable(CE/LE) is matched concerning the integrat...  
JP2776999B2  
JP2772611B2  
JPH10163858A
To ensure a stable operation of a counter device even to an input signal that has an optional clock cycle by counting the number of clocks included in the input signal set in an optional time interval, storing the count value of the rise...  
JP2767789B2  
JPH10154929A
To prevent the occurrence of malfunction due to fluctuation in an input level by extending the operating region with respect to the input level. An input signal S1 from a voltage controlled oscillator (VCO) 4 is given to an input termina...  
JPH10150359A
To improve the precision of a signal waveform by selecting a count-up signal corresponding to a register optionally as a timing signal for output signal inversion so as to make a multichannel scale unchange and to obtain a minute duty ra...  
JPH10150360A
To obtain a window clock signal without the use of a double frequency signal in an active phase by frequency-dividing a main clock signal, generating an AND signal, and converting the AND signal into two signals whose phases are deviated...  
JPH10145225A
To shorten an inspecting time of a multistage frequency dividing circuit by selecting an input signal for a 2nd selected signal input terminal with execution of frequency dividing operation by the frequency dividing means in the specifie...  
JP2758284B2  
JP2758564B2
PURPOSE: To increase the processing speed of a frequency dividing device for frequency-dividing the standard signal with a fractional ratio having each integer of a numerator and a denominator. CONSTITUTION: The output pattern of a frequ...  
JPH10132834A
To enable surely diagnosing whether there is abnormality of an interconnection from a wheel speed sensor and a waveform shaping circuit which shapes the waveform of a wheel speed pulse. A signal line 5 which connects a wheel speed sensor...  
JPH10135820A
To inspect operation of an address counter without read/write operation to a memory array. A count of an address counter 11 is being increased sequentially depending on a clock, the number of clocks(CLK) is counted till a carry is output...  
JP2754170B2
PURPOSE: To reduce jitters by providing a counter for counting an input clock number in the high phase and low phase of output clocks and adjusting the length of the phases while keeping fixed relation with input clocks. CONSTITUTION: Th...  
JPH10126233A
To realize the clock-generating circuit, in which the number of externally mounted components is reduced without increasing the scale of an IC and count accuracy of a counter is improved. Flip-flop circuits TFF1, TFF2 generate 1/2-freque...  
JP2748401B2  
JPH10107617A
To obtain a frequency divider which operates in a wide frequency band and on a broad input level by outputting a signal with constant amplitude despite the amplitude value of an input signal and making an output signal the input signal o...  
JPH10107616A
To reduce current consumption when used at a low frequency and to adjust a frequency when one frequency dividing circuit is used at a plurality of frequencies by having at least either a means that switches current source current in seve...  

Matches 701 - 750 out of 4,883