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Matches 151 - 200 out of 4,883

Document Document Title
WO/1987/001884A1
A circuit for the addition, storage and reproduction of electrical counting pulses, serving preferably as an electronic kilometer counter of a motor vehicle with a travel distance indicator (10). The circuit comprises an overwritable, no...  
WO/1987/000365A1
A frequency dividing arrangement (5) comprises a frequency divider (6) coupled to an active filter (7) which is operative to suppress output radiation from the frequency dividing arrangement. The arrangement (5) may be incorporated into ...  
WO/1986/006909A1
A universal vertical countdown and method for a video display which will handle all standard vertical signals and systems while giving the same noise performance as a self-locking system. Control of the resetting of the countdown during ...  
WO/1986/002793A1
A frequency divider (50) for converting an n-bit periodic counting stream (each period containing a single zero or one bit, respectively, followed by n-1 one or zero bits) into a 2n-bit counting stream includes a two-input NOR gate (51) ...  
WO/1986/001320A1
Electronic hourmeter devices having non-volatile memories are useful, for example, in industrial vehicles. Advantageously, such non-volatile memories should be free from a need for battery back-up systems and should minimize the number o...  
WO/1984/004381A1
An electronic odometer employs a nonvolatile memory as a meter for displaying the cumulative distance traveled by a vehicle such as an automobile. Data on the cumulative distance traveled by the vehicle is calculated in an arithmetic uni...  
WO/1984/000088A1
A circuit for resetting a digital logic circuit, such as a digital counter. A switch (16) provides a first signal when a predetermined condition has occurred. A flip-flop (24) provides an output reset signal when the flip-flop is in a fi...  
WO/1983/003502A1
The design of a system is simplified by making control lines from a microprocessor as small as possible when the frequency-dividing ratio of a programmable divider of a phase-locked loop is controlled by an up/down counter. This circuit ...  
WO/1981/001762A1
A quadrature frequency converter comprises two circuits (5, 6) with variable gain factor, each of them being connected to circuit (7, 8) for reversing the sign of the gain factor. The absolute value of the gain factor of the converter de...  
WO/1980/002893A1
Bidirectional integrator comprising first and second programmable pulse-forming channels (20, 40), a bidirectional counter (60) and an output display (78). Each pulse forming channel provides means for making both continuous and discrete...  
WO/1980/002880A1
An integrated circuit having a frequency divider circuit adaptable for high-speed testing. The frequency divider circuit is split into two stages of a pre-stage frequency divider circuit (12) and a post-stage frequency divider circuit (1...  
JP2019180000A
[Subject] An output of VCO aims at providing a counting-down circuit input circuit which high frequency can also avoid a fall of input amplitude to a counting-down circuit, and can intercept a noise from a standard current source of a co...  
JP6524540B2  
JP2019047208A
To improve reliability by performing resynchronization quickly, even if synchronization is lost for some reason.A semiconductor circuit includes multiple transmission circuits to which synchronized first clocks are inputted, respectively...  
JP2019045369A
To provide a semiconductor device which includes a plurality of series-connected flip-flops and which can be tested in short time, and a method for manufacturing the semiconductor device.A method for manufacturing a semiconductor device ...  
JP6484354B2  
JP6482032B2  
JP6483329B2  
JP6463169B2  
JP2018526940A
A system and a method for Divide (ing) an input clock signal (CLKin) by a programmable part circumference ratio (N), The output clock signal (CLKdiv) accompanied by the duty cycle of the output clock signal which is 50% which has been in...  
JP6387896B2  
JP2018522472A
An electronic circuit which outputs an output signal on frequency which has a frequency relation with the above-mentioned oscillation signal which receives an oscillation signal and is defined by split ratio and which is constituted like...  
JP6312575B2  
JP2016163156A5  
JP2018042167A
To suppress generation of fluctuations in delay time of a frequency divided clock caused by temperature fluctuations.A clock generating circuit 1 includes: a frequency divided part 16 generating a frequency divided clock of a frequency 1...  
JP6268020B2  
JP2017216610A
To provide a timer count method, a timer counter device and a timer count program capable of swiftly responding to a read request of count value by largely reducing read delay of count value in update processing.When an interruption sign...  
JP2017147692A
To provide a histogram counter having no count operation disabled period, and a small circuit area, and to provide a radiation detection circuit.A histogram counter includes a first lower bit counter 2A, a second lower bit counter 2B, an...  
JP2017085278A
To provide a semiconductor integrated circuit capable of performing an actual operation test of a data path from a sequential circuit that operates on the basis of a clock before frequency division to a sequential circuit that operates o...  
JP2017508358A
a plurality of calculation -- a counter which can include a stage is indicated. a ferroelectricity capacitor with which a total of several steps are characterized each by the 1st and 2nd polarization states, a variable impedance componen...  
JPWO2015093187A1
[Subject] A subclock for sleep modes in a microcomputer is held with high precision. [Means for Solution] Whenever subclock 20 counts an oscillation pulse of CR oscillating circuit 21 by loop counter 22 and reaches target count Pm, it ou...  
JP2017028409A
To suppress degradation of ferroelectric memory.Every time receiving an input instruction signal to update counter value, a counter section 2 generates a n-bit first code (inverse gray code code) representing the counter value, in which ...  
JP2017026603A
To provide a test and measurement device capable of prescaling signals while reducing noise.A test and measurement device includes an automatic frequency prescaler 200 configured to receive an input signal. A plurality of divider circuit...  
JP2016208452A
To obtain a frequency divider that can suppress the occurrence of glitch even if the timing of the control signal is shifted.The frequency divider of the present invention includes a divide-by-2 circuit for dividing a frequency of an inp...  
JP2016163191A
To facilitate measurement of EMI characteristics of a chip on which a clock generation circuit is mounted.A clock generation circuit includes: a PLL circuit including a first frequency divider and constituted so as to generate a first cl...  
JP2016163156A
To provide a technique advantageous in making fast transmission of a signal while suppressing increase in a circuit area.An electronic circuit comprises a generation circuit which generates a first signal group and a second signal group,...  
JP5954077B2  
JP2016086293A
To reduce noise generated by transition of the count value.An encoded pattern storage section 121 stores an encoded pattern composed of a plurality of bits for each count value, where some bits out of the plurality of bits composing an e...  
JP2016046795A
To utilize a common counter as a frequency counter by switching between a circuit for generating an accurate one second pulse and a circuit for generating start/stop timing which is used as a counter, and by initializing the circuit when...  
JP2016042060A
To provide a temperature estimation circuit and a counter circuit capable of estimating a temperature and correcting a count value in response to a fluctuation in oscillation characteristics of an oscillator.The oscillation frequency of ...  
JP2015188127A
To provide a clock generating method and a semiconductor device that can reduce deviation from a target frequency and time fluctuation and reduce the consumption power and the cost.In a clock generating method for generating clocks of a ...  
JP2015145877A
To correct a counting error.A counter 7b prepares the frequency distribution of the cycle of an input signal during counting, calculates a representative value of the cycle of the input signal, sets the cycle added with the cycle with a ...  
JP5659855B2  
JP5609326B2  
JP5591914B2  
JP5586399B2  
JP5581147B2  
JP5571068B2  
JP5571688B2  
JP2014140107A
To measure a pulse width of a signal pulse with high precision in consideration of variations and fluctuations in delay time of delay elements.A delay circuit provided comprises a plurality of delay elements connected in series to propag...  

Matches 151 - 200 out of 4,883