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Matches 451 - 500 out of 6,219

Document Document Title
JP2013034174A
To regulate a clock signal with high precision.An electronic apparatus includes: a first frequency division section 1162 for dividing the frequency of a clock signal by a first division number; a second frequency division section 1163 fo...  
JP2013504268A
A frequency divider involves a plurality of Injection-locked Ring Oscillators (ILRO). A first ILRO includes a pair of cross-coupled N-channel transistors, a pair of load resistors, an integrating capacitor, and a current injection circui...  
JP2013009428A
To provide a control signal generating circuit suitable for controlling a semiconductor device.A Johnson counter 31 includes flip-flops FF1-FF4 and gate circuits 41-44. It changes control signals C1-C4 to an "H" level in response to star...  
JP2013009368A
To provide a semiconductor device with lower power consumption and smaller occupied area.As a transistor included in a flip-flop circuit, a transistor having a channel formed in an oxide semiconductor is used. Thus, a frequency dividing ...  
JP5114218B2  
JP2012256056A
To provide a semiconductor circuit operating correctly as a shift register without a level shifter while reducing the number of transistors included in the circuit.A display device includes m stages (m is an arbitrary positive integer sa...  
JP2012533941A
A method for dividing the frequency of a signal using a configurable dividing ratio is disclosed. An input signal with a first frequency is received at clocked switches in a frequency divider with a configurable dividing ratio. Non-clock...  
JP2012253789A
To provide a pulse signal output circuit allowing stable operation and a shift resister including the circuit.A pulse signal output circuit includes first to tenth transistors. The ratios W/L of channel widths W to channel lengths L of t...  
JP5097573B2  
JP2012244290A
To provide a phase comparison circuit that implements phase difference detection at a range of ±180 degrees even if a frequency ratio of input signals is not an integer.The phase comparison circuit comprises: a phase comparison core cir...  
JP5089820B2  
JP5091911B2  
JP5090324B2  
JP2012235290A
To provide a counter circuit which can output correct count rates even if delays are integrated and races are generated, and also provide a sampling correction method for the counter circuit.An embodiment comprises: a counter part 11 to ...  
JP5082952B2  
JP2012529804A
The present invention provides a method and apparatus for clock checking, in order to solve the problem of high resource occupation in existing clock checking methods. The method includes: a programmable device for performing frequency d...  
JP2012227960A
To suppress malfunction of a frequency division circuit.The frequency division circuit includes: a shift register for generating and outputting 2×X (X is a natural number greater than one) pulse signals according to a first or second cl...  
JP2012227959A
To provide a pulse signal output circuit capable of operating stably, and to provide a shift register including the same.In a pulse signal output circuit, channel length of a transistor constituting a node connected to an output terminal...  
JP2012222793A
To provide a variable frequency division device that is compliant with a fast clock signal.A variable frequency division circuit 101 inputs a clock signal Clk_a, and outputs a signal Do1 that is a frequency division of the clock signal C...  
JP5059828B2  
JP2012199797A
To provide a CDR circuit that can be generally used, regardless of the presence or absence of a squelch function of an optical receiver at the pre-stage.A CDR circuit comprises: a G-VCO 14 that outputs a reproduction clock 2 synchronized...  
JP2012195826A
To provide an SSCG circuit including a new fractional PLL circuit eliminating a principle of operation of changing the frequency division ratio of a frequency divider which reduces jitter in an output clock signal.The SSCG circuit includ...  
JP5044719B2  
JP2012191330A
To improve accuracy of a clock signal.A clock signal generation device includes processing sections 31 to 33 for performing correction processing to increase/decrease a first error being a differential value between the first number of c...  
JP5035071B2  
JP5028524B2  
JP2012521669A
A synchronized frequency divider that can divide a clock signal in frequency and provide differential output signals having good signal characteristics is described. In one exemplary design, the synchronized frequency divider includes a ...  
JP2012175319A
To provide a DLL circuit that generates a high precision clock in a small circuit scale and simple design configuration.The DLL circuit includes: a clock generation section 100 for generating, from an externally input operating clock clk...  
JP2012169891A
To provide a counter circuit that performs double precision measurement while using a smaller circuit scale and/or lower power consumption than before.The counter circuit includes: a first circuit for counting pulses in synchronism with ...  
JP5015090B2  
JP5005821B2  
JP4996425B2  
JP4988840B2  
JP4979202B2  
JP4977717B2  
JP2012129643A
To implement a PLL circuit for generating a signal with a slight frequency change while relatively reducing a signal frequency division rate and suppressing an increase in phase noise.A clock frequency control circuit includes: a voltage...  
JP4967400B2  
JP4965866B2  
JP4956434B2  
JP2012113812A
To reduce the power consumption of a shift register unit by reducing a momentary current.The shift register unit includes: an input module which receives a first clock signal, a second clock signal, a frame start signal, a high-voltage s...  
JPWO2010070830A1
異なる周波数のクロックにより動作する回路 との通信において、期待した正しい通信動作 を行うことを可能とするクロック信号を生成 することができる本発明にかかるクロッ...  
JPWO2010070830A
In communication with the circuit which operates with the clock of different frequency, the clock part circumference way concerning the present invention which can generate the clock signal which makes it possible to perform the right ex...  
JP4927301B2  
JP2012085265A
To provide a frequency divider circuit that can extend a variable range of overall circuit division ratio without increasing circuit scale and power consumption.The frequency divider circuit includes: a variable frequency divider (2) for...  
JP2012080343A
To provide a frequency divider that eliminates variations in a duty ratio of an output clock.A frequency divider has: a clock generation circuit that combines first and second trigger clocks having a first phase difference to generate a ...  
JPWO2010050097A1
異なる周波数のクロックにより動作する回路 との通信において期待した正しい通信動作を 行うことを可能とするクロック信号を生成す るクロック分周回路を提供する。本発明...  
JPWO2010050098A1
本発明にかかるクロック分周回路11は、N /Sにより規定された分周比に基づいて、入 力クロック信号のS個のクロック・パルスの うち、(S−N)個分のクロック・パル...  
JPWO2010050097A
The clock part circumference way which generates the clock signal which makes it possible to perform the right communication operation expected in communication with the circuit which operates with the clock of different frequency is pro...  
JPWO2010050098A
Based on the 分周 ratio specified by N/S, clock part circumference way 11 concerning the present invention carries out the mask of the clock pulse for (S*N) 個 among S clock pulses of an input clock signal, and generates the output cl...  
JP2012039296A
To provide a counter circuit where jitters are equivalent to those of a synchronous type counter, the counter circuit making it possible to change the pulse width of the output wave of an output signal.The counter circuit comprises: shif...  

Matches 451 - 500 out of 6,219