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JPH11150473A |
To maintain the control of an internal processing circuit, even while a counter of the internal control circuit of the integrated circuit device continues to count. A flip-flop 9 is provided to an output of a counter 6 to latch a counter...
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JPH11145802A |
To provide a clock generating circuit which has changing frequency and phase. This circuit has an oscillation circuit 1 for generating a reference clock, frequency dividing circuit 2 for outputting a first frequency-divided clock CLK 1 o...
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JPH11127075A |
To realize a digital phase difference detection circuit where a data read timing is not restricted even when a phase difference of two waves is close to 360° in the digital phase difference detection circuit that detects a phase differe...
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JP2889006B2 |
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JPH11122097A |
To completely synchronize clock edges of clock waveforms of differing frequencies by composing a count value hold part of a sequential circuit, which latches data with both leading and trailing edges of an input clock. An (n+1)-bit subtr...
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JPH11112332A |
To set time until a first synchronous clock is outputted from the prescribed edge of an external synchronizing signal to be almost constant even in any case. When the external synchronizing signal becomes a prescribed level, a first coun...
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JPH11110065A |
To provide the internal clock signal generating circuit which generates a multiple internal clock signal in phase synchronism with an external clock. A selector 20 selects the external clock signal and the internal clock signal outputted...
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JPH1196785A |
To optimize a pulse width required for wiring and erasing of a flash memory and the like using A×2B system in accordance with dispersion of a threshold voltage characteristic of a non-volatile memory cell. This device is provided with a...
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JPH1198008A |
To keep logical amplitude constant and to perform a frequency dividing operation in entire high and low current areas by suppressing the reduction of logical amplitude caused accompanying the drop of control current with limit amplifiers...
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JPH1188151A |
To prevent run out synchronizing by supplying reset signals from the counters of preceding stages, which are outputted from gate circuits, to the clear terminals of the counters of the succeeding stages when the reset signals from the pr...
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JP2874836B2 |
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JP2871560B2 |
The invention is directed to the realization of a pi /2 phase shifter that provides accurate operation and moreover enables a reduction in current consumption. Such a pi /2 phase shifter is constructed from a 1/2-frequency divider employ...
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JPH1174782A |
To provide a counter circuit capable of preventing count data from being erased by holding the count data until it is read from a register after the count data is stored in the register from the counter circuit. This counter circuit is p...
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JPH1168554A |
To provide a counter that enables a high-speed operation and can reduce power consumption at the time of a slow-speed operation. A programmable counter 14 is equipped with a high-speed counter part 14a, a low-speed counter part 14b and a...
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JPH1168552A |
To automatically make a flip-flop circuit in non-frequency division mode capable of being pulled in frequency division mode. This circuit 100 is equipped with (n) number of flip-flop circuits F1 to Fn, which are cascade-connected, so tha...
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JPH1168526A |
To divide a reference clock signal with an arbitrary frequency division ratio, to generate a signal having the same frequency as a reference clock signal while keeping synchronization with a frequency divider clock signal and to realize ...
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JP2867134B2 |
PURPOSE:To increase the upper limit of a clock frequency more by dividing a conventinoal numerical control oscillator into plural numbers and decreasing the number of digits of an adder in each split numerical control oscillator to decre...
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JP2853894B2 |
A frequency divider includes three or more master-slave type flip-flop's (10,20,30) which are connected to each other to construct a 1/N frequency divider, in which two or more outputs whose periods are the same but phases are different ...
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JPH1127108A |
To provide an output of input data with different synchronization and received synchronously with a clock signal by providing an output of the input data in a prescribed timing synchronously with a prescribed clock signal and deviating a...
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JPH1127109A |
To reduce a circuit area and a test time in the case of conducting a scanning test by latching input data synchronously with a prescribed clock signal and selecting a latch operation or a through-buffer operation of a through- buffer. Wi...
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JPH1127139A |
To simplify the circuit with a small scale by employing a counter a humming distance of two consecutive count outputs of which is always the unity for the counter that counts a count to be transferred to transfer the counts in parallel a...
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JP2850002B2 |
An electronic counter such as for use in the odometer of a motor vehicle is provided comprising an array (10) of m rows and n columns of single flip-flop data latches and a central shifting unit (14). The central shifting unit (14) compr...
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JPH1117527A |
To prevent count processing of wrong data and also to shorten the lockup time by producing a load signal for a counting operation even to the load enable signal which fetches the data. A load enable signal LE is kept at an H level for a ...
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JPH1117528A |
To reduce the load on a CPU and also to eliminate such a defective case where the desired output can not sometimes be obtained by performing the interrupt processing that is so far executed in terms of software by a CPU by means of hardw...
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JPH1116345A |
To reduce the number of transistors to save the area occupied by a semiconductor memory device of a counter circuit by forming at least one register in the counter circuit with a dynamic register. Registers 11 to 15 are respectively regi...
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JPH1117526A |
To provide an up/down conversion counter where the circuit integration is enhanced regardless of reducing the number of gate elements more than that of a conventional up/down conversion counter. Signals outputted respectively from positi...
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JP2847604B2 |
An IC according to the present invention contains a counter, which includes a plurality of incomplete coincidence detection circuits each associated with a different one of a corresponding number of flip-flops storing respective bit data...
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JPH118550A |
To provide a frequency divider with which a frequency dividing ratio of an arbitrary multiple of '2' can be provided and only a noise having the only double frequency of the frequency of an input signal is generated irrespective of the f...
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JPH118549A |
To provide a counter circuit with which a correct counter value can be read out, without stopping a counter and high-speed processing is enabled. Each time a counter clock CLK is inputted, the counter value of counter is updated. Each fl...
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JP2843526B2 |
PURPOSE: To improve the propagation speed of a carry signal by a synchronizing counter constituted of the multi-stage organization of unit counters. CONSTITUTION: Each unit counter 80 is provided with a multiplexer 60 for selectively tra...
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JPH114160A |
To frequency-divide an input clock by n/m ((n) and (m) are set to be arbitrary natural numbers and it is set to be n
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JPH113134A |
To easily deal with a change in the clock frequency of clock signal generated by a clock generator. A 1st IC 21 inside a semiconductor chip kit SCK is provided with a clock frequency converting circuit 30. An input clock signal CK1 at pl...
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JP2843563B2 |
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JP2588270Y2 |
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JPH114162A |
To provide a clock dividing device which can optionally adjust the dividing ratio, duty and phase and can generate a dividing clock. The count value of a counter 1 is compared with the Hi and Low set values inputted from the terminals 7 ...
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JP2588271Y2 |
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JP2840905B2 |
A comparator is provided in the counter circuit to compare the counted value of clocks by a counter with the value of a register in which a target changing value of a comparison register which sets a value to be compared with the counted...
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JP2840898B2 |
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JPH10336018A |
To provide a PLL circuit which can switch the frequency of its output signal at a high speed in short periods. A latch circuit 2 latches parallel signals Data inputted from the outside based on a latch signal LEC and outputs the latched ...
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JP2838596B2 |
A high-speed counter capable of counting the number of randomly incoming pulses is constructed by serially connecting a plurality of toggle flip-flop circuits, each of which is activated by input pulses and constructed from an rf-SQUID a...
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JP2838878B2 |
PURPOSE:To prevent the shape of the leading edge of the frequency division output of a second frequency division circuit from being set differently at every cycle by offsetting the change of a current on an output buffer by the influence...
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JP2836816B2 |
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JPH10322194A |
To increase the basic clock frequency and to reduce the power consumption by using a means which generates two 1/N divided clocks having their phases shifted from each other by an N/2 basic clock period, based on two output timings of an...
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JP2829965B2 |
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JPH10313249A |
To provide a frequency divider that is in use for a microwave band of 10 GHz or over and the oscillator using the frequency divider with high C/N. The frequency divider is provided with a sampling phase detector 20 that compares a phase ...
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JP2824121B2 |
An improved dynamic frequency divider circuit is disclosed. A DC voltage generating circuit (10) generates a DC voltage (Vcon) having a level the same as a threshold voltage of an inverter. A voltage application circuit (41) supplies a v...
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JP2584320Y2 |
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JP2818409B2 |
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JPH10510972A |
Self-oscillation of a prescalar circuit is avoided by including offset generators on the inputs of the prescalar circuit. This ensures that when the transistors in one differential pair in the prescalar circuit transition from ON to OFF,...
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JPH10276083A |
To selectively generate the even-numbered frequency division clocks and odd-numbered frequency division clocks of a duty factor 50% practically in a simple circuit suitable for being made into an IC by validating a first logic circuit co...
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