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Matches 351 - 400 out of 6,237

Document Document Title
JP2015520985A
The present invention relates to a generation method of a digital signal in which frequency regulation is possible. This method includes specifying numerals reversal in quest of numerals of the 1st difference between generating the 1st p...  
JP2015099629A
To provide a semiconductor device that achieves better operation.A semiconductor device comprises a first transistor and a second transistor electrically connected to a gate of the first transistor. The first transistor has a first termi...  
JPWO2013098899A
The shift register (1) of the present invention is provided with the unit circuit (10) by which multi stage connection was made, and a unit circuit (10) is, The last buffer part (40) provided with the output transistor (41) and the outpu...  
JPWO2013098899A1
本発明のシフトレジスタ(1)は、多段接続 された単位回路(10)を備え、単位回路( 10)は、出力トランジスタ(41)及び出 力トランジスタ(42)を備えた最終バ...  
JP2015053696A
To provide a frequency division circuit that suppresses a malfunction.The frequency division circuit includes a shift register for outputting 2×X pulse signals (X is a natural number of two or greater) generated according to a first or ...  
JP2015053638A
To provide a synchronization system that prevents the occurrence of a timing violation due to a clock skew between a frequency division circuit and a first device.The synchronization system includes: the frequency division circuit for fr...  
JP2015043575A
To provide a pulse signal output circuit capable of stably operating and a shift register including the pulse signal output circuit.A pulse signal output circuit includes first to tenth transistors. The ratios W/L of a channel width W to...  
JP2015043536A
To provide a fractional frequency divider circuit capable of reducing undesired tone with a simple constitution.There is provided a fractional frequency divider circuit which has an integer frequency division circuit and an adjustment ci...  
JP5672092B2  
JP2015504638A
In order to generate a rectangular signal, a device for 分周 (ing) frequency by 1.5 is indicated. A device receives a difference input signal which has the 1st frequency and two phases, and contains a counting-down circuit which makes ...  
JP2015019343A
To provide a fractional frequency division circuit that reduces jitter by arranging clock edges less unevenly.A fractional frequency division circuit 10 includes: a down counter 20 for dividing the frequency of an input clock by 1/CTS; a...  
JP5657844B1
In order to generate a rectangular signal, the device for 分周 (ing) frequency by 1.5 is indicated. A device receives the difference input signal which has the 1st frequency and two phases, and contains the counting-down circuit which ...  
JP5654196B2  
JP5654908B2  
JP5647180B2  
JP5636327B2  
JP2014197680A
To reduce current consumption in a frequency dividing circuit; and especially reduce current consumption in a multistage frequency dividing circuit.In a multistage frequency dividing circuit 100, a frequency of an input signal is higher ...  
JP2014180004A
To provide a method for dividing a frequency of a signal using configurable dividing ratio.An input signal with a first frequency is received at clocked switches in a frequency divider 842 with a configurable dividing ratio. Non-clocked ...  
JP2014525182A
Based on a high-speed clock period when it drives with a high-speed clock signal or a low-speed clock signal, a share real-time counter is constituted so that an exact counter output may be supplied. A combination logic circuit provides ...  
JP2014168139A
To provide a semiconductor integrated circuit device that can transfer data between flip-flops without stopping data processing when switching between the flip-flops.According to an embodiment, the semiconductor integrated circuit device...  
JP5586399B2  
JP5579099B2  
JP5571185B2  
JP2014139856A
To suppress deterioration of transistors.An embodiment of the invention includes a first period and a second period. In the first period, a first transistor and a second transistor are alternately and repeatedly turned on and off, and a ...  
JP2014135550A
To generate a clock signal of 256 fs having a constant time interval from a signal rise to the next signal rise from a clock signal of 192 fs.An input clock signal CK1 with a constant duty ratio is doubled in frequency to generate a cloc...  
JP5557905B2  
JP2014123973A
To provide an injection-locked frequency divider and a PLL circuit which implement a wide band of operating frequency by reducing the influence of parasitic capacitance.An injection-locked frequency divider 100 includes: a ring oscillato...  
JP5530687B2  
JP5524416B2  
JP5522050B2  
JP5524216B2  
JP5516299B2  
JP5521061B2  
JP2014107793A
To provide a counter device and a counting method that use a small capacity FIFO.The counter device includes a first counter for counting up lower bits of a count value; the FIFO for relaying a carry caused when the first counter finishe...  
JP5512816B2  
JP2014099238A
To provide a counter circuit capable of rightly counting a high frequency signal in which hazard or the like may easily occur.A counter circuit comprises: a frequency divider circuit 100 for generating frequency-divided clocks LCLKE and ...  
JP5494858B2  
JP5488470B2  
JP5493591B2  
JP5494063B2  
JP2014086951A
To implement a high frequency operation and generate a high precision frequency-divided pulse.A frequency-divided pulse generation circuit 11 for dividing the frequency of a clock CK to be frequency-divided to generate a frequency-divide...  
JP2014510439A
A series of 2 / 3-minute circumference cell which uses the extended 分周 range, and 1-/the counting-down circuit based on a circumferential cell by 2/3/are indicated. This counting-down circuit 分周 input frequency correctly with thi...  
JP2014510467A
A single stage divider suits so that it may operate on very high frequency. (For example, frequency of about 120 GHz) A difference input signal (INP, INM) is divided by divider (100), and a differential output signal (OUTP, OUTM) of stil...  
JP2014068154A
To provide a counter circuit that can correct a malfunction of the counter circuit in a simple configuration.The counter circuit for counting a predetermined time includes: a pair of data holding circuits FF1, FF2 for receiving and holdi...  
JP5466860B2  
JP5456275B2  
JP2014049808A
To provide a frequency synthesizer that implements phase difference control between high frequency signals generated from fractional PLL synthesizers operating in parallel in a simple configuration.First and second shift register circuit...  
JP5438055B2  
JP5407087B1
[Subject] Deviation arranges clock edge few and it provides a fraction part circumference way which can make Gitta small. [Means for Solution] Fraction part circumference way 10 of the present invention is provided with the following. Do...  
JP5407087B1
[Subject] Deviation arranges clock edge few and it provides a fraction part circumference way which can make Gitta small. [Means for Solution] Fraction part circumference way 10 of the present invention is provided with the following. Do...  

Matches 351 - 400 out of 6,237