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Matches 1 - 50 out of 20,565

Document Document Title
WO/2024/060469A1
A flip-flop circuit (100) and an electronic device. The flip-flop circuit (100) comprises a plurality of signal inverting elements (1), wherein a substrate of a P-type transistor (MP) of each signal inverting element (1) is corresponding...  
WO/2024/063683A1
Level shifting circuitry comprising toggle circuitry having a toggle input and a toggle output, the toggle circuitry being configured to alternate an output voltage at the toggle output between a logic low and a logic high for the second...  
WO/2024/064455A1
A system includes a receiver. The receiver includes an input stage having an input and an output, and a first resistor coupled between the output of the input stage and the input of the input stage. The receiver also includes an output s...  
WO/2024/056576A1
According to an aspect, there is provided a swing-boosted differential oscillator and a method for trimming the oscillator. The oscillator comprises a switch (110) for connecting a set of capacitors (C1, C2) alternately to power supply a...  
WO/2024/056578A1
According to an aspect, there is provided a swing-boosted differential oscillator (500) and a method for trimming the oscillator. The oscillator comprises a switch (110') for connecting a set of capacitors (C1, C2) alternately to power s...  
WO/2024/056624A1
Energy refeeding module (15) for a switching circuit (101) with a switching unit (24) configured to be connectable to a DC voltage source (V1) and to deliver at its output (OUT) one or a combination of the following features: iv) high va...  
WO/2024/055578A1
Disclosed in the present invention are a pulse power amplification method and a standard cell. The key points of the technical solution are that: according to the present invention, a light amplification by stimulated emission of radiati...  
WO/2024/052585A1
An AQFP circuit (202) comprises a Josephson junction (302) having a respective plasma frequency, a clocking signal line, an inductive coupler (307-310) between said clocking signal line and said Josephson junction, and a data signal line...  
WO/2024/050169A1
An integrated circuit (IC) including a first ring oscillator (RO) including a first set of cascaded stages, wherein each of the first set of cascaded stages comprises a first logic inverter (400), including: a first set of field effect t...  
WO/2024/045291A1
Embodiments of the present disclosure provide a one-shot circuit. The one-shot circuit comprises: a main one-shot circuit and a masking time window circuit. The main one-shot circuit is configured to receive, by means of a NOR gate, an i...  
WO/2024/042135A1
According to an aspect, there is provided a relaxation oscillator (100) comprising first (101, 11) and second (102, 12) current sources and a comparator (103) having a first input (103-) connected to the first current source, a second in...  
WO/2024/041437A1
A differential latch circuit, a switch driver, and a digital-to-analog conversion circuit. The differential latch circuit comprises: a first-stage differential latch circuit (I), a second-stage differential inverting circuit (II), and a ...  
WO/2024/034734A1
The present invention relates to a NAF memory device in which a NAND flash memory and a flip-flop are coupled together, and an operating method thereof, wherein, by configuring a NAF memory in which a flip-flop is fused to a NAND memory ...  
WO/2024/033742A1
The present invention provides a novel signal output circuit. The present invention provides a shift register which has a signal output circuit that comprises a vertical channel transistor. The present invention enables the achievement o...  
WO/2024/030162A2
Pulse-generator-based reciprocal quantum logic (RQL) bias-level sensors are fabricated on an RQL integrated circuit (IC) to sample AC or DC bias values provided to operational RQL circuitry on the RQL IC. The bias-level sensors include p...  
WO/2024/023164A1
A comparator (10) comprises an input stage (IS), configured to receive a pair of input signals (S1, S2) to generate at least one differential current signal (S3). The comparator (10) further comprises an output stage (OS) configured to g...  
WO/2024/016951A1
The present invention relates to a duty cycle adjuster, comprising: a first duty cycle adjustment (DCA) module, wherein the first DCA module comprises M adjustment units, which are connected in parallel, each adjustment unit comprises an...  
WO/2024/012032A1
Provided in the present invention is a dynamic D flip-flop (100), comprising an input end (D), an output end (Q), a clock signal end (CLK1, CLK2), a first latch unit (101), a second latch unit (102) and an output driving unit (103), wher...  
WO/2024/011911A1
The present application relates to a pulse generation circuit, a pulse generator, and a medical device. The pulse generation circuit (10) comprises: a control circuit (100), a high-voltage power supply circuit (210), an operation power s...  
WO/2024/012250A1
The present application provides a logic control circuit, a trigger, and a pulse generation circuit. The logic control circuit comprises: a first MOS transistor, a second MOS transistor, a third MOS transistor and an output circuit; a fi...  
WO/2024/012031A1
The present invention provides a dynamic latch, comprising an input end used for inputting first data; an output end used for outputting second data; a clock signal end used for providing a clock signal; a data transmission unit for tran...  
WO/2024/011738A1
Provided in the present disclosure are a sense amplifier circuit and a flip-flop. The sense amplifier circuit comprises: a charging module which is configured to charge a setting signal node and a reset signal node according to a clock s...  
WO/2024/011705A1
A voltage-controlled oscillator, comprising M delay units, wherein the M delay units are annularly connected in series to form an M-stage delay circuit, and each delay unit comprises: an output module comprising a positive output node an...  
WO/2024/009363A1
The pulse generation circuit according to the present disclosure comprises: a switch which is capable of delivering a first current discharged from a first capacitor, which has been charged, to the primary-side winding of a saturable tra...  
WO/2024/006869A1
A bipolar high voltage bipolar pulsing power supply is disclosed that can produce high voltage bipolar pulses with a positive high voltage pulse greater than about 2 kV followed by a negative high voltage pulse less than about -2 kV with...  
WO/2023/247516A1
The invention relates to a method for generating a pulse width modulation signal that alternates from a first state, having a first specified period duration (T1), to a second state, having a second specified period duration (T2), the pu...  
WO/2023/250032A1
Technologies and implementations for a wake-up circuit. The wake-up circuit may be configured to reduce a peak value of current draw during waking up of an electronic device. The reduction of the peak value of current draw facilitates a ...  
WO/2023/249966A1
A latch for a flip-flop or other circuit which requires fewer signal inputs than prior latch designs to reduce power consumption. The latch comprises a first transistor set is switching element and is configured to receive clock signals ...  
WO/2023/235175A1
Techniques are described herein to enhance capability of floating level translators (100). For example, increased headroom is accomplished by adaptively bypassing the protection elements (309, 310) of the voltage level translator (100). ...  
WO/2023/231143A1
The present application relates to a delay measurement circuit and a control method therefor. A control link module is configured to have an input terminal connected to an output terminal and is used for, according to a received first en...  
WO/2023/231658A1
Disclosed in the present invention is a bidirectional colored lamp having serial-parallel power line pulse signal-triggered operations, comprising: a power line pulse-triggered bidirectional light-emitting lamp string, a first controllab...  
WO/2023/224937A1
Reconfigurable device components such as look up tables (LUT), D-flip flop registers and internal switch designs for programmable array of logic (PLA), programmable logic array (PLA), programmable logic device (PLD), complex PLD (CPLD), ...  
WO/2023/221252A1
Disclosed in the present invention is a pulse voltage generation apparatus having an adjustable pulse width. The apparatus comprises: a switch control circuit, which is used for generating a control signal; a clock generation circuit, wh...  
WO/2023/216171A1
A clock buffer circuit (1000). The clock buffer circuit (1000) comprises a loop oscillator (1100); the loop oscillator (1100) comprises an input end for receiving a first clock signal, an output end for outputting a second clock signal, ...  
WO/2023/207339A1
The present disclosure relates to a D flip-flop, a processor comprising the D-flip flop, and a computing apparatus. Provided is a D flip-flop, comprising: an input stage, which is configured to receive a flip-flop input; an output stage,...  
WO/2023/207586A1
A circuit unit, a logic circuit, a processor, and a computing device. The circuit unit comprises: an output end; an output stage used for providing an output signal to the output end; a first node, an input of the output stage being conn...  
WO/2023/207587A1
The present disclosure relates to a D flip-flop having a multiplexer function, comprising: a first transmission gate, a data input end of the first transmission gate being configured to receive a first data signal, a clock input end of t...  
WO/2023/207351A1
The present invention relates to a latch and a processor comprising the latch, and a computing device. Provided is an inverted output latch, comprising: an input stage configured to receive a latch input; an output stage configured to ou...  
WO/2023/206658A1
A signal generator (100) and a memory. The signal generator comprises: an oscillation generation module (101), which is configured to generate an initial oscillation signal on the basis of an oscillation control signal, wherein the oscil...  
WO/2023/196707A1
According to one aspect of the disclosure, a system for performing quantum computations includes: a first environment for being maintained at an ambient temperature, having a classical computing processor; and a second environment for be...  
WO/2023/186293A1
A clock generator circuit, comprising a gate having a first input electronically connected to an output of a first delay path circuit of another clock generator circuit and a second input electronically connected to an output of a second...  
WO/2023/178005A1
One or more examples relate to voltage level shifting. An example apparatus (100) may include first and second inputs (102, 104), an output (106), and a circuit. The first and second inputs may receive compliments (VIN+, VIN-) of a signa...  
WO/2023/174647A1
An oscillator circuit is disclosed. The oscillator circuit comprises a first integrator unit (100), a second integrator unit (200), and a third integrator unit (300). The oscillator circuit also comprises a chopped comparator unit (400) ...  
WO/2023/173532A1
A ring oscillator and a test method, which belong to the technical field of reliability testing. The ring oscillator comprises a first logic gate (10), a second logic gate (20) and a switching circuit (30). The first logic gate (10) is c...  
WO/2023/170234A1
The invention relates to a superconducting microwave quantum circuit comprising a controllable-energy Josephson junction element (8) connected to a linear passive circuit portion (6) exhibiting multiple resonant modes, wherein the Foster...  
WO/2023/172297A1
An active inductor modulator circuit is provided. The active inductor modulator circuit may include a circuit to receive an input signal and provide an output signal at an output terminal of the circuit based on a clock signal, a modulat...  
WO/2023/161509A1
High-power- (HP-) generator (10) and method to deliver pulsed high power with a high value of voltage and/or high current value to a capacitive load, in particular to a plasma process, comprising: - several low-power- (LP-) generators (1...  
WO/2023/161511A1
High-power- (HP-) generator (10) and method to deliver pulsed high power with a high value of voltage and/or high current value to a capacitive load, in particular to a plasma process, comprising: - several low-power- (LP-) generators (1...  
WO/2023/161501A1
High-power- (HP-) generator (10) and method to deliver pulsed high power with a high value of voltage and/or high current value to a capacitive load, in particular to a plasma process, comprising: - several low-power- (LP-) generators (1...  
WO/2023/160047A1
Provided in the present application are a register, a central processing unit and an electronic device. The register comprises a first latch, a second latch and a logic gate, wherein an input end of the first latch is connected to a cloc...  

Matches 1 - 50 out of 20,565