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Matches 551 - 600 out of 26,882

Document Document Title
WO/2014/028302A2
Systems and methods are provided for applying flux to a quantum-coherent superconducting circuit. In one example, a system includes a long-Josephson junction (LJJ), an inductive loop coupled to the LJJ and inductively coupled to the quan...  
WO/2014/008001A1
An oscillator is disclosed that can generate an oscillation signal using a latch and two delay elements. For some embodiments, the oscillator includes an SR latch, a first delay element, and a second delay element. The SR latch has a fir...  
WO/2014/006447A1
A phase switchable bistable memory device comprising a bistable memory component and a phase switching component is described. The bistable memory component comprises a bistable memory stage arranged to receive an input signal and a stat...  
WO/2014/006437A1
A digital sample clock generator (SCG) for generating a sample clock signal (SCLK) from an input signal (FD) derived from a drive measurement voltage signal (DMV) of a vibrating MEMS gyroscope (VMEMS) is described. The sample clock gener...  
WO/2014/004053A1
Disclosed is a differential clock signal generator (100) which processes a first differential clock signal (101) using a combination of differential and non-differential components to generate a second differential clock signal (111). Sp...  
WO/2013/191816A1
Various embodiments of a thermal control methodology and apparatus are disclosed. In one embodiment, an integrated circuit includes one or more thermal sensors, comparison circuitry, and control circuitry. The comparison circuitry is con...  
WO/2013/192327A1
Temperature-independent delay elements and oscillators are disclosed. In one design, an apparatus includes at least one delay element, a bias circuit, and a current source. The delay element(s) receive a charging current from the current...  
WO/2013/184596A1
One example embodiment may include a power supply system. The power supply system may include a main capacitor and a boost converter. The main capacitor is used to generate an electrical pulse. The boost converter is configured to be cou...  
WO/2013/177759A1
A CMOS D-type flip flop (D-FF) exhibits reduced power consumption by selectively disabling certain charging/discharging operations at specific circuit elements to minimize the capacitance of the circuit's internal nodes using a partial s...  
WO/2013/171479A1
A phased-array RF pulse generator(90), comprises a video-pulse generator(20)arranged to generate video pulses (60) each having a leading edge. An array of nonlinear and dispersive transmission lines(130a-c), are arranged to generate RF p...  
WO/2013/124178A3
The present invention relates to a high voltage switch circuit, comprising an input port adapted to receive a pulse type input current and an output port, which can be used selectively to conduct an output current to a corresponding elec...  
WO/2013/169524A1
A clock generator is disclosed for use with an oscillator device. The clock generator may include a signal conditioning pre-filter and a comparator. The signal conditioner may have an input for a signal from the oscillator device, and ma...  
WO/2013/164221A1
A sampling device (2) comprising a first input port (4) and a second input port (5), wherein an input-signal is fed to the first input port (4) and wherein an optical clock signal is fed to the second input port (5). The sampling device ...  
WO/2013/156821A1
An oscillator circuit (1) for providing an output clock signal (CLK) is described. The oscillator circuit comprising a voltage reference (Vref), a first current source (11), a first capacitor (12), a first capacitor switch (13), a second...  
WO/2013/157206A1
In this semiconductor integrated circuit, a clock generating circuit (50) and an internal circuit (30) comprising a transistor (11) are formed on a semiconductor substrate (10) of a first conductivity type. The clock generating circuit (...  
WO/2013/153483A1
The present invention relates to a high voltage pulse generator (1) which can operate for a long time and has high pulse frequency. In the preferred embodiment of the invention, the air stored in the air container (13) is transmitted to ...  
WO/2013/155352A1
A frequency divider circuit having two stages of transistors has improved performance at low supply voltages. The circuit may include cross-coupled PMOS (112a, 112b) and NMOS transistors (114a, 114b), in which the input signal to be freq...  
WO/2013/149450A1
Disclosed is a PWM circuit, comprising: a PWM counter, a reference value setting register, a frequency multiplier, and a comparator. The frequency multiplier is used for improving a frequency of an input clock signal and outputting the f...  
WO/2013/144350A1
The present invention relates to a current generator (10) comprising a plurality of secondary stages (20). Each secondary stage comprises a DC voltage source and a switching circuit, comprising four switches, connected together so as to ...  
WO/2013/141863A1
Described herein is apparatus and system for a digitally controlled oscillator (DCO). The apparatus comprises a voltage regulator to provide an adjustable power supply; and a DCO to generate an output clock signal, the DCO including one ...  
WO/2013/141837A1
Described herein is a self-biased oscillator. The self-biased oscillator comprises a first differentiator with adjustable resistance or capacitance, the first differentiator having an output node and an input node; and a second different...  
WO/2013/109424A3
Circuitry is presented for use in the pulse-forming lines of compact linear accelerators of charged particles. This presents devices that can provide high-voltage radio-frequency pulses in the range of from a few volts to megavolts for c...  
WO/2013/135088A1
An auxiliary convertor comprises an auxiliary power unit (1), a current detection unit (2), a voltage transformation unit (3), a filtering unit (4), an output voltage detection unit (5) and an auxiliary control unit (6). The auxiliary po...  
WO/2013/132806A1
[Problem] If ECC circuits are provided for respective registers, the circuit scale will increase and further, not only the area cost but also the power consumption will increase. The objective of the invention is to arrange that error co...  
WO/2013/131030A1
A wide frequency, low voltage oscillator includes multiple delay elements, in which each delay element (300) includes two inverters (204, 208) coupled through a latching element (212) into a differential-type configuration. Two current-s...  
WO/2013/125557A1
A communication apparatus comprises: a data line which is connected to another communication apparatus, i.e., the other end of communication and via which a pulse signal is transmitted in two-way communication; a measurement unit that me...  
WO/2013/120361A1
Provided are a synchronization signal processing method and device, which relate to the technical field of power supplies and solve the problems of lower accuracy and lower speed when performing a synchronization operation on synchroniza...  
WO/2013/123427A1
Clock and data recovery (CDR) circuits and resettable voltage controlled oscillators (VCOs) are disclosed. In one embodiment, the CDR circuit includes a sampler configured to receive a data stream in a data path and sample the data strea...  
WO/2013/118000A1
A duty cycle adjustment circuit includes a clock signal input node; a clock signal output node; a control voltage circuit coupled to the clock signal input node; and a first inverter configured to receive an inverter input signal compris...  
WO/2013/063021A3
A hysteretic power converter (100) constituted of: a switched mode power supply (40); a hysteretic comparator (20), a first input (FB) of the comparator arranged to receive a feedback signal providing a representation of the output volta...  
WO/2013/026040A8
Embodiments provide systems and methods for dynamically regulating the clock frequency of an integrated circuit (IC) based on the IC supply voltage. By doing so, the clock frequency is no longer constrained by a worst-case voltage level,...  
WO/2013/102902A1
A method of generating a patterned pulse. The method comprises charging a plurality of capacitor units with a plurality of charges, and sequentially coupling the plurality of charged capacitor units to at least one electrical regulator s...  
WO/2013/058848A3
A Multi-Cycle Digital High Power Microwave (MCD-HPM) source includes a microwave transmission line (MTL) to which a plurality electrically charged thin film transmission lines (TFTL's) are connected by switches. The switches are activate...  
WO/2013/099121A1
In this CR oscillation circuit, resistance elements configuring a series circuit comprise a first resistance element with a significant temperature coefficient of resistance, and a second resistance element with a temperature coefficient...  
WO/2013/099114A1
In a successive approximation type A-D converter, a noise generator (6) outputs the output of ΔΣ modulators (6a-6c) as noise signals (ds1-ds3). A selector circuit (9) is able to output, to capacitance elements (c5-c7) of a capacitance ...  
WO/2013/097299A1
A device and method for use in alternating-voltage pulse output. The device comprises: a direct current voltage-regulated power supply (PS), multiple solid-state switches (Q?), multiple triggers corresponding to the multiple solid-state ...  
WO/2013/095327A1
Embodiments provide a multi-phase voltage controlled oscillator (VCO) that produces a plurality of output signals having a common frequency and different phases. In one embodiment, the VCO may include a passive conductive structure havin...  
WO/2013/087618A1
The present invention relates to a device for generating modulated noise signals. Said device has at least one avalanche diode (Q2, Q4) which is arranged in such a manner that said diode is reverse-biased during operation of the device a...  
WO/2013/085695A1
Duty cycle error vectors that indicate both the magnitude and direction of the duty cycle error relative to a desired duty cycle are generated within a duty cycle measurement circuit, enabling threshold-based determination of whether dut...  
WO/2013/076928A1
The nonvolatile latch circuit (100) according to the present invention is equipped with: a latching operation unit in which outputs of cross-coupled inverters (20, 21) are connected together via a series circuit which is constructed with...  
WO/2013/073268A1
A latch circuit (1) is equipped with: a PMOS transistor (10), the drain of which is connected to a first output node and the gate of which is connected to a second output node; a PMOS transistor (12), the drain of which is connected to t...  
WO/2013/071274A1
A circuit includes a first path including a first transistor and a first current source. The first transistor is responsive to a tuning voltage. The circuit also includes a tuning voltage range extension circuit responsive to the tuning ...  
WO/2013/068546A1
A device for generating true random numbers by way of a quantum optic process, the device comprising: a light source for generating at least one single-photon within a light beam; and at least two detectors each for detecting single-phot...  
WO/2013/065106A1
Provided is a turn-signal-light control device that can reduce the visibility of a turn-signal light, comprising LED elements, that is lit due to a leakage current flowing through a turn-signal switch. Said turn-signal-light control devi...  
WO/2013/065108A1
Provided is a turn-signal-light control device with a simple architecture that, with minimal increase in the cost of the device and minimal degradation of characteristics, can reliably flash LED elements serving as turn-signal lights. Sa...  
WO/2013/066143A1
The invention relates to a reconfigurable element based on (chaotic) nonlinear dynamics, which is designed to be used in three different multivibrator configurations. A nonlinear dynamic system, under parametric modulation control, opera...  
WO/2013/062595A1
A metal-insulator phase transition (MIT) flip-flop employs a selected one of a pair of bi-stable operating states to represent a logic state of the MIT flip-flop. The MIT flip-flop includes an MIT device having a current-controlled negat...  
WO/2013/061488A1
A semiconductor device is provided with a latch circuit (1). The latch circuit (1) comprises: a sampling part (10) which latches a differential input signal which is applied from differential input nodes (SINB, SIN) to gates of different...  
WO/2013/058848A2
A Multi-Cycle Digital High Power Microwave (MCD-HPM) source includes a microwave transmission line (MTL) to which a plurality electrically charged thin film transmission lines (TFTL's) are connected by switches. The switches are activate...  
WO/2013/055511A1
Circuits and methods for full rate data reception and transmission using half-frequency clock signals are disclosed. In one embodiment, a flop circuit includes a data input, a data output, and a clock input. The clock signal has a first ...  

Matches 551 - 600 out of 26,882