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Matches 201 - 250 out of 26,711

Document Document Title
WO/2017/200718A1
An integrated circuit (IC) is disclosed having a unified control scheme and a unifying architecture for different types of retention flip-flops (RFFs). In an example aspect, an IC includes a constant power rail to provide power during a ...  
WO/2017/193594A1
A PWM circuit duty ratio adjustment method and system for a blood pressure measurement apparatus. The PWM circuit duty ratio adjustment method for a blood pressure measurement apparatus comprises the following steps: when a blood pressur...  
WO/2017/195614A1
The present invention relates to an oscillation circuit, an oscillation method, and a PLL circuit, whereby reduced power consumption and suppression of jitter (phase noise) degradation can be achieved at the same time. The oscillation ci...  
WO/2017/192059A1
A device for generating a high pulse voltage comprises a source of high constant voltage (1), an inductive load (2), two controllable switching devices (6) and (41), a controllable switch (25), and also, connected in series, a capacitor ...  
WO/2017/189806A1
A microelectromechanical resonant switch ("resoswitch") converts received radio frequency (RF) energy into a clock output. The resoswitch first accepts incoming amplitude- or frequency- shift keyed clock-modulated RF energy at a carrier ...  
WO/2017/185070A1
Methods and systems are described for receiving a sampling signal, pre-charging a pair of output nodes prior to a sampling interval, initiating the sampling interval by enabling a current source according to a first transition of the rec...  
WO/2017/177243A1
The invention relates to a code generator, in which a plurality of flip-flops (R1, R2, R3) is interconnected to form a circuit. In addition, feedback is provided, wherein an output (Q) and an input (D) of the flip-flops (R1, R2) are recu...  
WO/2017/180447A1
A superconducting integrated circuit including a clock distribution network (600) for distributing a clock signal in the superconducting integrated circuit is provided. The clock distribution network (600) may include a clock structure h...  
WO/2017/173526A1
A battery charging circuit can produce a pulsed charging current to charge a battery During charging, without disconnecting the pulsed charging current from the battery, EIS measurements can be made. In other words, the pulsed charging c...  
WO/2017/173295A1
In described examples, an integrated circuit IC (100A) provides an improved fail-safe signal (PKEEP2) to a module sharing a fail-safe pin at which a voltage can be greater than a voltage of an upper rail. The IC (100 A) includes: a first...  
WO/2017/172329A1
Disclosed systems and methods relate to a power efficient voltage level translator. In a normal mode wherein a first supply voltage (vdd1) of the first voltage domain and a second supply voltage (vdd2) of the second voltage domain are di...  
WO/2017/172116A1
An input receiver for stepping down a high power domain input signal for a high power domain powered by a high power supply voltage into an output signal for a low power domain includes a waveform splitter. The waveform splitter splits t...  
WO/2017/157625A1
The invention relates to a device (I) and a method for generating a combustible gas from a mass (M), in particular a biomass, using a non-thermal plasma produced in a reactor (3), wherein an electric power supply system (7) that is contr...  
WO/2017/157026A1
Provided is a clock duty-cycle calibration and frequency-doubling circuit, used in the design of a square-wave frequency multiplier and relating to the technical field of integrated circuits, comprising: a gating module (301), which perf...  
WO/2017/160380A1
The present application discloses new approaches to providing passive-off protection for a B-TRAN-like device. Even if the control circuitry is inactive, AC coupling uses transient voltage on the external terminals to prevent forward bia...  
WO/2017/151275A1
A circuit may include a ring oscillator circuit and monitoring circuitry. The ring oscillator circuit has a group of inverters in a loop, whereby the group of inverters includes first, second, and third output nodes. The monitoring circu...  
WO/2017/151260A1
A pulse generator discharge circuit is disclosed. The circuit includes one or more discharge stages, each discharge stage including a plurality of control input terminals. The circuit also includes first and second discharge terminals, a...  
WO/2017/151295A1
An oscillator circuit having a programmable output frequency may include a first delay section having a negative gain and a variable delay that is set by a control signal provided to the first delay section. A second delay section having...  
WO/2017/147895A1
In one example, an apparatus may be a flip-flop that includes a slave latch and a master latch. The master latch includes a first logic element in the master latch. The first logic element includes a first transistor. The first transisto...  
WO/2017/151301A1
A method of generating a bandgap voltage in an electronic circuit includes generating a bandgap current. The method further includes operating the electronic circuit using the bandgap voltage and the bandgap current. The operating can be...  
WO/2017/149978A1
[Problem] To provide a ring oscillator capable of controlling frequency according to the delay amount of a delay element, with a structure for which fine-level frequency setting is possible. [Solution] A reference signal generation devic...  
WO/2017/151261A1
A sub-microsecond pulsed electric field generator is disclosed. The field generator includes a controller, which generates a power supply control signal and generates a pulse generator control signal, and a power supply, which receives t...  
WO/2017/151293A1
In one example, the apparatus includes a first AND gate, a second AND gate, a first NOR gate, a second NOR gate, a third NOR gate, a first inverter, and a second inverter. The first AND gate output is coupled to the first NOR gate first ...  
WO/2017/146650A1
Embodiments provide a true random number generator. The true random number generator may include a first ring oscillator having a first frequency, a second ring oscillator having a second frequency, a third ring oscillator having a third...  
WO/2017/143573A1
A pulse generating device, belonging to the field of distance measurement, comprising: a level generating module (01), a level conversion module (02), and a pulse generating module (03); the level generating module (01) generating, accor...  
WO/2017/144855A1
According to one embodiment of the present disclosure, a device comprises a latching circuitry, where the latching circuitry comprises at least one correlated electron switch, hereinafter termed CES, element. The latching circuitry furth...  
WO/2017/142664A1
Described is an apparatus which comprises: a comparator to be clocked by a clock signal to be provided by a clocking circuit, wherein the clocking circuit includes: a voltage controlled delay line having two or more delay cells; a multip...  
WO/2017/142696A1
The apparatus may include a first latch configured to store a first state or a second state. The first latch may have a first latch input, one of a set input or a reset input, a first pulse clock input, and a first latch output. The firs...  
WO/2017/118873A3
Layouts of transmission gates and related techniques and systems are described. An integrated circuit may include first and second transmission gates (150, 160) disposed in a column, and metal wires (174a, 174b, 188a). The first transmis...  
WO/2017/133466A1
A high-speed low-power-consumption trigger, comprising a control signal generating circuit, an enabling unit and a latch structure, wherein the latch structure includes two input terminals, two output terminals, two enabling terminals, a...  
WO/2017/128647A1
A trigger and an oscillation system. The trigger comprises: a first voltage input end (1); a bias voltage input end (2); a first offset pipe (M5), which is configured with a scaling ratio relative to a first component of an external appa...  
WO/2017/129947A1
Various implementations described herein are directed to an integrated circuit. The integrated circuit may include a comparator stage (212), a resistor (Rl), a capacitor (CI), and active switches (Ml, M2) arranged to provide a clock sign...  
WO/2017/124094A1
An area efficient amplifier that amplifies a continuous-time continuous-amplitude signal and converts it to a discrete-time discrete-amplitude signal. The amplifier includes a first oscillator having an input and a plurality of N outputs...  
WO/2017/120002A1
A method and an apparatus for generating an internal memory clock are provided. The apparatus includes a pulse generator configured to receive a first clock signal (320) in a first power domain (302) and initiate a second clock signal (3...  
WO/2017/118873A2
Layouts of transmission gates and related techniques and systems are described. An integrated circuit may include first and second transmission gates disposed in a column, and metal wires. The first transmission gate includes first and s...  
WO/2017/120244A1
A signal generator configured to generate an oscillating signal with a temperature-compensated frequency. The signal generator includes a ring oscillator, and a complementary to absolute temperature (CTAT) current generator configured to...  
WO/2017/096376A1
In described examples of control logic (12) for producing a digital input (DV) to a digital-to-analog converter (DAC) (14) in a power converter system (20), the control logic (12) selects from among a plurality of slew rates during a tra...  
WO/2017/087089A1
One embodiment describes a Josephson current source system (14). The system includes a flux-shuttle loop (16) comprising a plurality of stages arranged in a series loop. Each of the plurality of stages includes at least one Josephson jun...  
WO/2017/087070A1
One embodiment describes a Josephson transmission line (JTL) system. The system includes a plurality of JTL stages (14) that are arranged in series. The system also includes a clock transformer (12) comprising a primary inductor configur...  
WO/2017/062901A3
EVs are connected to onset and progression of numerous diseases and can be used for their diagnosis. Methods and platform technology to isolate EVs and detect intravesicle phosphoproteins from biofluids are discussed. Secreted extracellu...  
WO/2017/079704A1
Implementations of light filters for use in cryptographic operations may include: a substrate having at least a first side and a second side, the first side opposing the second side, the substrate including one of a translucent, a transp...  
WO/2017/069857A1
Described is an apparatus which comprises: a first p-type Tunneling Field-Effect Transistor (TFET); a first n-type TFET coupled in series with the first p-type TFET; a first node coupled to gate terminals of the first p-type and n-type T...  
WO/2017/069985A1
A device including Josephson junctions, and a terminal for receiving a sinusoidal clock signal for providing power to the Josephson junctions, is provided. The device further includes a terminal for receiving an input signal (D), a clock...  
WO/2016/068520A3
Disclosed is an electronic vibrator comprising: a power supply unit for converting AC power into DC power; a bridge circuit unit comprising an IGBT, as a power switching element, in order to enable driving of a large-capacity oscillator;...  
WO/2017/069914A1
A method and an apparatus for wireless communication are provided. The apparatus having a first latch having a first latch input and first latch output and a second latch having a second latch input, a second latch scan output, and a sec...  
WO/2017/069843A1
An apparatus comprises a photonic oscillator circuit configured to generate optical signals that are separated by a uniform delay; radio frequency (RF) generating circuitry configured to receive the optical signals and produce a series o...  
WO/2017/054073A1
A method for reducing the jitter introduced into a digital signal by a non-linear processing element involves applying an input word representing the digital signal to a first signal path comprising a first non-linear processing element,...  
WO/2017/023391A3
A hybrid energy storage system is configured to control pulsed power. A first dynamo-electric machine (434, 436, 438) is coupled to an inertial energy storage device (426) and has multiple input stator windings configured to accept input...  
WO/2017/052928A1
Data retention circuitry, such as at least one integrated circuit (IC), is disclosed herein for power multiplexing with flip flops having a retention feature. In an example aspect, an IC includes a first power rail and a second power rai...  
WO/2017/052838A1
An integrated circuit (IC) is disclosed herein for managing power with flip-flops having a retention feature. In an example aspect, an IC includes a constant power rail (KPR), a collapsible power rail (CPR), multiple flip-flops (206), an...  

Matches 201 - 250 out of 26,711