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Patent Searching and Data


Matches 351 - 400 out of 26,679

Document Document Title
WO/2015/128168A1
The invention relates to a method and a device (1) for classifying and/or generating random bits (ZB). The method has the following steps: providing (S1) output signals (A1 - An) from logic elements (21 - 2n) of a ring oscillator circuit...  
WO/2015/077770A3
A circuit arrangement is disclosed for controlling the switching of a field effect transistor (FET). A current controlled amplifier may be configured to amplify a current in a current sense device to generate an amplified current, wherei...  
WO/2015/131199A1
A pulse generator is disclosed that includes at least the following stages a driver stage, a transformer stage, a rectifier stage, and an output stage. The driver stage may include at least one solid state switch such as, for example, of...  
WO/2015/113977A1
The invention proposes a scan sequential element device (scan flip-flop or scan latch) for integrated circuit the device (30) receiving as input three respective input signals D, S1I, SE and at least one clock signal CLK, and comprising ...  
WO/2015/116416A1
Systems and methods are directed to a three-phase non-volatile flip- flop (NVFF) (500), which includes a master stage formed from a dual giant spin Hall effect (GSHE)-magnetic tunnel junction (MTJ) structure (Jl, J2), with a first GSHE-M...  
WO/2015/108619A1
In accordance with the present disclosure, exposure of a sample to one or more electric pulses via capacitive coupling is described. In certain embodiments, the sample may be a biological sample to be treated or modified using the pulsed...  
WO/2015/108778A1
Methods and systems for releasing growth factors are disclosed. In certain embodiments, a blood sample is exposed to a sequence of one or more electric pulses to trigger release of a growth factor in the sample. In certain embodiments, t...  
WO/2015/107004A1
Apparatus (1) for generating high-voltage pulses, comprising high-voltage pulse generator modules (2) that are inductively decoupled from one another and inductively couple generated high-voltage pulses into an inner conductor (3) via as...  
WO/2015/102762A1
An integrated circuit ("IC") includes an input receiver with multiple hysteresis levels. An exemplary input receiver may be an input buffer with a Schmitt trigger that has multiple hysteresis windows between different high and low input ...  
WO/2015/098017A1
Provided is a technology that is effective to power consumption reduction, while guaranteeing write operations to a semiconductor integrated circuit, and data holding performance. This semiconductor integrated circuit connected between a...  
WO/2015/094821A1
A voltage selector circuit may be coupled to transistors to protect one or more inputs of the transistor from exceeding a safe operating range. In one example, a cross-coupled pair of transistors may be coupled to a gate of a transistor ...  
WO/2015/095200A1
A resistive switching element can be used in a nonvolatile digital Schmitt trigger circuit or a comparator circuit. The Schmitt trigger circuit can include a resistive switching circuit, and a reset circuit. The resistive switching circu...  
WO/2015/094470A1
Described is an apparatus which comprises: a first power supply node to provide power supply current; a ring oscillator, coupled to the first power supply node, to generate an oscillating output according to change in the power supply cu...  
WO/2015/090046A1
A digital current equalizing method and a power supply module. The digital current equalizing method comprises: acquiring a current numerical value from a counter preset value loading module in each synchronous period; generating a conse...  
WO/2014/206533A3
The invention relates to a high voltage power supply unit (10a). The high voltage power supply unit (10a) comprises a voltage transformer component (18a) and a discharge circuit component (20a). The voltage transformer component (18a) an...  
WO/2015/074155A1
The power supply unit for an ozone generating system generally has a pulsed current generator generating current pulses to be supplied to an ozone generator; and a computer adapted for obtaining an ozone yield based on a first amount of ...  
WO/2015/075496A1
A current-to-voltage converter (101) receives a current which varies with temperature according to a selected one of two or more temperature coefficient factors and converts it to a temperature-dependent voltage which may be used as a co...  
WO/2015/073921A1
A nanosecond pulser may include a plurality of switch modules, a transformer, and an output. Each of the plurality of switch modules may include one or more solid state switches. The transformer may include a core, at least one primary w...  
WO/2015/073189A1
Technologies are generally described for quadrature -based injection- locking of ring oscillators. In some examples, an external signal may be injected into a ring oscillator. Phase signals may be measured from within the ring oscillator...  
WO/2015/043855A3
The invention relates to a method and a device for generating random bits using an electronic circuit. The random signal is fed to at least two counter units in parallel within the electronic circuit. With the method described it is poss...  
WO/2015/069903A1
A digital level shifter adapted to shift an input signal from switching in a low voltage range, to an output switching in a high voltage range has a glitch generator configured to generate pulses at rising and falling transitions of the ...  
WO/2015/066142A1
The present disclosure includes circuits and methods for latching signals. In one embodiment, two inverters (204, 205 and 206, 207) are configured back to back to latch a signal. Each inverter includes a capacitor (C1, C2) configured bet...  
WO/2015/065683A1
Certain aspects of the present disclosure provide apparatus for producing an output signal having a duty cycle of 50% and a frequency that is one third that of an input signal. One example frequency dividing circuit for producing such an...  
WO/2015/057923A1
A remote device in accordance with the present invention includes an adaptive power receiver that receives wireless power from the wireless power supply by induction. The adaptive power receiver may be switched among two or more modes of...  
WO/2015/050865A1
A ring oscillator comprising three or more delay cells, each of which comprises a plurality of differential input leads and a differential output lead, wherein each of the plurality of differential input leads comprises one or more inver...  
WO/2015/050621A1
One embodiment describes a memory cell. The memory cell includes a phase hysteretic magnetic Josephson junction (PHMJJ) that is configured to store one of a first binary logic state corresponding to a binary logic-1 state and a second bi...  
WO/2015/042814A1
The present invention provides an injection locked frequency multiplier. The injection locked frequency multiplier comprises: an input stage, configured to receive an input signal having a first frequency, and generate a harmonic current...  
WO/2015/047280A1
Described is an integrated circuit (IC) with a phase locked loop with capability of fast locking. The IC comprises: a node to provide a reference clock; a digitally controlled oscillator (DCO) to generate an output clock; a divider coupl...  
WO/2015/037086A1
This invention uses a vertical transistor, namely a surrounding gate transistor (SGT), to provide a semiconductor device that constitutes part of a latch circuit and has a small surface area. In said latch circuit, which comprises a plur...  
WO/2015/039049A1
Circuits and methods for switched mode operational amplifiers are provided. In some embodiments, circuits are provided, the circuits comprising: an amplifier having an output; a first pulse width modulator (PWM) having an input coupled t...  
WO/2015/037252A1
The objective of the invention is to provide an oscillation circuit that ensures oscillation frequency precision against parameter variations, such as temperature variations, even for a relatively high frequency band. The oscillation cir...  
WO/2015/030150A1
The storage circuit includes first and second logic circuits, first and second transistors whose channel formation regions include an oxide semiconductor, and a capacitor. The first and second transistors are connected to each other in s...  
WO/2015/030937A1
An offset canceling dual stage sensing method includes sensing a data value of a resistive memory data cell using a first load PMOS gate voltage generated by a reference value of a resistive memory reference cell in a first stage operati...  
WO/2015/025682A1
A delay circuit (10) containing a first inverting circuit, which contains a pull-up circuit (2) and a pull-down circuit (3), and a second inverting circuit, which contains a pull-up circuit (4) and a pull-down circuit (5). The delay circ...  
WO/2015/023516A1
A functional timing sensor includes a setup time violation detecting circuit, a hold time violation detecting circuit, and an interface from the setup time violation detecting circuit and the hold time violation detecting circuit. The in...  
WO/2015/017307A1
An oscillating circuit with linear gain is presented. The oscillating circuit may include a relaxation oscillator and a current compensation block. The relaxation oscillator includes a capacitor, a pair of resistors operative to deliver ...  
WO/2015/017233A1
Exemplary embodiments are related to a clock doubler. A device may include a duty cycle correction circuit configured to receive an input clock signal and convey a corrected clock signal. The duty cycle correction circuit may include a f...  
WO/2015/014304A1
An apparatus comprising a frequency divider comprising a first latch and a second latch coupled to the first latch in a toggle-flop configuration, and an output circuit comprising a first p-channel transistor, wherein the gate of the fir...  
WO/2015/016734A1
A spread-spectrum clock generation circuit comprises at least one comparison element; at least one charge storage device arranged to couple an output of the at least one comparison element to an input of the at least one comparison el...  
WO/2015/009716A1
Monolithic three dimensional (3D) flip-flops with minimal clock skew and related systems and methods are disclosed. The present disclosure provides a 3D integrated circuit (IC) (3DIC) that has a flop spread across at least two tiers of t...  
WO/2014/146016A3
A multiple output current stimulator circuit with fast turn on time is described. At least one pair of input side and output side transistors is arranged in a current mirror connected to a supply transistor by cascode coupling. The outpu...  
WO/2015/005992A1
A flip-flop having a first storage circuit having a first input fed by the true logic signal and a second input fed by the complement of the logic signal. A second storage circuit has a pair of inputs coupled to the first storage circuit...  
WO/2015/001388A1
An oscillator circuit (201) of the type comprising a flip-flop (219) for generating a clock signal (222) and two comparators (213, 216) for comparing a reference voltage with the voltage across a first capacitor which is charged during a...  
WO/2015/001731A1
A semiconductor device is provided with: a first transistor and a second transistor that are connected in series via a first node; a third transistor and a fourth transistor that are connected in series via a second node; and a first fus...  
WO/2015/000640A1
The invention relates to a method for generating a number of random bits by means of an electronic oscillating circuit, wherein signals are simultaneously sensed or sampled at various points within a random number generator. An optionall...  
WO/2014/208470A1
Provided is a voltage regulator, wherein power consumption is small, and an NMOS transistor is used as an output transistor. This delay circuit is configured by providing, between a constant current circuit and a capacitor, a depression ...  
WO/2014/209716A1
In one example, a high-speed divider (38) includes two identical pseudo-CML latches (L1, L2) and four output inverters (70-73). Each latch includes a pair of cross-coupled signal holding transistors (MN1, MN2, MN7, MN8). A first P-channe...  
WO/2014/209715A1
A frequency divider (300) with duty cycle adjustment within a feedback loop is disclosed. In an exemplary design, an apparatus includes at least one divider circuit (310a, 310b) and at least one duty cycle adjustment circuit (320a, 320b)...  
WO/2014/203466A1
This random number generating device comprises: an arithmetic random number generating unit (3) which generates an arithmetic random number series; an arithmetic random number conversion unit (5) which reads out one or more arithmetic ra...  
WO/2014/202074A1
The invention relates, inter alia, to an optoelectronic oscillator (10) for generating an optical and/or electric pulse comb, comprising a monolithically integrated passively mode-coupled semiconductor laser (20) and an optical feedback ...  

Matches 351 - 400 out of 26,679