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WO/2007/065269A1 |
A CMOS hybrid analog-digital receiver core where filtering and gain functions are implemented in the digital domain. The analog portion of the receiver core includes standard circuits such as a low noise amplifier for receiving an RF inp...
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WO/2007/066274A1 |
An electronic quadrature device is provided comprising at least one I signal path (I) and at least one Q signal path (Q); at least one first sigma-delta modulator (DSDMI) and at least one first digital/analog converter unit (DACI) arrang...
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WO/2007/062295A2 |
A method and system for generating a double-sided pulse width modulation (PWM) signal (110) is disclosed. The method includes generating a leading edge PWM signal and a trailing edge PWM signal from a pulse code modulation (PCM) data str...
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WO/2007/054895A1 |
A signal processing circuit comprising a sigma delta analog to digital converter with a feedback loop that comprises an analog filtering circuit (14) that has a controllable time constant. In a calibration mode a detector (18) detects a ...
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WO/2007/045682A1 |
The invention relates to a sampling module (30), for sampling one or more analogue characteristics of a power transmission system, comprising at least one input circuit for sampling a respective analogue characteristic, the or each input...
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WO/2007/040989A1 |
A delta sigma modulator is provided. The delta sigma modulator comprises quantitizer circuitry configured to generate a digital signal using a first analog signal and dither control circuitry configured to use the digital signal to adjus...
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WO/2007/038280A1 |
A sigma-delta ADC (200A) uses blue-noise (random, pseudo-random) modulation (202) to reduce the effect of the substrate noise. Pairs of blue-noise multipliers (202) are placed before and after each non-delayed integrator (106). In the ca...
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WO/2007/036224A1 |
The invention relates to a circuit and method for sensor readings, wherein said sensor is mounted between the feedback branch and loop-filter of a sigma-delta converter in such a way that feedback signals thereof compensate, in a tempora...
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WO/2007/036773A1 |
A number of parallel modulation functions are configured to provide sigma-delta modulation on a plurality of low sampling rate signals, which are representative of a high sampling rate input signal. Resultant sigma-delta modulated signal...
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WO/2007/029130A1 |
In a signal processing arrangement, a digital-to-analog converter (DAC1) of the finite impulse response type converts a serial bitstream (BSL) into an analog output signal (AL). The digital-to-analog converter (DAC1) comprises at least t...
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WO/2007/011307A1 |
Briefly, in accordance with one embodiment of the invention, a resonator (110) such as an electromechanical resonator may be coupled with a cancellation network (112) to reduce and/or cancel an anti-resonance effect in the resonator (110...
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WO/2007/010298A1 |
A method is provided for detecting limit cycles in a sigma delta modulator having an output signal that varies over a series of time intervals. In this method a first value that is indicative of the level of the modulator output signal a...
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WO/2007/009126A2 |
A delta-sigma modulator (29) includes a chopper-stabilized integrator (36), a quantizer having an input coupled to an output of the integrator, an input signal acquiring circuit controlled by a switched reference feedback circuit (39) an...
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WO/2007/005494A1 |
In one embodiment, the present invention includes a delta-sigma modulator formed of a loop filter coupled to receive an incoming signal, and a quantizer coupled to the loop filter to receive an output of the loop filter and to generate a...
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WO/2007/002770A2 |
Methods and apparatus for implementing and/or using amplifiers and performing various amplification related operations are described. The methods are well suited for use with, but not limited to, switching type amplifiers. The methods an...
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WO/2006/126166A2 |
A demodulator (70) suitable for a multi-mode receiver (101 ), demodulates (50, 520, 540, 550) samples having a sample rate not an integer multiple of the specified data rate of a current mode, and decimates (60, 160, 545) demodulated sam...
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WO/2006/125639A1 |
According to the invention, capacity can be measured in a precise and efficient manner of a delta-sigma-modulator which comprises an operational amplifier (102), a first capacitor (104) which can be connected to the inlet of the operatio...
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WO/2006/113270A1 |
A sigma-delta modulation sensing circuit and an analog-to- digital converter for an imager that do not rely on the ratio of the reset and pixel voltage levels being sensed. The sensing circuit includes a regulation branch (273) based on ...
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WO/2006/108452A1 |
Electronic circuit for the analog-to-digital conversion of the alternative current (AC) component of an analog input signal, comprising: a coupling device (21) comprising an input (1) and an output (29), the coupling device (21) deliveri...
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WO/2006/110533A1 |
In one embodiment, one or more less significant input bits (LSB's) of a digital-to-analog converter (DAC) are pulsed or otherwise modulated at a frequency substantially higher than the response cutoff frequency of a driven analog plant (...
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WO/2006/105323A1 |
A system includes a digital circuit that may be clocked by a digital clock signal having an associated clock period. The system also includes a sample clock generation circuit coupled to a sampling circuit. The sample clock generation ci...
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WO/2006/102178A2 |
Time encoding machines with multiplicative coupling, and optional feedforward or feedback are provided. The time encoding machines, which are based on common oscillator circuits, are input/output equivalent to either an integrate-and- fi...
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WO/2006/087667A1 |
In an AD converter a primary Σ&Dgr -modulator digitizes the analog input signal. The quantization noise generated thereby is isolated in the analog domain and digitized in a secondary Σ&Dgr -modulator. The quantization noise so digitiz...
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WO/2006/085605A1 |
A &Dgr Σ modulator of frequency modulation system wherein the requirement of linearity for an oscillator is lessened. The &Dgr Σ modulator comprises an oscillating apparatus the frequency of which varies in accordance with an input sig...
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WO/2006/079435A1 |
The invention relates to a delta sigma modulator comprising an oscillatable system which is provided with a characteristic frequency (fR), an electronics unit and a regulation loop which acts the oscillatable system upon the electronics ...
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WO/2006/067382A1 |
A method of Digital to Analogue conversion of an input signal Do for suppressing the effect of clock-jitter in a Delta-Sigma analogue to digital converter, or class D amplifier, comprises charging a capacitor (414) to a reference voltage...
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WO/2006/063192A1 |
Methods and systems for modulating (508) a radio frequency signal by a continuous-time signal are presented. More particularly, techniques and systems for converting an analog signal (202) to a continuous-time digital signal and using th...
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WO/2006/060137A1 |
A switching circuit for generating first and second output signals for differentially driving a load is described. The switching circuit is operable to enforce a minimum pulse width on each of the first and second output signals. The sec...
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WO/2006/054214A1 |
A continuous-time sigma-delta analog-to-digital converter (CV) comprises i) a signal path (SP) which includes at least one combiner (C1) for combining analog signals to be converted with analog feedback signals, at least one integrator (...
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WO/2006/053152A1 |
A dual-mode delta-sigma analog to digital converter system is disclosed that uses a feed forward modulator and includes a low frequency resonator circuit and a high frequency resonator circuit and includes a feed-forward path from the fi...
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WO/2006/046709A1 |
A receiving device capable of performing analog-to-digital conversions of a plurality of analog reception signals of different frequencies into digital signals of a high quality by band-pass delta-sigma type AD converters. The band-pass ...
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WO/2006/047155A1 |
A novel circuit is used to monitor the common-mode voltage at the summing junctions of the first integrator in a continuous-time Σ&Dgr ADC, wherein the circuit produces a control voltage which adjusts the quiescent current of the feedba...
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WO/2006/043207A1 |
A signal receiver processing circuit is for isolating a desired signal from analog input signal that is susceptible to variations in signal power, e.g. from a radio front end (12). The device has a variable gain amplifier (13) and an ana...
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WO/2006/043206A1 |
A signal processing circuit has an analog to digital converter (31) for providing a digital signal to a processor (15) from an analog input signal that is susceptible to variations in signal power, e.g. from a radio front end (12). The d...
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WO/2006/038531A1 |
A delta-sigma modulator having a voltage-current conversion circuit mounted thereon for determining a current value with a reference voltage and resistances has a problem that the output current value is dispersed by a dispersion in the ...
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WO/2006/038637A1 |
An electronic circuit and a semiconductor device are provided with a voltage selecting output circuit, such as a DAC, and an SCF, and a driving condition of an input side switch of the SCF is added to the selecting conditions of a select...
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WO/2006/034880A1 |
In order to convert a complex analog signal into a complex digital signal in an analog-digital conversion device having two channels, I and Q respectively, in quadrature, each comprising an input and an associated output, each output bei...
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WO/2006/034177A1 |
A multi-bit continuous-time sigma-delta analog-to-digital converter (ADC) has an input stage which receives an analog input signal current. A multi-bit feedback current digital-to-analog converter (IDAC) generates a multi-level feedback ...
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WO/2006/030363A2 |
An arrangement for pulse-width modulating an analog or digital input signal is provided. The non-linear distortion generated in the pulse-width modulator is precompensated by applying a signal with reversed error to the pulse-width mod...
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WO/2006/026885A1 |
A digital only Σ&Dgr modulator comprises a node (14) which can be connected to a current source (12), representing the analog input signal, a quantizer element and a sample-and-hold element (10) mounted in series having an input (11) ...
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WO/2006/024317A1 |
The invention relates to a sigma-delta analog/digital converter for an xDSL multistandard input stage in order to convert an xDSL signal into a digital output signal. Said sigma-delta analog/digital converter (1) comprises: an analog loo...
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WO/2006/022853A1 |
A digital-to-analog converter having a differential signal path, and a current parking circuit that is independent of the signal path, thereby avoiding a source of imbalance that caused output anomalies in conventional digital-to-analog ...
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WO/2006/023726A1 |
Disclosed are hybrid heterodyne transmitters (10A) and receivers (10, 200) for use in communications systems, or other systems, and the corresponding methods for hybrid heterodyne transmitting and receiving, A heterodyne receiver for con...
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WO/2006/022382A1 |
A digital filter wherein a target filter characteristic and a noise component removing filter characteristic can be individually adjusted or designed. There included a main filter part (12) having a transfer function G(z) for applying a ...
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WO/2006/023355A1 |
A five-level feed-back digital-to-analog converter (DAC) in a switched capacitor sigma-delta analog-to-digital converter has an improved switching sequence that boosts from two to five the number of quantization levels of the feed-back D...
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WO/2006/012636A1 |
Look-ahead delta sigma modulators of the signal processing systems described herein can anticipate quantizer overload. By anticipating quantizer overload, the look-ahead delta sigma modulators can select an output value y(n) that may hav...
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WO/2006/011975A1 |
A variable capacitance switched capacitor input system and method includes a differential integrator circuit having first and second input summing nodes and a variable sensing capacitor; one terminal of the variable sensing capacitor is ...
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WO/2006/008207A1 |
The invention relates to a circuit for converting the capacitive signal change of a differential capacitor into digital signals, said circuit comprising a sigma-delta modulator. The invention is characterized in that the differential cap...
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WO/2006/008188A1 |
A method of adjusting an analog-to-digital converter (300) having two channels in quadrature (I, Q), each having an associated input (101, 102) and output (108, 109), for converting a complex analog input signal into a complex digital ou...
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WO/2006/006993A1 |
A hybrid tuning circuit is used consisting of a digital finite state machine and an analog tuning circuit to effectively keep the RC product of the continuous time integrator constant across process, temperature, supply, and sampling rat...
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