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WO/2012/078895A2 |
Architectures of ΣΔ difference-of-squares RMS-to-digital converters employing multiple feedback paths. Additional feedback paths enable a stable ΣΔ closed-loop behavior in different topologies where the RMS level of the quantization ...
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WO/2012/077249A1 |
Provided is a synchronizing loop circuit capable of effectively reducing quantization noise even when the cutoff frequency of a loop filter is not set to be low. A phase comparator (2) is configured so as to detect and compare a first st...
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WO/2012/078899A2 |
A sigma-delta (ΣΔ) difference-of-squares LOG-RMS to digital converter" by merging a traditional ΣΔ modulator with an analog LOG-RMS to DC converter based on a difference-of- squares concept. Two basic architectures include one based ...
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WO/2012/078891A2 |
A sigma-delta (ΣΔ) difference-of-squares LOG-RMS to digital converter for true RMS detection by merging a ΣΔ modulator with an analog LOG-RMS to DC converter based on a difference-of-squares. Chopper-stabilization, implemented throug...
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WO/2012/075202A1 |
Techniques for adaptive gain adjustment in a signal processing path to achieve greater dynamic range. In an exemplary embodiment, a digital gain is applied to a digital input signal based on a detected level of the digital input signal. ...
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WO/2012/073397A1 |
When compensating for DC offset, a quantization apparatus within a ΔΣ A/D converter apparatus (308) is employed. It is thus possible to obtain a regular and rapid A/D conversion result without oscillation even with excessive input whil...
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WO/2012/073117A1 |
A filtering analog to digital converter (ADC) includes an integrator receiving at its input an analog input signal. A filtering capacitor at the input of the integrator filters out a large portion of out-of-band interferers in the analog...
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WO/2012/074941A1 |
In general, techniques are described for performing enhanced sigma-delta modulation. For example, an apparatus comprising a predictive filter unit, an amplifier, an oversampling unit and a sigma-delta modulation unit may implement the te...
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WO/2012/055848A1 |
A delta-sigma analog-to-digital converter (100) comprises: a summing stage (20) having a first input (22) for an input signal (VIN) and a second input (23) for a feedback signal (VFB); an integrator (30) coupled to an output (24) of the ...
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WO/2012/048140A2 |
A pipelined continuous-time (CT) sigma-delta modulators (SDM) is provided that has an architecture that is readily calibrated. The system includes a digital filter and other features that can be adjusted to account for input imbalance er...
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WO/2012/041681A1 |
A single-ended to differential buffer circuit is (21,22) is disclosed, adapted to couple at least an input analog signal (Vin) to a receiving circuit (24). The buffer circuit (21,22) comprises an output section (22) comprising a differen...
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WO/2012/035674A1 |
In this delta-sigma modulator, one or more (41, 42) of a plurality of integrators (41 to 45) use variable-gain differential amplifiers (46, 47) with variable open-loop gain and the remaining integrators (43 to 45) use fixed-gain differen...
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WO/2012/035713A1 |
A class D amplifier, for limiting the degradation of the EVM of a wireless signal subjected to class D amplification, and a wireless communication device are provided. A bandpass ΔΣ modulator (104) applies bandpass ΔΣ modulation to a...
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WO/2012/032690A1 |
A delta sigma modulator comprises: an integrator (1) including an arithmetic amplifier (10); a quantizer (2) that quantizes an output of the integrator; a first D/A converter (3) that converts a digital output of the quantizer to a curre...
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WO/2012/033182A1 |
In order to improve the radio characteristic in the transmitter, there are included a ΔΣ modulation means that ΔΣ modulates a given input signal; and a control means that changes the parameters of the ΔΣ modulation means in accorda...
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WO/2012/024333A1 |
Multiple streams from multiple circuit paths are Block-TDM (Block-Time-Division-Multiplexing) aggregated into a single stream that passes via a single path through processing circuitry capable of handling the aggregated signal. The cost ...
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WO/2012/019976A1 |
The invention relates to a capacitance measurement circuit comprising a measurement voltage source, which is designed to supply a sinusoidal voltage signal to a first connection of a capacitance to be measured in order to effect a tempor...
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WO/2012/012996A1 |
The present invention discloses a modulator used for solving the problem in the prior art that a single loop modulator has no ability of adjusting the zero point of a noise transfer function, and has narrow effective signal bandwidth and...
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WO/2012/007328A1 |
The present invention relates to analog-to-digital converters and more particularly to a delta-sigma analog-to-digital converter 1 for generating a digital signal as a function of an analog signal and a clock signal having a first phase ...
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WO/2012/005777A1 |
A sigma-delta modulator has a chopper voltage reference providing a reference signal having a clock dependent offset voltage, a single-bit or a multi-bit digital-to-analog converter (DAC); a plurality of capacitor pairs; a plurality of s...
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WO/2012/001019A1 |
The invention concerns a sigma-delta switched capacitor analog to digital converter (ADC) comprising: an input line (405) for receiving a signal to be converted; first, second and third inputs (408, 410, 412) for respectively receiving f...
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WO/2011/159201A1 |
The invention relates to the field of encoding/decoding analogue signals and, in particular, to adaptive delta modulators/demodulators with syllabic adaptation, i.e. CVSD modulators. The local decoder for an adaptive delta modulator with...
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WO/2011/150732A1 |
A modulator and a design method thereof are provided. The modulator includes an analog filter (11) for pre-modulating input analog signals; an analog adder (15) for summing the analog signals; a multi-bit quantizer (13) for converting th...
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WO/2011/149131A1 |
The present invention relates to a sigma-delta structure for a digital high-frequency transmitter, and more specifically relates to a sigma-delta structure for a digital high-frequency transmitter for outputting an input signal, received...
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WO/2011/148605A1 |
In a delta-sigma A/D converter using double-sampling technology, the problem in which quantization noise increases by way of a manufacturing tolerances of elements used in D/A converters of an integrator and an input offset voltage of an...
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WO/2011/131202A1 |
A modulation system (70) for a converter system, preferable a delta sigma converter, which has reduced noise in output and gives a flexibility of implementation. Downsampling of a system clock is performed (82,84) to have the comparator ...
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WO/2011/114300A1 |
A microphone circuit has a clip detection circuit (30) which detects when an analogue to digital converter (ADC, 12) output has reached a threshold. A variable capacitance (34a, 34b, 34c, 34d), which functions as a variable input load as...
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WO/2011/089759A1 |
The disclosed device easily and precisely satisfies a requested output range, and is provided with: a ΔΣ-modulator (12) which converts a digital input signal to a pulse signal; an input comparison device (11) which compares an input va...
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WO/2011/089859A1 |
Disclosed is a ΔΣADC that can suppress an increase in circuit size without losing a noise-shaping ability, even when the switching speed of a switch that performs time division is lower than the sampling rate of the ΔΣADC. With respe...
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WO/2011/090045A1 |
The disclosed conversion device converts an analog input signal into a digital signal and outputs thereof, wherein the conversion device comprises a feedback signal generator for performing mismatch shaping on the digital signal that has...
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WO/2011/089661A1 |
Provided is a secondary resonator that is configured by using a single operational amplifier and that has reduced power consumption and easy-to-set transfer characteristics. The disclosed resonator includes: an operational amplifier (10)...
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WO/2011/084609A1 |
Provided are, among other things, systems, apparatuses, methods and techniques for converting a discrete-time quantized signal into a continuous-time, continuously variable signal. An exemplary converter preferably includes: (1) multiple...
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WO/2011/085042A1 |
Provided are, among other things, systems, methods and techniques for converting a continuous-time, continuously variable signal into a sampled and quantized signal. According to one representative embodiment, an apparatus includes multi...
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WO/2011/085036A1 |
Provided are, among other things, systems, methods and techniques for converting a continuous-time, continuously variable signal into a sampled and quantized signal. According to one implementation, an apparatus includes multiple process...
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WO/2011/081069A1 |
Provided is a sigma-delta modulation circuit comprising: an integration circuit which has a first terminal and a second terminal, and which integrates voltage supplied by way of the first terminal; a first DAC section which supplies a fi...
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WO/2011/050335A1 |
Feedback circuits with DC offset cancellation are described. In an exemplary design, a feedback circuit includes a slow integrator and a summer. The slow integrator receives a first intermediate signal at a particular point in the feedba...
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WO/2011/039914A1 |
Disclosed is a complex second integrator that is provided with fewer operational amplifiers. A complex second integrator (100) is provided with first and second second integrators (100I, 100Q) and first and second coupling circuits (30, ...
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WO/2011/039915A1 |
A high-order integrator is attained with one operational amplifier. The integrator (100) is provided with an operational amplifier (11), a first filter (12) that is connected between the input end of the integrator (100) and the invertin...
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WO/2011/034505A2 |
An integrated circuit comprises a threshold generation circuitry for generating at least one differential voltage signal. The threshold generation circuitry comprises at least one common mode current generation circuit arranged to genera...
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WO/2011/027114A1 |
In lossy data compression of a signal using ADPCM, an adaptive decorrelation or "prediction" filter is used to reduce the amplitude of the signal, the spectral dynamic range of the signal also being reduced. This latter reduction is effe...
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WO/2011/023294A1 |
The invention relates to a method for processing a measured value signal representing a value determined in analogue form for the output current of a converter, and to a device for carrying out the method, wherein the measured value sign...
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WO/2009/133653A9 |
An integrator (10) comprises an operational amplifier (11), a first filter (12) connected to the inverting input terminal of the operational amplifier, and a second filter (13) connected between the inverting input terminal and the outpu...
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WO/2011/016969A1 |
An analog to digital converter comprising an Nth analog to digital converter and an N+1th analog to digital converter arranged in series such that a residue signal from the Nth analog to digital converter is provided as an input to the N...
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WO/2011/014182A1 |
A compression process (400) or system (700) constructs tables (740) associated with first locations in input data (710). Each table (500) includes entries corresponding to second locations in a reference file, and each second location id...
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WO/2011/012812A2 |
The present invention relates to signal processing in an analog-to-digital converter comprising a time-interleaved multi-channel architecture. According to the invention: digital filtering (H(z)) is applied in each channel, at least to e...
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WO/2011/009470A1 |
An apparatus for providing a modulated bitstream in dependence on a modulation content comprises a mapper configured to selectively provide a carrier bitstream portion or an inverted carrier bitstream portion in dependence on a binary va...
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WO/2011/008928A2 |
A sigma-delta modulator may have a plurality of capacitor pairs, a plurality of switches to couple any pair of capacitors from the plurality of capacitor pairs selectively to an input signal or a reference signal, and a control unit oper...
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WO/2010/151851A1 |
Provided are, among other things, systems, methods and techniques for converting a continuous-time, continuously variable signal into a sampled and quantized signal. According to one representative embodiment, an apparatus includes multi...
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WO/2010/149182A1 |
An apparatus for combining electrical or electronic components based on a digital input signal which can take a plurality of values out of a range of values, so as to generate an analog quantity corresponding to the digital input signal ...
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WO/2010/151847A1 |
A method for interference reduction is described. The method is implemented in a wireless device. It is determined that a page is going to be received via a secondary receiver. It is also determined that a digital-to-analog converter (DA...
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