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Matches 1 - 50 out of 5,226

Document Document Title
WO/2018/163679A1
This analog-digital converter is provided with a loop filter, a quantization circuit unit for converting the output of the loop filter into a digital value, and a current steering digital-analog conversion unit provided in a loop for fee...  
WO/2018/159948A1
An analog to digital converter according to the present technology comprises: a modulator which over-samples and outputs an input signal; and a filter which conducts, on the output of the modulator, a decimation operation together with a...  
WO/2018/159131A1
An analog-digital converter according to the present disclosure is provided with: a ΔΣ modulator having a quantization circuit unit; a splitter for splitting a digital output from the quantization circuit unit into an even-numbered dig...  
WO/2018/156015A1
The present invention relates to an analog-to-digital converter and electronic device comprising the same. According to the invention, the ADC comprises a comparator comprising a first input for receiving an input signal and a second inp...  
WO/2018/156259A1
Certain aspects of the present disclosure provide methods and apparatus for implementing sampling rate scaling of an excess loop delay (ELD)-compensated continuous-time delta-sigma modulator (CTDSM) analog-to-digital converter (ADC). One...  
WO/2018/149728A1
The invention relates to a signal transmission device for pulse-density-modulated signals comprising a signal input (1) for an input signal (UE) having a defined signal maximum value (UEmax'), an input-side modulation stage (3) for produ...  
WO/2018/150920A1
A ΔΣ modulator provided with: an integrator (10, 11) including an operational amplifier (OP, OP1) and an integral capacitance (Cf, Cf1); a quantizer (20) which outputs a quantization result (Qout) obtained by quantizing an output signa...  
WO/2018/151886A1
A system and method for pulse-width modulation (PWM) mismatch shaping. The method includes receiving a multi-bit pulse-code modulated (PCM) signal and generating a voltage ramp signal. The method includes generating a first corrected sig...  
WO/2018/142770A1
[Problem] To provide a signal processing device capable of suppressing external noise without degrading audio characteristics. [Solution] Provided is a signal processing device comprising: an A/D converter that includes a first delta sig...  
WO/2018/139807A1
Disclosed are an apparatus and a method for converting an output current of a current buffer into a digital code. According to one embodiment of the present invention, an apparatus for converting an output current of a current buffer int...  
WO/2018/135125A1
The present invention is provided with an integration circuit unit that integrates the difference between the value of an analog input signal and a feedback value, a quantization circuit unit that converts the output of the integration c...  
WO/2018/131725A1
A digital-to-analog conversion device which performs integration processing for integrating a difference between an input signal and a first return signal generated based on the input signal, and outputting an integration result, first q...  
WO/2018/123145A1
A ΔΣ modulator that comprises: a loop filter to which a baseband signal is applied; a first frequency converter that performs a frequency conversion on output from the loop filter; a first quantizer that quantizes output from the first...  
WO/2018/123250A1
This ΔΣ modulator comprises: a first adder that adds a plurality of input signals that have different frequencies; a loop filter to which output from the first adder is applied; and a quantizer that quantizes output from the loop filte...  
WO/2018/115066A1
A digital encoder (10) for generating, from a digital input signal (15) of N bits, with a carrier frequency f 0, an encoded digital signal (20) quantified on M < N bits, comprising a delta differentiator (25) for determining a differenti...  
WO/2018/108260A1
A hearing assistive device including an audio processing circuit comprising an analog-to- digital converter having an integrator integrating a voltage present in the summation point; a comparator comparing an output from the integrator w...  
WO/2018/109992A1
The present invention effectively suppresses idle tones in a delta-sigma modulator that generates a feedback signal using a digital-to-analog converter. A filter integrates a difference between an input analog signal and a feedback signa...  
WO/2018/103866A1
The disclosure relates to a digital-to-analog converter, DAC (100) for converting a digital input signal (x[n], 110) to an analog output signal (y), the DAC (100) comprising: an encoder (102), configured to generate a pair of ternary sig...  
WO/2018/102807A1
In described examples, a voltage-controlled oscillator-based delta-sigma analog-to-digital converter (VCO-based ΔΣ ADC) (1) includes a VCO-based quantizer (3) that includes delay elements to provide VCO outputs (5) based on an analog i...  
WO/2018/098234A1
Described are a system and technique to mitigate the impacts of clutter in a radar system. The system and technique require only linear co-polarized measurements can be incorporated into the standard radar signal processing chain without...  
WO/2018/094380A1
A parallel delta sigma modulator architecture is disclosed. The parallel delta sigma modulator architecture includes a signal demultiplexer configured to receive an input signal and to demultiplex the input signal to output a plurality o...  
WO/2018/077391A1
A receiver (100) is described, the receiver comprising an analog baseband, ABB, filter stage (101), an analog-to-digital converter, ADC, stage (103), a first feedback path (123), and a second feedback path (125). The ABB filter stage (10...  
WO/2018/063568A1
Examples provide a delta sigma analog-to-digital converter, a radio front-end, a radio receiver, a mobile terminal and a base station. The delta sigma analog-to-digital converter (100) is suitable for a differential radio frequency curre...  
WO/2018/052955A1
An apparatus comprises a digital to analog converter (DAC) circuit configured to receive a time-varying a digital input signal and convert the digital input signal to an analog output signal, an output amplifier circuit operatively coupl...  
WO/2018/033624A1
The invention relates to a method for generating a digital signal (D(i)) from an analog signal (UM), having the following steps: - generating a pulse width-modulated actuation signal (UA) using a frequency converter (1), said pulse width...  
WO/2018/026461A1
An integrated circuit includes a control circuit, a first-in first-out circuit, and a serializer circuit. The control circuit generates parallel pulse-width modulation data in first parallel pulse-width modulation signals. The first-in f...  
WO/2018/024316A1
A device, system and method for improvement of analog/digital conversion. An improved delta sigma - converter including a phase or frequency modulation and demodulation, is used. The improved delta sigma - converter obtains higher gains ...  
WO/2018/010572A1
An apparatus, system, and method are provided for affording digital to analog converter (DAC) quantization noise that is independent of an input signal. In operation, an input signal for a DAC is received. Further, a particular signal is...  
WO/2018/009054A1
The present invention is related to an auxiliary device that is configured for exchanging data with a main device, preferably a mobile device such as a telephone, laptop, or tablet computer, using the audio jack of the main device. The p...  
WO/2018/009306A1
A microphone assembly includes a transducer element and a processing circuit. The processing circuit includes an analog-to-digital converter (ADC) configured to receive, sample and quantize a microphone signal generated by the transducer...  
WO/2018/004617A1
In accordance with embodiments of the present disclosure, a method of neutralizing voltage kickback associated with a reference buffer of a switched capacitor based data converter having a first switched capacitor coupled to an output no...  
WO/2018/004826A1
A processing system, and associated input device and method are disclosed suitable for reducing a receiver size within the input device. The processing system comprises a delta-sigma modulator comprising one or more input nodes configure...  
WO/2017/220720A1
A Sigma-Delta (ΣΔ) modulator for converting an analog input signal having a frequency bandwidth around a variable center frequency f 0 to a digital output signal at a sampling frequency f s . The ΣΔ modulator comprises a quantizer (4...  
WO/2017/211615A1
Examples relate to a concept generating at least one RF signal based on at least one digital baseband signal at a first clock rate. At least one digital pulse sequence at a second clock rate corresponding to a center frequency of the RF ...  
WO/2017/208635A1
Provided is an A/D converter that comprises: integration circuits (10, 12, 14) for executing ΔΣ modulation for which an analog signal (Vin) to be converted is used as an input signal; adders (30, 32) for outputting an addition result o...  
WO/2017/209690A1
Various embodiments may provide a delta sigma modulator for generating a digital output voltage. The delta sigma modulator may include a capacitance-to-voltage converter for converting a sensed continuous-in-time applied capacitance sign...  
WO/2017/203976A1
The present disclosure pertains to a compression encoding device and method, a decoding device and method, and a program, which enable provision of lossless compression technique at a higher compression rate. According to the present inv...  
WO/2017/190976A1
A bitstream converter for converting a 1-bit pulse density modulated (PDM) bitstream signal into an analog audio signal, the bitstream converter comprising: a processor configured to process the 1-bit PDM bitstream signal using a return ...  
WO/2017/187914A1
The present invention comprises: a wireless device 3 that receives a ΔΣ-modulated signal obtained by ΔΣ-modulating a transmission signal; and a signal processing device 2 that transmits the ΔΣ-modulated signal to the wireless devic...  
WO/2017/187917A1
The present invention comprises: a signal processing device 2 that transmits, via a signal cable 4, a ΔΣ-modulated signal obtained by ΔΣ-modulating a transmission signal that is an RF signal; and a wireless device 3 that transmits, v...  
WO/2017/188897A1
According to various embodiments, an inverter-based resistor may be provided. The inverter- based resistor may include at least one digital inverter, wherein each of the at least one digital inverter is configured to receive an input and...  
WO/2017/182272A1
A signal processing arrangement (100) has a signal input (SI) for connecting a capacitive sensor (CS). An amplifier circuit (AMP) is coupled between the signal input (SI) and a feedback point (CB1). A loop filter (LF) is coupled downstre...  
WO/2017/179508A1
Provided is an A/D converter that does not need to be equipped with a post-filter used for subsequent regeneration of the output from a modulator, that has a simplified circuit configuration, and the circuit scale of which can be reduced...  
WO/2017/154532A1
A problem with conventional distortion pulse shift circuits is that the output timing of a pulse signal cannot be controlled unless a reset signal is used. This pulse shift circuit is provided with: an integrator which integrates an inpu...  
WO/2017/149978A1
[Problem] To provide a ring oscillator capable of controlling frequency according to the delay amount of a delay element, with a structure for which fine-level frequency setting is possible. [Solution] A reference signal generation devic...  
WO/2017/134097A1
A variable output data rate converter circuit preferably meets performance requirements while keeping the circuit complexity low. In some embodiments, the converter circuit may include an oversampling sigma delta modulator circuit to qua...  
WO/2017/121682A1
A band-pass filter (13) is described comprising a first first-order filter stage comprising a first resistor (R1) characterised by a first impedance and connected to a first node (25), referred to as a filter input node, and, through a s...  
WO/2017/116629A1
In accordance with embodiments of the present disclosure, a processing system comprising may include a plurality of processing paths and a filter. The plurality of processing paths may include a first processing path and a second process...  
WO/2017/112210A1
Some embodiments include apparatus and methods using a first stage including an integrator, a second stage coupled to the first stage, the second stage including an amplifier, a first capacitor, and a second capacitor coupled in series w...  
WO/2017/103694A1
A probabilistic digitizer for extracting information from a Josephson comparator is disclosed. The digitizer uses statistical methods to aggregate over a set of comparator readouts, effectively increasing the sensitivity of the comparato...  

Matches 1 - 50 out of 5,226