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JP4159169B2 |
A method and apparatus for encoding a sequence of 32 bit digital data words into a sequence of 33 bit code words in consonance with predetermined minimum zero run length (d) and predetermined maximum zero run length (k) for recording upo...
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JP4158994B1 |
According to the present invention, an image coding apparatus provides a run-length encoding unit RLE1 that subjects quantized coefficients which are obtained by quantizing frequency components of an image signal to a variable length cod...
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JP4158993B1 |
According to the present invention, an image coding apparatus provides a run-length encoding unit RLE1 that subjects quantized coefficients which are obtained by quantizing frequency components of an image signal to a variable length cod...
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JP4158995B1 |
According to the present invention, an image coding apparatus provides a run-length encoding unit RLE1 that subjects quantized coefficients which are obtained by quantizing frequency components of an image signal to a variable length cod...
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JP4156523B2 |
A method of converting m-bit information words to a run-length constrained modulated signal includes converting the information words into n-bit code words. The available code words are distributed over at least one group (G 1 ) of a fir...
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JP2008205965A |
To provide a decoding method of Manchester code, which can decode Manchester code with phase jitters normally.In decoding processing by a data receiving device, it is determined whether or not a second edge exists in a hold region Y betw...
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JP4143330B2 |
A recording method for converting m-bit data into n-bit (where n > m) data whose run length is restricted and recording the converted data on a recording medium, the recording method comprising the step of selecting first n-bit data acco...
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JP4141028B2 |
A code conversion circuit provided with a bit distributing unit, 21, for dividing a high speed input signal into N low speed signals; N code converters, 22-1,...,22-N, for performing code conversion on the N low speed signals; and a bit ...
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JP4141175B2 |
A recording method for converting m-bit data into n-bit (where n>m) bit data whose run length is restricted and recoding the converted data on a recording medium, the recording method comprising the steps of when at least preceded data i...
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JP4138031B2 |
A device is disclosed for encoding a stream of databits of a binary source signal into a stream of databits of a binary channel signal. The device comprises a merging unit (4') for merging a 1-bit merging word at equidistant positions in...
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JP4137138B2 |
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JP4132804B2 |
The present invention relates to a modulation apparatus and method and a DSV-control-bit generating method for suppressing an increase in circuit size of the modulation apparatus. When an input data stream is supplied to a DSV control bi...
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JP4123109B2 |
A succession of input data words is converted into a first succession of information code words including first candidate one and a second succession of information code words including second candidate one different from first candidate...
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JP2008526170A |
A system and method for improving the quality of transmitted digital signals in a multi-level signaling system wherein digital signals representing more than one bit of information may be transmitted at more than two signal levels on a s...
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JP2008523648A |
An arrangement for pulse-width modulating an analog or digital input signal is provided. The non-linear distortion generated in the pulse-width modulator is precompensated by applying a signal with reversed error to the pulse-width modul...
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JP4108978B2 |
An apparatus is described for reducing coherent signal interference between at least two bit streams framed with a common clock signal. The apparatus includes an internal clock signal generated from the common clock signal and a Manchest...
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JP4105272B2 |
. The method for the regeneration of return-to-zero (RZ), non-soliton optical signals comprises an initial compression of the RZ signals into soliton type signals. There is a subsequent synchronous optical modulation of the soliton type ...
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JP4097700B2 |
To correct non-linearity and noise in the conversion of a pulse code modulated signal (PCM) into a uniform pulse width modulated signal (UPWM), a model is made of the known non-linearity in the conversion by dividing a plurality of non-l...
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JP4100156B2 |
A worker defines a first conversion rule to convert data in a data format of a cooperative operation objective system as an input into data in a data format of first common data, a second conversion rule to convert data in the format of ...
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JP4095440B2 |
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JP4095700B2 |
In a method for decoding digital PWM signal and a bus system, a peripheral unit, and a device therefor, the digital signal is decoded by integrating the pulse width of each bit and then comparing the integration result with a reference s...
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JP4072133B2 |
To provide a transceiver capable of decoding a reception signal without using a PLL circuit, and therefore, being small and having low power consumption. The transceiver is provided with a transmitting means for outputting an AC signal h...
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JP4069216B2 |
An optical disk apparatus for suppressing a DSV and performing R-OPC. An encoding/decoding circuit inserts a synchronization information item to a head of a synchronous frame once when data are recorded on an optical disk. First, the enc...
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JP4065357B2 |
In a coding/decoding method for high density data recording and reproduction a 16/17 RLL(0,6/6) coding/decoding method is improved by adopting an encoder/decoder (3,8) having a simplified structure. The invention also provides an optimal...
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JP2008508747A |
A transmission code which packs six bits of data and four control vectors into an eight-bit format is presented. A direct current (DC)-balanced 6B/8B transmission code is produced from an input data stream that includes one or more six-b...
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JP4061844B2 |
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JP4059212B2 |
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JP4059210B2 |
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JP4057085B2 |
A data transmitter (12) transmits parallel data as light pulses over multiple optical channels (14). A data receiver (16) converts the light pulses back to a voltage level and compares the voltage level to a reference capacitor voltage (...
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JP4057209B2 |
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JP4058153B2 |
The computer system includes a host system, a recording medium, and a digital signal decoder connected to the host system and the recording medium. The digital signal decoder receives M-bit data and generates an N-bit code word from the ...
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JP4053002B2 |
Some embodiments of the present invention include a decoding system in which the decoding system uses iterative decoding techniques to decode signals encoded with lattice codes and/or multilevel coset codes. The decoding techniciucs acco...
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JP4049635B2 |
The present invention relates to method and apparatus of converting a series of data words into modulated signals. This method generates for each data word a number of intermediate sequences by combining mutually different digital words ...
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JP4045596B2 |
A remote control signal receiver receives a remote control signal in which bit signals are included as pulse signals. The remote control signal receiver includes a remote control signal receiving portion that receives a remote control si...
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JP4047518B2 |
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JP4040798B2 |
A data storage apparatus for magnetic recording and regeneration on a medium. Only in case of a dibit or Tri-bit code sequence in MTR codes having a restricted number of magnetic transition consecutive, a write unit records the interval ...
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JP4037979B2 |
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JP4036983B2 |
A data transmission device which improves data transmission efficiency is disclosed. A data transmission device includes a decoder converting a first binary data to a ternary data, a ternary data generator coupled to the decoder and gene...
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JP4034172B2 |
An encoder suppresses effectively the high-frequency components of data to be transmitted by decreasing the changing points of serial data, thereby suppressing EMI. A changing-point counter counts changing points of n-bit data (n: a posi...
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JP4034742B2 |
Code words are allocated to the pair of code groups. The code words correspond to the same source code so the corresponding code words of each of the code groups have opposite signs of a 1st parameter. Code word sum value (CSV) represent...
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JP4027774B2 |
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JP4027773B2 |
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JP4021113B2 |
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JP4009798B2 |
A demodulating device of the present invention in which an error code/constraint length determining unit, a minimum run continuation restricting code detecting unit and a minimum run/maximum run compensating code detecting unit specify a...
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JP2007533195A |
The invention relates to a modulation code system and a corresponding modulation method. Said modulation system comprises an encoder 100 for transforming an original signal s into an encoded signal c satisfying predefined second constrai...
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JPWO2005074220A1 |
The biphase mark modulated transmission data output from the transmitting device is input to the data transmission device (10), and the biphase decoding unit (12) demodulates the input transmission data by the biphase mark. .. The output...
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JPWO2005074219A1 |
The data part is mapped so that the polarity of the signal level of each symbol is always inverted for each symbol. On the other hand, the header part includes a discrimination symbol for discriminating between the data part and the head...
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JP2007533053A |
The invention relates to a modulation code system and methods of encoding and decoding a signal to be used for data transmission or data storage. Such systems comprise an encoder ( 100 ) for transforming an original signal s into an enco...
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JP4009338B2 |
According to a broad aspect of the invention, an apparatus (34) for decoding a Manchester encoded data stream is provided. The apparatus includes a transition detector (45) for receiving the Manchester encoded data stream to produce a tr...
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JP4006443B2 |
A method and apparatus for overwriting data in a probe-based data storage device wherein data is represented by the presence and absence of pits formed in a storage surface by a probe of the device is provided. Input data is first coded ...
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