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Patent Searching and Data


Matches 301 - 350 out of 5,341

Document Document Title
WO/2000/025490A1
The invention relates to a method for processing a received signal transmitting coded data, wherein coding of individual data is carried out with a given coding pulse and the signal has edges produced in accordance with the coding pulse....  
WO/2000/021198A1
An apparatus is disclosed for generating a runlength limited (RLL) digital information signal, the digital information signal having a minimum runlength of d' and a maximum runlength of k', d' and k' being integers larger than zero and w...  
WO/2000/019435A1
The decoder element (DE) is used to produce an output signal with three different potentials (-2 v, 0 v, 4 v) at an output (WLi). The second potential (0 v) is located between the first (-2 v) and the third (4 v) potential. The decoder e...  
WO/2000/019436A1
The decoder element (DE) is provided with an output (WLi), whereby an output signal with three different potentials (-2 volts, 0 volts, 4 volts) is produced. The output signal is produced according to input signals at the terminal connec...  
WO/2000/016484A1
Encoding (150) and decoding (182) systems and methods for digital data in 24 bit sequences. An encoder (150) generates state variables (50, 51, 52) as a function of four or fewer bits of the 24 bit sequence, and encodes the sequence into...  
WO/2000/011822A1
A SYNC bit inserting section (14) adds a synchronizing signal having a pattern breaking a maximum run to a code string after a minimum run, thereby giving a more reliable synchronizing signal pattern.  
WO/2000/010168A1
A digital data recording channel which uses variable rate encoding. The encoder monitors an input bit stream for sequences associated with selected readback characteristics, and inserts one or more bits where desirable to improve the cha...  
WO/2000/003392A1
A method and means for reducing high-duty-cycle unconstrained binary signal sequences in storage and communications processes and systems by invertibly mapping such sequences into a (1,k) rate 2/3 RLL codestream constrained to a duty cyc...  
WO/1999/063671A1
Problem: how to record and play back data at a high line density. Means for solving the problem: a DSV control bit determining/inserting unit (11) inserts DSV control bits for execution of DSV control into an input data string and output...  
WO1999035747A3
A device is disclosed for encoding a stream of databits of a binary source signal into a stream of databits of a binary channel signal. The device comprises a merging unit (4') for merging a 1-bit merging word at equidistant positions in...  
WO/1999/046861A1
A variable aperture coding/decoding system suitable for use in a spread spectrum system provides multiple phase coding of an input NRZ bitstream. Each bit of a coded output signal is coded to encompass a predetermined different number of...  
WO/1999/044295A1
A detector (400) of the present invention is provided to detect data values with a data signal that is sampled to provide temporally separated data samples. A first detector portion (462, 452, 458) is configured to determine the location...  
WO1998052287A3
Data is detected from a disc (112) in a disc drive (110) and provided as a sampled read signal including data samples provided in a plurality of time intervals. A signal space detector (320) includes a first detector (322) and a second d...  
WO/1999/035747A2
A device is disclosed for encoding a stream of databits of a binary source signal into a stream of databits of a binary channel signal. The device comprises a merging unit (4') for merging a 1-bit merging word at equidistant positions in...  
WO/1999/033183A1
A device is disclosed for encoding a stream of databits of a binary source signal (S) into a stream of databits of a binary channel signal (C), wherein the bitstream of the source signal is divided into n-bit source words (x¿1?, x¿2?),...  
WO1999017456A9
A system and method for avoiding catastophic error sequences in a media code sequence of symbols for data storage on a storage medium according to EPRML. The system and method include modulation encoding user data which is to be stored o...  
WO1999008376A9
A detector (124) is used in detecting data encoded in a read signal received from a storage channel (100). The detector (124) includes a Viterbi detector (124) having a time-invariant structure configured to detect the data encoded accor...  
WO/1999/023754A1
A method of transmitting 'biphase' encoded digital signals comprised of the steps of receiving one of a multiplicity of input data bits, wherein each data bit is characterized by a temporal data bit length (12), a temporal bit center (T3...  
WO/1999/022375A1
A device is disclosed for encoding a stream of databits of a binary source signal (S) into a stream of databits of a binary channel signal (C) satisfying a (d,k) constraint, wherein the bitstream of the source signal is divided into n-bi...  
WO1999017456A1
A system and method for avoiding catastophic error sequences in a media code sequence of symbols for data storage on a storage medium according to EPRML. The system and method include modulation encoding user data which is to be stored o...  
WO/1999/009719A1
A vehicle information system including a tag system (120B) mounted in a vehicle (100). The tag system (120B) transmits vehicle-related data acquired from the vehicle (100) to an interrogator (300B). The vehicle information system utilize...  
WO/1999/008376A1
A detector (124) is used in detecting data encoded in a read signal received from a storage channel (100). The detector (124) includes a Viterbi detector (124) having a time-invariant structure configured to detect the data encoded accor...  
WO1998044633A3  
WO/1998/053454A1
A digital modulator for receiving a data stream and converting the received data stream into a bit stream, wherein: a multiplexed block is generated by multiplexing dummy data at arbitrary positions within blocks that are sequentially se...  
WO/1998/052287A2
Data is detected from a disc (112) in a disc drive (110) and provided as a sampled read signal including data samples provided in a plurality of time intervals. A signal space detector (320) includes a first detector (322) and a second d...  
WO1998034413A3  
WO/1998/045970A1
A system transmits digital information bits, which are encoded into a predefined number of signed symbols per frame from a transmitter (40) over a network (46) to a receiver, wherein the transmitted signed symbols have a desired spectral...  
WO/1998/044635A1
A method for encoding a binary input sequence x(0,1) to obtain a duobinary output sequence y(+1,0,-1) is provided. The duobinary coding technique always provides an output bit y�k? =0 when the corresponding bit x�k? =0; bits y�k? a...  
WO/1998/044633A2
A method and apparatus for encoding data (152) produces a code stream (153) of code words (190, 192, 194) where each code word includes two subsets of code bits. Each subset of code bits is constrained by a different maximum transition r...  
WO/1998/044636A1
An encoder (150) and a method of encoding successive data words (152) into successive code words (153, 180, 181, 182) having alternating code word lengths (260, 262). Each code word (153, 180, 181, 182) has a plurality of bit locations. ...  
WO/1998/035329A1
The present invention relates to a method for transmitting data during pulse intervals of a speed signal, whereby the maximum number of transmittable data is determined on the basis of both the period of time required for transmitting an...  
WO/1998/034413A2
An encoder/decoder is disclosed which is operative to convert an 8 bit value (102a) to a ten bit serial run length limited code (141a) for transmission over a serial data link. The encoding technique maintains DC balance within 2 bits ov...  
WO/1998/033306A1
A multisignal single unit is realized in which a signal is expressed not only by the presence/absence of a pulse but also by multiple signals and each subsignal has a meaning, providing many meanings at a time more than what square pulse...  
WO/1998/029872A1
Rate 24/25 modulation encoding methods and apparatus improve efficiency in a PRML magnetic recording channel. The rate 24/25 code word uses rate 8/9 RLL endocing of one byte of user data, combined with interleaved unencoded bytes to achi...  
WO/1998/023060A1
At the time of transmitting 8-bit word-string data indicating signal information by converting the data into 10-bit word-string data containing word synchronizing data, the 8-bit word-string data indicating the signal information are obt...  
WO/1998/018208A1
The application relates to a method of converting a sequence of m-bit information words (1) to a modulated signal (7). For each received information word (1) from the sequence is delivered an n-bit code word (4). The delivered code words...  
WO/1998/017005A1
In a digital modulation method, a plurality of kinds of multiplexed blocks are generated by respectively multiplexing a plurality of kinds of t-bit initial data upon the leading edges of input blocks (before conversion), and the exclusiv...  
WO/1998/011669A1
A three state switch detection circuit (60) converts a three state input (46) to a two-bit binary output (50, 52) readable by a micro-controller (40) or other digital logic. The circuit utilized complementary NPN and PNP transistors (Q2,...  
WO/1998/006181A1
An apparatus encodes data blocks into code blocks, each code block containing more symbols than its respective data block. The apparatus includes a data block latch (30) for receiving individual data blocks and for dividing each data blo...  
WO1997036408A3
A method and apparatus for producing a transition-controlled, DC-balanced sequence of characters from an input sequence of data bytes is disclosed herein. The bits in each of the data bytes are selectively complemented in accordance with...  
WO/1997/050182A1
A system for encoding digital data with an M-ary (d, k) code to provide multi-level coded data where M > 2 comprises an M-ary (d, k) encoder for accepting digital input data. The M-ary (d, k) coder encodes the digital input data to produ...  
WO/1997/050180A1
A system for encoding digital data with an M-ary (d,k) code to provide multi-level coded data where M > 2 comprises an M-ary (d,k) encoder for accepting digital input data. The M-ary (d,k) coder encodes the digital input data to produce ...  
WO/1997/050181A1
A system for encoding digital data with an M-ary (d,k) code to provide multi-level coded data where M > 2 comprises an M-ary (d,k) encoder for accepting digital input data. The M-ary (d,k) coder encodes the digital input data to produce ...  
WO/1997/050179A1
A system for encoding digital data with an M-ary (d,k) code to provide multi-level coded data where M > 2 comprises an M-ary (d,k) encoder for accepting digital input data. The M-ary (d,k) coder encodes the digital input data to produce ...  
WO/1997/049187A1
An interface circuit (70) for use with process controllers permits analog signals (84) to be input to a process controller through a binary interface of the process controller and permits analog signals (94) to be output from the process...  
WO/1997/042715A1
A pulse width modulated digital-to-analog converter having a digital-to-analog pulse generator for outputting width modulated pulses in accordance with a digital control value. The generator includes a clock (14) for generating a clockin...  
WO/1997/037433A1
To correct non-linearity and noise in the conversion of a pulse code modulated signal (PCM) into a uniform pulse width modulated signal (UPWM), a model is made of the known non-linearity in the conversion by dividing a plurality of non-l...  
WO/1997/036408A2
A method and apparatus for producing a transition-controlled, DC-balanced sequence of characters from an input sequence of data bytes is disclosed herein. The bits in each of the data bytes are selectively complemented in accordance with...  
WO/1997/029485A1
The level of a reproduced RF signal (7a) is temporarily stored in an RF signal level storage (20) when the binary level of a channel bit is judged. The part of a channel bit data train which does not satisfy the conditions of a minimum c...  
WO/1997/022182A1
This digital modulation apparatus (DMA) includes ROM tables (201a, 201b, 201c, and 201d) for storing plural conversion tables (Tp(m) and Ts(m)) containing the runlength-limited code words (C) corresponding to the data words (D); end-runl...  

Matches 301 - 350 out of 5,341