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WO/2014/056276A1 |
Disclosed is a method for synchronizing mirrors between multi-point heterogeneous mail systems, the method comprising: a first mail system acquires in real time an active operation request of a to-be-synchronized user, the operation requ...
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WO/2014/055204A1 |
A method for plesiochronous clock generation for parallel wireline transceivers, includes: inputting, into at least one decoder (290), at least one digital frequency mismatch number; decoding, with the at least one decoder (290), the at ...
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WO/2014/053769A2 |
The invention relates to a method for transmitting useful information (15) between a transmitting terminal (10) and a receiving terminal (11) connected via a transmission channel (12), characterised in that the transmitting terminal (10)...
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WO/2014/055569A1 |
A method comprising generating a baseband information signal by mixing a received modulated carrier signal with a local oscillator (LO) signal having an LO frequency; obtaining baseband signal samples of the baseband information signal h...
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WO/2014/052972A1 |
A physical layer device provides for synchronization of clocks in a communication network. A place holder for an alignment marker is inserted into a frame to be transmitted. Once the placeholder alignment marker is inserted into the fram...
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WO/2014/048246A1 |
A frequency deviation estimation method. The method comprises: obtaining received data; removing, by using the size f_step of the frequency deviation, frequency deviation on the received data; performing sliding correlation of the receiv...
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WO/2014/048167A1 |
Disclosed are a system time synchronization device and method in a packet transport network, which relate to a packet transport network in optical communications. The system time synchronization device comprises a CPU, a time synchroniza...
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WO/2014/047606A2 |
Techniques for data synchronization between a first computing device coupled to at least one memory storing current data and a second computing device coupled to at least a second memory storing first encoded data and a copy of prior dat...
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WO/2014/044539A1 |
An electronic control device comprises a bus connection for connection to a bus line of a current-controlled bus, an evaluation device for sensing the current flowing through the bus connection in order to detect a digital message from a...
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WO/2014/045551A1 |
A reception circuit, wherein in the first operation mode, the operation of at least a first charge pump circuit (32) from amongst: a phase/frequency comparator (31); the first charge pump circuit (32); samplers, other than the specified ...
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WO/2014/042963A1 |
Aspects disclosed herein relate to improving acquisition for NFC load modulation (432). In one example, a communications device (402) is equipped to monitor (804) at least a complex component of load modulation (432) of a carrier signal ...
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WO/2014/040897A1 |
A circuit arrangement which is designed to output a voltage pulse on a bus line has a device which is designed to determine whether a voltage on the bus line has reached a specified threshold value.
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WO/2014/041592A1 |
The purpose of the present invention is to acquire a corrected time synchronized to a main clock device by calculating an accurate correction parameter even when propagation time for a synchronization signal is not constant. A main trans...
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WO/2014/041924A1 |
This clock data recovery device (1) generates a recovered clock and recovered data on the basis of a data in, and is provided with a signal selection unit (10), a phase delay unit (20), a time measurement unit (30), a phase selection uni...
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WO/2014/036642A1 |
There is provided a system and method for streaming content to a plurality of devices over a network. A first stream comprising a first live feed is received from a first source, a second stream comprising a second live feed received fro...
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WO/2014/032350A1 |
A method and node based on a seamless redundant ring network for increasing clock precision. When synchronize clock information transmitted by an adjacent node or by a master clock is received by the node in the seamless redundant ring n...
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WO/2014/029109A1 |
Embodiments of the present invention provide a method and a device of frame synchronization of a wireless system and the wireless system. The method of frame synchronization of the wireless system comprises: respectively delaying, in K s...
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WO/2014/029118A1 |
The present solution relates to a method for realizing service bit stream-independent delay equalization by automatic label insertion, and through research on technologies such as bit stream synchronization, cache adjustment and bit stre...
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WO/2014/029319A1 |
Provided are a method and device for estimating the frequency offset of a packet clock network node, the method comprising: determining a clock reference node and a to-be-detected node in a packet clock network; acquiring the transmittin...
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WO/2014/029253A1 |
The present invention relates to a method for extracting a client service clock from an OTN network, employing statistical control and an externally connected digital frequency synthesizer. Step 1, using an OTN system clock to synchronou...
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WO/2014/025713A1 |
Herein is a low power on-die 60 GHz distribution network for a beamforming system that can be scaled as the number of transmitters increases. The transmission line based power splitters and quadrature hybrids whose size would be proporti...
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WO/2014/023214A1 |
Disclosed are a method and a device for generating a beacon signal in a communication system. The method specifically comprises: a frequency-domain-synchronization-signal generating module generating a frequency-domain synchronization si...
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WO/2014/024407A1 |
A detection device (100), wherein a divided correlation detector (110) repeatedly performs, with regard to the first division pattern, a divided correlation process corresponding to the first division pattern on an input signal (DS) unti...
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WO/2014/022235A1 |
Systems, methods, and devices synchronize data streams by hashing received data frames to generate a sequence of hash values, comparing the generated hash value sequence to a hash value sequence received in a control stream, and processi...
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WO/2014/015480A1 |
A synchronisation method and device for transmit and receive symbols of an all-digital receiver. The method comprises the steps of: after receiving a sampling signal sent by a baseband processing chip, the clock signal of which is provid...
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WO/2014/018178A1 |
A system (10) for managing a reference clock signal includes an XO (22), a signal buffer (24) coupled to the XO (22) and configured to drive a reference clock signal generated by the XO (22), and a first IC (12) coupled to the signal buf...
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WO/2014/016993A1 |
A communication apparatus (13) according to the present invention is provided with: a storage unit (131) that stores in advance difference information (1311), which is the difference between first time information (t1) and second time in...
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WO/2014/017694A1 |
The present invention relates to a wireless clock system for sea and includes: a signal converter for converting a signal transmitted from a GPS terminal for a ship; and a network time protocol (NTP) server that receives a network protoc...
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WO/2014/013576A1 |
A frequency ratio detection circuit (10), in accordance with a clock signal of a circuit (2) which transmits a data signal, generates a pattern signal in which a clock signal value of a circuit (3) which receives the data signal has been...
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WO/2014/013601A1 |
A transmission device that has a plurality of logical lanes has: a receiver unit which receives signals including synchronization information between frames; a distribution unit which partitions data included in the received signal into ...
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WO/2014/010236A1 |
A data reception apparatus (3) determines an integrated number of bits by integrating the number of bits of a bit sequence, determines an integrated number of samples by integrating the number of samples obtained by oversampling each bit...
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WO/2014/004081A1 |
In one embodiment, an apparatus including a phase detector unit to determine a phase difference between a reference clock signal and a feedback clock signal. The apparatus further includes a controller unit to generate a delay signal bas...
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WO/2014/004767A1 |
In one embodiment, an apparatus may include a rising edge detector to detect a rising edge in a signal. The apparatus may also include a counter to perform a count to a first value based on an input clock signal. The apparatus may also i...
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WO/2014/002527A1 |
The present invention deters a false detection of a preamble by a preamble detection device that detects incoming preamble sequences that are transmitted by means of physical random access channels. This preamble detection device is equi...
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WO/2014/000106A1 |
Various exemplary embodiments relate to a method performed by a first network element, the method including: receiving first user inputs for mapping IEEE 1588 clock class into ITU-T G.781 quality levels; producing a first table that maps...
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WO/2014/004083A1 |
In one embodiment, an apparatus including a phase detector unit to determine a phase difference between an inverted reference clock signal and a feedback clock signal. The apparatus further includes a controller unit to generate a delay ...
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WO/2014/004225A1 |
In one embodiment, an apparatus may include a pulse generator to generate an oversampled clock signal. The apparatus may also include a sample and hold unit to provide at least two differential input signals based on the oversampled cloc...
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WO/2014/005119A1 |
A method, an apparatus, and a computer program product for communication within a wireless terminal. The method can be implemented using dedicated logic and managed and controlled by state machines and/or sequencers. Data received or pro...
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WO/2013/190602A1 |
A slave node (104) comprises: N clock replay units (105-107) which carry out a communication in correspondence with each of N master nodes (101-103), compute a propagation delay between each of the master nodes (101-103) and the slave no...
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WO/2013/191894A1 |
A system and a method in which a first frequency correction is determined for a frequency of a local oscillator with respect to a frequency of a first time slot of a received signal. The first frequency correction is applied to adjust th...
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WO/2013/189176A2 |
A multi-synchronization-domain time synchronization system, a multi-synchronization-domain time synchronization method and a cross-domain device. The method comprises: dividing a time synchronization network into a plurality of synchroni...
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WO/2013/185711A1 |
A method, a terminal access device, and a system for synchronously supporting time of a web UI terminal. The method comprises: the terminal access device obtaining self system time; and the access device connected to a terminal sending t...
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WO/2013/185513A1 |
Examples of the present disclosure provide a method and an apparatus for synchronization after restart of a FC switch. For example, when a FC switch which is restarted detects that a neighbor FC switch has already established an adjacenc...
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WO/2013/182228A1 |
There are provided measures for uplink control information signaling in inter-site downlink carrier aggregation scenarios. Such measures exemplarily comprise obtaining uplink transmission resources for an uplink control information trans...
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WO/2013/183319A1 |
The present invention relates to a reception device (20) that receives, by time-division from a plurality of transmission origins, burst signals that include a synchronization section and a subsequent data section. The reception device (...
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WO/2013/182009A1 |
Disclosed are a time synchronization method and system using WiFi-direct. The method comprises: a master control device obtaining from a base station standard date and time information used for time synchronization; establishing a WiFi-D...
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WO/2013/179349A1 |
A clock transfer circuit receives input data synchronized with a first clock and outputs the received input data as output data synchronized with a second clock having a different frequency. A write address control unit (23) operates in ...
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WO/2013/180766A1 |
A system can include a phase detector (105) configured to generate a phase error signal indicating a phase error of an input signal compared to an output signal and a first filter (110) coupled to the phase detector and configured to gen...
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WO/2013/179077A1 |
Versatility and flexibility of integrated circuits can be accomplished by remote control via a serial interface (102,122), such as SPI. Read/write accesses to the SPI slave (120) node can be achieved according to SPI protocol by the mast...
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WO/2013/180724A1 |
In one embodiment, an apparatus may include a de-serializer to convert serial data to parallel data, and a counter to provide an update signal based on a bit count of the serial data. The apparatus may further include a synchronizer to p...
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