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Matches 1 - 50 out of 298

Document Document Title
7453115
A capacitor structure having a dielectric layer disposed between two conductive electrodes, wherein the dielectric layer contains at least one charge trap site corresponding to a specific energy state. The energy states may be used to di...  
7449719
A gate insulating film is formed using a plasma on a three-dimensional silicon substrate surface having a plurality of crystal orientations. The plasma gate insulating film experiences no increase in interface state in any crystal orient...  
7439542
The present invention provides a method of integrated semiconductor devices such that different types of devices are formed upon a specific crystallographic orientation of a hybrid substrate. In accordance with the present invention, jun...  
7411215
To achieve promotion of stability of operational function of display device and enlargement of design margin in circuit design, in a display device including a pixel portion having a semiconductor element and a plurality of pixels provid...  
7410595
Refrigerant composition are disclosed which comprises: (a) pentafluoroethane, trifluoromethoxydifluoromethane or hexafluorocyclopropane, or a mixture of two or more thereof, in an amount of at least 75% based on the weight of the compos...  
7408193
A semiconductor device packaged in three dimensions comprises a first thin film device, a second thin film device, and a third thin film device, each of the first, second, and third thin film devices comprising a first insulating film, a...  
7402496
A complementary metal-oxide-semiconductor (CMOS) device includes a substrate with a first active region and a second active region; a first gate structure and a second gate structure, respectively disposed on the first active region and ...  
7388248
A capacitor structure having a dielectric layer disposed between two conductive electrodes, wherein the dielectric layer contains at least one charge trap site corresponding to a specific energy state. The energy states may be used to di...  
7381989
A stacked semiconductor device comprises a lower transistor formed on a semiconductor substrate, a lower interlevel insulation film formed on the semiconductor substrate over the lower transistor, an upper transistor formed on the lower ...  
7368788
Complementary metal oxide semiconductor (CMOS) static random access memory (SRAM) cells include at least a first inverter formed in a fin-shaped pattern of stacked semiconductor regions of opposite conductivity type. In some of these emb...  
7355202
A gate-insulated thin film transistor is disclosed. One improvement is that the thin film transistor is formed on a substrate through a blocking layer in between so that it is possible to prevent the transistor from being contaminated wi...  
7348598
A TFT, in which source and drain electrodes having concentric circular shapes are formed, reduces an OFF current caused by a leakage current and optimizes an ON current and a stray capacitance between gate and source electrodes. The TFT ...  
7327022
A novel micro optical system as a platform technology for electrical and optical interconnections, thermal and mechanical assembly and integration of electronic, optoelectronic, passive and active components. This platform provides optic...  
7326960
The invention includes a method of forming semiconductor circuitry wherein a first semiconductor structure comprising a first monocrystalline semiconductor substrate is bonded to a second semiconductor structure comprising a second monoc...  
7285798
Thin film transistor based three-dimensional CMOS inverters utilizing a common gate bridged between a PFET device and an NFET device. One or both of the NFET and PFET devices can have an active region extending into both a strained cryst...  
7274072
The present invention provides a 6T-SRAM semiconducting structure including a substrate having an SOI region and a bulk-Si region, wherein the SOI region and the bulk-Si region have a same or differing crystallographic orientation; an is...  
7262464
A semiconductor device includes a substrate with an insulating surface and a single crystal semiconductor layer, which is bonded to the insulating surface of the substrate. The device further includes a first insulating layer, which is p...  
7262431
A polycrystal thin film forming method comprising the step of forming a semiconductor thin film on a substrate 14 , and the step of flowing a heated gas to the semiconductor thin film while an energy beam 38 is being applied to the se...  
7250645
A fin field effect transistor (FinFET) includes a reversed T-shaped fin. The FinFET further includes source and drain regions formed adjacent the reversed T-shaped fin. The FinFET further includes a dielectric layer formed adjacent surfa...  
7250628
The invention includes SOI constructions containing one or more memory cells which include a transistor and a thyristor. In one aspect, a scalable GLTRAM cell provides DRAM-like density and SRAM-like performance. The memory cell includes...  
7247528
Methods of fabricating a semiconductor integrated circuit having thin film transistors using an SEG technique are provided. The methods include forming an inter-layer insulating layer on a single-crystalline semiconductor substrate. A si...  
7238963
A self-aligned LDD TFT and a fabrication method thereof. A substrate is provided, on which a semiconductor layer is formed. A first masking layer is provided over a first region of the portion of the semiconductor layer. The first maskin...  
7230270
In a method of forming a double gate device, a buried insulating layer having a thickness of less than about 30 nm is formed on a first substrate. A second substrate is formed on the buried insulating layer. A pad layer is formed over th...  
7214963
A column select circuit in a Static Random Access Memory (SRAM) having a three-dimensional layout can include a lower CMOS layer in a substrate and an upper NMOS layer above the lower layer. An intermediate PMOS layer is located between ...  
7205194
A method of fabricating a flash memory cell having a split gate structure. A sacrificial layer is formed on a floating gate layer formed on a semiconductor substrate. The sacrificial layer is etched to form an opening exposing a portion ...  
7193270
A semiconductor device which, even when a vertical transistor is adopted, is able to prevent a product yield from decreasing and performance from deteriorating, and at the same time, to achieve high-density integration of chips and high ...  
7176479
A nitride compound semiconductor element having improved characteristics, productivity and yield. A nitride compound semiconductor element includes: a sapphire substrate; a first single crystalline layer of AlN formed on said sapphire su...  
7166861
The present invention provides a thin-film transistor that is formed by using a patterning method capable of forming a semiconductor channel layer in sub-micron order and a method for manufacturing thereof that provides a thin-film trans...  
7151277
A method of etching silicon carbide using a nonmetallic mask layer. The method includes providing a silicon carbide substrate; forming a non-metallic mask layer by applying a layer of material on the substrate; patterning the mask layer ...  
7148510
A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long, and moisture in the interlayer insulatin...  
7145175
According to the invention, a plurality of semiconductor devices which are required to have conformance are formed from crystalline semiconductor films having uniform crystallinity on the same line, and a semiconductor circuit in which v...  
7135724
A field effect transistor (“FET”) is provided which includes a gate stack overlying a single-crystal semiconductor region of a substrate, a pair of first spacers disposed over sidewalls of said gate stack, and a pair of regions consi...  
7122834
A semiconductor apparatus includes a substrate; an adhesion layer disposed on the substrate, the adhesion layer mainly consisting of semiconductor material; and at least one semiconductor thin film including at least one semiconductor de...  
7115897
A semiconductor circuit configuration has at least one pair of complementary operating field-effect transistors in which each transistor has a gate region, first and second source/drain regions and also a channel region with or made of a...  
7112822
A semiconductor device includes a first semiconductor layer formed above a first region of a supporting substrate with a buried oxide layer disposed therebetween and a second semiconductor layer formed on a second region of the supportin...  
7105866
High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline...  
7102166
A hybrid orientation semiconductor structure and method of forming the same. The structure includes (a) a semiconductor substrate comprising a first semiconductor material having a first lattice orientation; (b) a back gate region on the...  
7098478
The invention provides a semiconductor memory device comprising a plurality of word lines, a plurality of bit lines, and a plurality of static memory cells each having a first, second, third, fourth, fifth, and sixth transistors. While e...  
7095043
An (SiGe)C layer having a stoichiometric ratio of about 1:1 is locally formed on an Si layer, a large forbidden band width semiconductor device is prepared inside the layered structure thereof and an Si semiconductor integrated circuit i...  
7078275
An object is to provide a semiconductor device manufacturing method which makes possible a thin film transistor which is little affected by crystal grain boundaries, even when the channel width of the thin film transistor is made larger ...  
7064345
The invention relates to an organic field effect transistor with off-set threshold voltage. Said OFET has an intermediate layer that defines a space charge region between the insulator and the semiconductor.  
7026193
In a circuit including at least one thin film transistor formed on an insulating substrate, a region 105 to which metal elements that promote crystallinity are added is disposed apart from a semiconductor island region 101 that forms...  
6943373
The invention provides a semiconductor memory device comprising a plurality of word lines, a plurality of bit lines, and a plurality of static memory cells each having a first, second, third, fourth, fifth, and sixth transistors. While e...  
6933568
The present invention relates to a process for vapor depositing a low dielectric insulating film, a thin film transistor using the same, and a preparation method thereof, and more particularly to a process for vapor deposition of lowdiel...  
6930326
According to the invention, a plurality of semiconductor devices which are required to have conformance are formed from crystalline semiconductor films having uniform crystallinity on the same line, and a semiconductor circuit in which v...  
6924560
A method and system is disclosed for an SRAM device cell having at least one device of a first semiconductor type and at lease one device of a second semiconductor type. The cell has a first device of the first type constructed as a part...  
6909115
There is disclosed a semiconductor device and a method of fabricating the semiconductor device in which a heat treatment time required for crystal growth is shortened and a process is simplified. Two catalytic element introduction region...  
6906384
A semiconductor device includes first and second semiconductor layers and first and second MOS transistors. The first semiconductor layer is provided on and electrically connected to the semiconductor substrate. The second semiconductor ...  
6894337
A method facilitates the formation of a stacked fin structure for a semiconductor device that includes a substrate. The method includes forming one or more oxide layers on the substrate and forming one or more amorphous silicon layers in...  
6894310
The invention includes a method of forming semiconductor circuitry. A monocrystalline silicon substrate is provided, and a mask is formed which covers a first portion of the substrate and leaves a second portion uncovered. A trench is fo...  

Matches 1 - 50 out of 298