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Document	Document Title
7474002	Semiconductor device having dielectric film having aperture portion In the semiconductor device having a structure in which a plurality of layers are built-up by layers made of different materials or layers including various formed patterns, it is an object to provide a method which smoothing surface can...
7473953	Method for fabricating metallic bit-line contacts A memory cell and method of forming the same is provided. To make contact between a bit line and a select transistor of a dynamic memory unit on a semiconductor wafer, a contact hole is filled with a metal or a metal alloy. A liner layer...
7456459	Design of low inductance embedded capacitor layer connections The present invention discloses capacitors having via connections and electrodes designed such that they provide a low inductance path, thus reducing needed capacitance, while enabling the use of embedded capacitors for power delivery an...
7453115	Dielectric relaxation memory A capacitor structure having a dielectric layer disposed between two conductive electrodes, wherein the dielectric layer contains at least one charge trap site corresponding to a specific energy state. The energy states may be used to di...
7432149	CMOS on SOI substrates with hybrid crystal orientations Methods and structures for CMOS devices with hybrid crystal orientations using double SOI substrates is provided. In accordance with preferred embodiments, a manufacturing sequence includes the steps of forming an SOI silicon epitaxy lay...
7425724	Memory device and method of production and method of use of same and semiconductor device and method of production of same A memory device able to be produced without requiring high precision alignment, a method of production of the same, and a method of use of a memory device produced in this way, wherein a peripheral circuit portion (first semiconductor po...
7420261	Bulk nitride mono-crystal including substrate for epitaxy The invention relates to a substrate for epitaxy, especially for preparation of nitride semiconductor layers. Invention covers a bulk nitride mono-crystal characterized in that it is a mono-crystal of gallium nitride and its cross-sectio...
7414278	Semiconductor device with shallow trench isolation which controls mechanical stresses The semiconductor device comprises a semiconductor substrate 10 with a trench 16 a and a trench 16 b formed in; a device isolation film 32 a buried in the trench 16 a and including a liner film including a silicon nitride film ...
7411215	Display device and method of fabricating the same To achieve promotion of stability of operational function of display device and enlargement of design margin in circuit design, in a display device including a pixel portion having a semiconductor element and a plurality of pixels provid...
7405122	Methods for fabricating a capacitor A method for forming a capacitor comprises providing a substrate. A bottom electrode material layer is formed on the substrate. A first mask layer is formed on the bottom electrode material layer. A second mask layer is formed on the fir...
7390730	Method of fabricating a body capacitor for SOI memory A semiconductor structure having a body capacitance plate, which is formed with a process that assures that the body capacitance plate is self-aligned to both the source line (SL) diffusion and the bitline diffusion is provided. Thus the...
7388248	Dielectric relaxation memory A capacitor structure having a dielectric layer disposed between two conductive electrodes, wherein the dielectric layer contains at least one charge trap site corresponding to a specific energy state. The energy states may be used to di...
7375376	Semiconductor display device and method of manufacturing the same A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long, and moisture in the interlayer insulatin...
7368752	DRAM memory cell A DRAM memory cell is provided with a selection transistor, which is arranged horizontally at a semiconductor substrate surface and has a first source/drain electrode, a second source/drain electrode, a channel layer arranged between the...
7365383	Method of forming an EPROM cell and structure therefor An EPROM cell includes a control gate and a control transistor. A portion of the control transistor is formed as a portion of the control gate.
7361933	Semiconductor device A semiconductor device includes a first trench capacitor formed in a first trench, a second trench capacitor formed in a second trench, a first gate electrode disposed above a first active area, a second gate electrode disposed above a s...
7355231	Memory circuitry with oxygen diffusion barrier layer received over a well base A method of forming memory circuitry having a memory array having a plurality of memory capacitors and having peripheral memory circuitry operatively configured to write to and read from the memory array, includes forming a dielectric we...
7355203	Use of gate electrode workfunction to improve DRAM refresh This invention relates to a method and resulting structure, wherein a DRAM may be fabricated by using silicon midgap materials for transistor gate electrodes, thereby improving refresh characteristics of access transistors. The threshold...
7348598	Thin film transistor and liquid crystal display device using the same A TFT, in which source and drain electrodes having concentric circular shapes are formed, reduces an OFF current caused by a leakage current and optimizes an ON current and a stray capacitance between gate and source electrodes. The TFT ...
7342272	Flash memory with recessed floating gate A flash memory device where the floating gate of the flash memory is defined by a recessed access device. The use of a recessed access device results in a longer channel length with less loss of device density. The floating gate can also...
7339191	Capacitors having doped aluminum oxide dielectrics Doped aluminum oxide layers having a porous aluminum oxide layer and methods of their fabrication. The porous aluminum oxide layer may be formed by evaporation physical vapor deposition techniques to facilitate formation of a high-purity...
7335934	Integrated circuit device, and method of fabricating same There are many inventions described and illustrated herein. In a first aspect, the present invention is directed to integrated circuit device including SOI logic transistors and SOI memory transistors, and method for fabricating such a d...
7332418	High-density single transistor vertical memory gain cell A memory cell which is formed on a substrate of a first conductivity type. A pillar of the first conductivity type extends vertically upward from the substrate. A source region of a second conductivity type is formed in the substrate ext...
7326985	Method for fabricating metallic bit-line contacts A memory cell and method of forming the same is provided. To make contact between a bit line and a select transistor of a dynamic memory unit on a semiconductor wafer, a contact hole is filled with a metal or a metal alloy. A liner layer...
7323736	Method to form both high and low-k materials over the same dielectric region, and their application in mixed mode circuits A new method of provided for forming in one plane layers of semiconductor material having both high and low dielectric constants. Layers, having selected and preferably non-identical parameters of dielectric constants, are successively d...
7321145	Method and apparatus for operating nonvolatile memory cells with modified band structure A nonvolatile memory cell with a charge storage structure is read by measuring current (such as band-to-band current) between the substrate region of the memory cell and at least one of the current carrying nodes of the memory cell. To e...
7312490	Vertical memory device and method Method and apparatus are described for a memory cell includes a substrate, a body extending vertically from the substrate, a first gate having a vertical member and a horizontal member and a second gate comprising a vertical member and a...
7298002	Hemispherical silicon grain capacitor with variable grain size A semiconductor device includes cylindrical capacitors each including corresponding cylindrical electrodes. Each cylindrical electrode includes hemispherical silicon grains. The hemispherical silicon grains protruding from an upper regio...
7294856	Electro-optical device and electronic apparatus To provide an electro-optical device comprising a thin film having a uniform thickness, which is formed by drying liquid droplets filled in a liquid droplet ejection region surrounded by a partition. An electro-optical device comprises p...
7282803	Integrated electronic circuit comprising a capacitor and a planar interference inhibiting metallic screen An electronic circuit includes a substrate. A capacitor and at least one semiconductor component are supported by a surface of the substrate. A substantially planar screen, oriented parallel to the surface of the substrate and made of me...
7276753	Dynamic random access memory cell and fabricating method thereof A method of fabricating a dynamic random access memory cell is provided. A substrate having a patterned mask layer thereon and a deep trench therein is provided. The patterned mask layer exposes the deep trench. A deep trench capacitor i...
7276733	Select lines for NAND memory devices A NAND memory array has a select line coupled to each of a plurality of NAND strings of memory cells of the memory array. The select line has a select gate at each intersection of one of the plurality of NAND strings and the select line....
7271413	Semiconductor constructions The invention includes semiconductor constructions containing vertically-extending pillars, and methods for forming such constructions. The vertically-extending pillars can be incorporated into transistor devices, and can contain vertica...
7268384	Semiconductor substrate having first and second pairs of word lines The invention includes methods of forming memory circuitry. In one implementation, a semiconductor substrate includes a pair of word lines having a bit node received therebetween. A bit node contact opening is formed within insulative ma...
7262464	Semiconductor device with single crystal semiconductor layer(s) bonded to insulating surface of substrate A semiconductor device includes a substrate with an insulating surface and a single crystal semiconductor layer, which is bonded to the insulating surface of the substrate. The device further includes a first insulating layer, which is p...
7262452	Method of forming DRAM device having capacitor and DRAM device so formed In a method of forming a DRAM device having a capacitor and a DRAM device so formed, an interlayer dielectric having at least one layer is formed on a semiconductor substrate. The interlayer dielectric layer and a predetermined portion o...
7251192	Register read for volatile memory Data not stored in the DRAM array of a SDRAM module is read from the SDRAM module in a synchronous data transfer. The data transfer, referred to as register read command/operation, resembles a read command/operation directed to data stor...
7250649	Capacitor of a memory device and fabrication method thereof A capacitor of a memory device, and a method of fabricating the same, includes a lower electrode electrically coupled to a doping region of a transistor structure, the lower electrode having a metal electrode and a metal oxide electrode,...
7247528	Methods of fabricating semiconductor integrated circuits using selective epitaxial growth and partial planarization techniques Methods of fabricating a semiconductor integrated circuit having thin film transistors using an SEG technique are provided. The methods include forming an inter-layer insulating layer on a single-crystalline semiconductor substrate. A si...
7244981	Scalable high performance non-volatile memory cells using multi-mechanism carrier transport A plurality of select gates are formed over a substrate. In one embodiment, the select gates are formed vertically on the sidewalls of trenches. The substrate includes a plurality of diffusion regions that are each formed between a pair ...
7232745	Body capacitor for SOI memory description A semiconductor structure having a body capacitance plate, which is formed with a process that assures that the body capacitance plate is self-aligned to both the source line (SL) diffusion and the bitline diffusion is provided. Thus the...
7230876	Register read for volatile memory Data not stored in the DRAM array of a SDRAM module is read from the SDRAM module in a synchronous data transfer. The data transfer, referred to as register read command/operation, resembles a read command/operation directed to data stor...
7230316	Semiconductor device having transferred integrated circuit It is an object to provide a semiconductor device integrating various elements without using a semiconductor substrate, and a method of manufacturing the same. According to the present invention, a layer to be separated including an indu...
7227184	Active matrix organic electro luminescence display device and manufacturing method for the same An active matrix organic electro luminescent display (ELD) device comprises a substrate, first and second active layers formed of polycrystalline silicon on the substrate, first source and drain regions and second source and drain region...
7226845	Semiconductor constructions, and methods of forming capacitor devices The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insul...
7208813	Capacitor layout orientation The disclosed embodiments relate to a plurality of capacitive memory elements disposed on a substrate. The substrate may comprise a processor, a memory device or other integrated circuit device. The capacitive memory elements may have a ...
7206215	Antifuse having tantalum oxynitride film and method for making same A capacitor has a tantalum oxynitride film. One method for making the film comprises forming a bottom plate electrode and then forming a tantalum oxide film on the bottom plate electrode. Nitrogen is introduced to form a tantalum oxynitr...
7205633	Capacitor layout orientation The disclosed embodiments relate to a plurality of capacitive memory elements disposed on a substrate. The substrate may comprise a processor, a memory device or other integrated circuit device. The capacitive memory elements may have a ...
7205194	Method of fabricating a flash memory cell A method of fabricating a flash memory cell having a split gate structure. A sacrificial layer is formed on a floating gate layer formed on a semiconductor substrate. The sacrificial layer is etched to form an opening exposing a portion ...
7199415	Conductive container structures having a dielectric cap Container structures for use in integrated circuits and methods of their manufacture. The container structures have a dielectric cap on the top of a conductive container to reduce the risk of container-to-container shorting by insulating...

Matches 1 - 50 out of 214	1 2 3 4 5 >