| Document |
Document Title |
|
7449719 |
A gate insulating film is formed using a plasma on a three-dimensional silicon substrate surface having a plurality of crystal orientations. The plasma gate insulating film experiences no increase in interface state in any crystal orient...
|
|
7449712 |
A CMOS image sensor includes a substrate including silicon, a silicon germanium (SiGe) epitaxial layer formed over the substrate, the SiGe epitaxial layer formed through epitaxial growth and doped with a predetermined concentration level...
|
|
7439542 |
The present invention provides a method of integrated semiconductor devices such that different types of devices are formed upon a specific crystallographic orientation of a hybrid substrate. In accordance with the present invention, jun...
|
|
7427799 |
A CMOS image sensor and a method for fabricating the same is disclosed, to enhance the image-sensing efficiency by forming a concave lens area for improving the light-condensing efficiency in a planarization layer formed before a micro-l...
|
|
7417253 |
An active layer of an NTFT includes a channel forming region, at least a first impurity region, at least a second impurity region and at least a third impurity region therein. Concentrations of an impurity in each of the first, second an...
|
|
7411215 |
To achieve promotion of stability of operational function of display device and enlargement of design margin in circuit design, in a display device including a pixel portion having a semiconductor element and a plurality of pixels provid...
|
|
7400004 |
Regions of an integrated circuit are isolated by a structure that includes at least one isolating trench on the periphery of an active area. The trench is deep, extending at least about 0.5 μm into the substrate. The isolating structure...
|
|
7391054 |
The active layer of an n-channel TFT is formed with a channel forming region, a first impurity region, a second impurity region and a third impurity region. In this case, the concentration of the impurities in each of the impurity region...
|
|
7387919 |
In one embodiment, an intrinsic single crystalline semiconductor plug is formed to pass through a lower insulating layer using a selective epitaxial growth process employing a node impurity region as a seed layer, and a single crystallin...
|
|
7381990 |
A thin film transistor with multiple gates is fabricated using a super grain silicon (SGS) crystallization process. The thin film transistor a semiconductor layer formed in a zigzag shape on an insulating substrate, and a gate electrode ...
|
|
7351617 |
To provide a technique required for purifying the interface between an active layer and an insulating film. On a substrate ( 101 ), a gate wiring ( 103 ) is formed and the surface thereof is covered with a gate oxide film ( 104 ). Then, ...
|
|
7348598 |
A TFT, in which source and drain electrodes having concentric circular shapes are formed, reduces an OFF current caused by a leakage current and optimizes an ON current and a stray capacitance between gate and source electrodes. The TFT ...
|
|
7317207 |
To provide TFT of improved low-temperature polycrystalline layer that has higher electron mobility and assures less fluctuation in manufacture in view of realizing a liquid-crystal display device having a large display area by utilizing ...
|
|
7315063 |
A CMOS transistor structure and related method of manufacture are disclosed in which a first conductivity type MOS transistor comprises an enhancer and a second conductivity type MOS transistor comprises a second spacer formed of the sam...
|
|
7304325 |
A semiconductor laminate containing a light-emitting layer is etched to reveal a side surface. A reflection surface opposite to the side surface of the semiconductor laminate is provided in one and the same chip as the semiconductor lami...
|
|
7297978 |
After an amorphous semiconductor thin film is crystallized by utilizing a catalyst element, the catalyst element is removed by performing a heat treatment in an atmosphere containing a halogen element. A resulting crystalline semiconduct...
|
|
7291862 |
A method for producing a thin film transistor substrate includes the steps of: (i) depositing an amorphous semiconductor film on a transparent insulating substrate; (ii) patterning the amorphous semiconductor film so as to form insular a...
|
|
7288787 |
The present invention provides a thin-film transistor offering a higher electron (or hole) mobility, a method for manufacturing the thin-film transistor, and a display using the thin-film transistor. The present invention provides a thin...
|
|
7285798 |
Thin film transistor based three-dimensional CMOS inverters utilizing a common gate bridged between a PFET device and an NFET device. One or both of the NFET and PFET devices can have an active region extending into both a strained cryst...
|
|
7279712 |
Forming a back-illuminated type CMOS image sensor, includes process for formation of a registration mark on the wiring side of a silicon substrate during formation of an active region or a gate electrode. A silicide film using an active ...
|
|
7279711 |
The present invention relates to a semiconductor device including a circuit composed of thin film transistors having a novel GOLD (Gate-Overlapped LDD (Lightly Doped Drain)) structure. The thin film transistor comprises a first gate elec...
|
|
7271414 |
A semiconductor device includes a transistor of a first conductivity type and a transistor of a second conductivity type. The transistor of the first conductivity type includes a first gate portion formed on a first region of a semicondu...
|
|
7262469 |
A semiconductor device includes a thin film transistor including a semiconductor layer that includes a channel region, a source region and a drain region, a gate insulating film provided on the semiconductor layer, and a gate electrode f...
|
|
7262464 |
A semiconductor device includes a substrate with an insulating surface and a single crystal semiconductor layer, which is bonded to the insulating surface of the substrate. The device further includes a first insulating layer, which is p...
|
|
7256081 |
A semiconductor device is provided with a stressed channel region, where the stresses film causing the stress in the stress channel region can extend partly or wholly under the gate structure of the semiconductor device. In some embodime...
|
|
7253051 |
A SRAM of complete CMOS type having its memory cell composed of six MISFETs, in which a pair of local wiring lines for connecting the input/output terminals of CMOS inverters are formed of a refractory metal silicide layer formed over a ...
|
|
7250657 |
A layout structure of a static random access memory (SRAM) cell array includes at least one SRAM cell area, oxide defined (OD) area and strapping cell area. The SRAM cell area has a longitudinal side being at least twice longer than a tr...
|
|
7244963 |
A double gate silicon over insulator transistor may be formed wherein the bottom gate electrode is formed of a doped diamond film. The doped diamond film may be formed in the process of semiconductor manufacture resulting in an embedded ...
|
|
7241640 |
Solder ball assembly for a semiconductor device and method of fabricating the same is described. In one example, a solder mask is formed on a substrate having an aperture exposing at least a portion of a conductive pad of the substrate. ...
|
|
7238963 |
A self-aligned LDD TFT and a fabrication method thereof. A substrate is provided, on which a semiconductor layer is formed. A first masking layer is provided over a first region of the portion of the semiconductor layer. The first maskin...
|
|
7238567 |
According to one embodiment of the invention, a method for integrating low Schottky barrier metal source/drain includes providing a substrate, forming an epitaxial SiGe layer outwardly from the substrate, forming an epitaxial Si layer ou...
|
|
7230270 |
In a method of forming a double gate device, a buried insulating layer having a thickness of less than about 30 nm is formed on a first substrate. A second substrate is formed on the buried insulating layer. A pad layer is formed over th...
|
|
7227201 |
The present invention provides a complementary metal oxide semiconductor (CMOS) device, a method of manufacture therefor, and an integrated circuit including the same. The CMOS device ( 100 ), in an exemplary embodiment of the present in...
|
|
7220993 |
A thin film transistor and method for fabricating the same are provided. The thin film transistor comprises a semiconductor layer having a MILC region that has first crystalline grains crystallized by MILC method and second crystalline g...
|
|
7208784 |
A single-electron transistor includes a projecting feature, such as a pyramid, that projects from a face of a substrate. A first electrode is provided on the substrate face that extends onto the projecting feature. A second electrode is ...
|
|
7208764 |
A liquid crystal display device 100 comprises a thin film transistor T, a source (data) line 26, a color filter 23, a pixel electrode 24 and the like. After a gate electrode 13, a gate insulating film 16, and a channel region...
|
|
7176522 |
A method comprises forming a first semiconductor device in a substrate, where the first semiconductor device comprises a gate structure, a spacer disposed on sidewalls of the gate structure, the spacer having a first thickness, and raise...
|
|
7176479 |
A nitride compound semiconductor element having improved characteristics, productivity and yield. A nitride compound semiconductor element includes: a sapphire substrate; a first single crystalline layer of AlN formed on said sapphire su...
|
|
7166861 |
The present invention provides a thin-film transistor that is formed by using a patterning method capable of forming a semiconductor channel layer in sub-micron order and a method for manufacturing thereof that provides a thin-film trans...
|
|
7154136 |
Regions of an integrated circuit are isolated by a structure that includes at least one isolating trench on the periphery of an active area. The trench is deep, extending at least about 0.5 μm into the substrate. The isolating structure...
|
|
7148510 |
A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long, and moisture in the interlayer insulatin...
|
|
7148507 |
A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of ...
|
|
7141821 |
The active layer of an n-channel TFT is formed with a channel forming region, a first impurity region, a second impurity region and a third impurity region. In this case, the concentration of the impurities in each of the impurity region...
|
|
7138658 |
A semiconductor device having performance comparable with a MOSFET is provided. An active layer of the semiconductor device is formed by a crystalline silicon film crystallized by using a metal element for promoting crystallization, and ...
|
|
7135724 |
A field effect transistor (“FET”) is provided which includes a gate stack overlying a single-crystal semiconductor region of a substrate, a pair of first spacers disposed over sidewalls of said gate stack, and a pair of regions consi...
|
|
7129522 |
Protrusions called ridges are formed on the surface of a crystalline semiconductor film formed by a laser crystallization method or the like. A heat absorbing layer are formed below a semiconductor film. When the semiconductor film is cr...
|
|
7119369 |
A field-effect transistor has a channel region in a bulk semiconductor substrate, a first source/drain region on a first side of the channel region, a second source/drain region on a second side of the channel region, and an extension of...
|
|
7119365 |
A polycrystalline Si thin film and a single crystal Si thin film are formed on an SiO 2 film deposited on an insulating substrate. A polycrystalline Si layer is grown by thermally crystallizing an amorphous Si thin film so as to form th...
|
|
7118952 |
A method of fabricating a transistor comprises the steps of: forming a gate electrode above a substrate made of a first semiconductor material having a first lattice spacing, forming recesses in the semiconductor substrate at respective ...
|
|
7112822 |
A semiconductor device includes a first semiconductor layer formed above a first region of a supporting substrate with a buried oxide layer disposed therebetween and a second semiconductor layer formed on a second region of the supportin...
|