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7473953 |
A memory cell and method of forming the same is provided. To make contact between a bit line and a select transistor of a dynamic memory unit on a semiconductor wafer, a contact hole is filled with a metal or a metal alloy. A liner layer...
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7473927 |
A pixel structure having a storage capacitor therein is provided. The pixel structure comprises a substrate, a first capacitor electrode, a capacitor dielectric layer, a second capacitor electrode, a passivation layer and a pixel electro...
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7462902 |
A nonvolatile memory is provided. The memory includes a select transistor and a trench transistor. The select transistor is formed on the substrate. The select transistor includes a first gate formed on the substrate and first and second...
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7456459 |
The present invention discloses capacitors having via connections and electrodes designed such that they provide a low inductance path, thus reducing needed capacitance, while enabling the use of embedded capacitors for power delivery an...
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7439565 |
An active device array substrate including a substrate, a plurality of active devices, a plurality of the first lead lines, a plurality of the second lead lines and a first floating light-shielding layer is provided. The substrate has a ...
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7432527 |
A TFT substrate comprises a substrate, a gate electrode and a lower electrode of a capacitor formed thereon, a first insulating layer formed thereon, a channel layer above the gate electrode and a lower layer of an upper electrode of the...
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7414278 |
The semiconductor device comprises a semiconductor substrate 10 with a trench 16 a and a trench 16 b formed in; a device isolation film 32 a buried in the trench 16 a and including a liner film including a silicon nitride film ...
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7384476 |
A method for crystallizing silicon is provided. The method includes: forming an amorphous silicon layer on a substrate; aligning a mask above the substrate, the mask being divided into a plurality of blocks, each block having at least tw...
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7375376 |
A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long, and moisture in the interlayer insulatin...
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7368752 |
A DRAM memory cell is provided with a selection transistor, which is arranged horizontally at a semiconductor substrate surface and has a first source/drain electrode, a second source/drain electrode, a channel layer arranged between the...
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7365412 |
A capacitor structure uses an aperture located within a dielectric layer in turn located over a substrate. A pair of conductor interconnection layers embedded within the dielectric layer terminates at a pair of opposite sidewalls of the ...
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7355231 |
A method of forming memory circuitry having a memory array having a plurality of memory capacitors and having peripheral memory circuitry operatively configured to write to and read from the memory array, includes forming a dielectric we...
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7355230 |
A transistor array for semiconductor memory devices is provided. A plurality of semiconductor pillars extending outwardly from a bulk section of a semiconductor substrate is arranged in rows and columns. Each pillar forms an active area ...
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7355203 |
This invention relates to a method and resulting structure, wherein a DRAM may be fabricated by using silicon midgap materials for transistor gate electrodes, thereby improving refresh characteristics of access transistors. The threshold...
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7348598 |
A TFT, in which source and drain electrodes having concentric circular shapes are formed, reduces an OFF current caused by a leakage current and optimizes an ON current and a stray capacitance between gate and source electrodes. The TFT ...
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7339191 |
Doped aluminum oxide layers having a porous aluminum oxide layer and methods of their fabrication. The porous aluminum oxide layer may be formed by evaporation physical vapor deposition techniques to facilitate formation of a high-purity...
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7335934 |
There are many inventions described and illustrated herein. In a first aspect, the present invention is directed to integrated circuit device including SOI logic transistors and SOI memory transistors, and method for fabricating such a d...
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7332418 |
A memory cell which is formed on a substrate of a first conductivity type. A pillar of the first conductivity type extends vertically upward from the substrate. A source region of a second conductivity type is formed in the substrate ext...
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7326985 |
A memory cell and method of forming the same is provided. To make contact between a bit line and a select transistor of a dynamic memory unit on a semiconductor wafer, a contact hole is filled with a metal or a metal alloy. A liner layer...
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7315054 |
In one embodiment, a method of controlling the across-chip line-width variation (ACLV) on a semiconductor integrated circuit includes forming an ACLV controlled region including a plurality of semiconductor devices each having a gate str...
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7306979 |
A method of fabricating a thin film transistor substrate for a display device is provided. The method includes the steps of forming a gate line and a gate electrode connected to the gate line; forming a gate insulating film disposed cove...
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7291556 |
A dielectric layer is formed on a region of a microelectronic substrate. A sacrificial layer is formed on the dielectric layer, and portions of the sacrificial layer and the dielectric layer are removed to form an opening that exposes a ...
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7282803 |
An electronic circuit includes a substrate. A capacitor and at least one semiconductor component are supported by a surface of the substrate. A substantially planar screen, oriented parallel to the surface of the substrate and made of me...
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7274036 |
A TFT including a gate metallic layer, a body layer doped with a dopant having a first polarity, a source layer and a drain layer doped with a dopant having a second polarity, a semiconductor layer formed between the source layer and the...
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7268384 |
The invention includes methods of forming memory circuitry. In one implementation, a semiconductor substrate includes a pair of word lines having a bit node received therebetween. A bit node contact opening is formed within insulative ma...
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7265050 |
A protection layer is formed on a semiconductor substrate having a cell array region and an alignment key region. A plurality of data storage elements are formed on the protection layer in the cell array region. An insulating layer is fo...
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7262452 |
In a method of forming a DRAM device having a capacitor and a DRAM device so formed, an interlayer dielectric having at least one layer is formed on a semiconductor substrate. The interlayer dielectric layer and a predetermined portion o...
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7250649 |
A capacitor of a memory device, and a method of fabricating the same, includes a lower electrode electrically coupled to a doping region of a transistor structure, the lower electrode having a metal electrode and a metal oxide electrode,...
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7227173 |
A method of forming a semiconductor device includes the following steps: providing a plurality of semiconductor layers; providing means for coupling signals to and/or from layers of the device; providing a quantum well disposed between a...
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7226845 |
The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insul...
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7223693 |
Methods are provided for fabricating contacts in integrated circuit devices, such as phase-change memories. A protection layer and a sacrificial layer are sequentially formed on a semiconductor substrate. A contact hole is formed through...
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7211867 |
A memory cell which is formed on a fully depleted SOI or other semiconductor thin film and which operates at low voltage without needing a conventional large capacitor is provided as well as a memory cell array. The semiconductor thin fi...
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7208813 |
The disclosed embodiments relate to a plurality of capacitive memory elements disposed on a substrate. The substrate may comprise a processor, a memory device or other integrated circuit device. The capacitive memory elements may have a ...
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7206215 |
A capacitor has a tantalum oxynitride film. One method for making the film comprises forming a bottom plate electrode and then forming a tantalum oxide film on the bottom plate electrode. Nitrogen is introduced to form a tantalum oxynitr...
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7205633 |
The disclosed embodiments relate to a plurality of capacitive memory elements disposed on a substrate. The substrate may comprise a processor, a memory device or other integrated circuit device. The capacitive memory elements may have a ...
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7205571 |
A thin film transistor (TFT) substrate is fabricated in three mask processes. In a first mask process, a gate line and a gate electrode are formed. In a second mask process, a data line, a source electrode, a drain electrode, a semicondu...
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7202499 |
An object of the present invention is to provide a TFT of new structure in which the gate electrode overlaps with the LDD region and a TFT of such structure in which the gate electrode does not overlap with the LDD region. The TFT is mad...
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7199415 |
Container structures for use in integrated circuits and methods of their manufacture. The container structures have a dielectric cap on the top of a conductive container to reduce the risk of container-to-container shorting by insulating...
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7176790 |
A vehicle has a display device which widens the field of view (visible area) reflected by a side mirror or a back mirror mounted on the vehicle. To enable a driver driving the vehicle to confirm safety even when it is difficult for the d...
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7170165 |
An assembly includes a circuit board with a ball grid array device attached to a first side of the circuit board. A brace surrounding the ball grid array device has a series of mounting holes and a series of members extending between the...
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7166861 |
The present invention provides a thin-film transistor that is formed by using a patterning method capable of forming a semiconductor channel layer in sub-micron order and a method for manufacturing thereof that provides a thin-film trans...
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7157738 |
The present invention relates to a capacitor element and its manufacturing method. The invention presents a capacitor element comprising a lower electrode, a dielectric film, and an upper electrode, and its manufacturing method, in which...
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7157735 |
A thin-film transistor substrate, including a substrate with an insulating surface, gate electrodes, lower electrodes of capacitors made of the same material layer as the gate electrodes, a first insulating layer, a channel layer of high...
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7157321 |
A semiconductor device that can be manufactured with a reduced cost by decreasing the number of masks is disclosed, and a method for manufacturing the semiconductor device is disclosed. The method for manufacturing the semiconductor devi...
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7154158 |
As for the resistor on the semiconductor substrate, it is required to achieve obtaining a metal resistor, which can be formed in the latter half of a preliminary process for manufacturing a semiconductor, in addition to forming a polysil...
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7148510 |
A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long, and moisture in the interlayer insulatin...
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7141864 |
There is disclosed a semiconductor device comprising at least one capacitive element group having a plurality of unit capacitive elements. At least one lead-out electrode for bottom electrodes of the unit capacitive elements of the capac...
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7115903 |
An insulating film having depressions and projections are formed on a substrate. A semiconductor film is formed on the insulating film. Thus, for crystallization by using laser light, a part where stress concentrates is selectively forme...
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7112819 |
A capacitor uses niobium pentoxide in the manufacture of a semiconductor device. The niobium pentoxide has a low crystallization temperature of 600° C. that provides control over the oxidation of the bottom electrode during heat-treatme...
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7105884 |
A method of forming memory circuitry having a memory array having a plurality of memory capacitors and having peripheral memory circuitry operatively configured to write to and read from the memory array, includes forming a dielectric we...
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