Title:
【発明の名称】ATMセルプロセッサ
Document Type and Number:
Japanese Patent JP2002509412
Kind Code:
A
Abstract:
An ATM cell processor (10) has a backplane interface (11), a line interface (15), and various processing functions between the interfaces. Cells directed to the line interface (15) are controlled by a queueing function (12) which uses external cell memory via a controller (13) and external control memory via a controller (14). Cells from the backplane are identified and routed by a mapping function (16).
Inventors:
Dewar, Kevin
Oudaud, Brendan
Brebner, gavin
Oudaud, Brendan
Brebner, gavin
Application Number:
JP2000539674A
Publication Date:
March 26, 2002
Filing Date:
December 15, 1998
Export Citation:
Assignee:
Tellabs Research Limited
International Classes:
H04L12/54; H04L49/111; H04Q11/04; (IPC1-7): H04L12/28
Attorney, Agent or Firm:
Akihiko Umeda